LPC2013 中的启动文件cstartup.s 详解

操作系统：ucos-ii 2.52

编译器：IAR 5.4
处理器： LPC2103

cstartup.s 与 在LPC2103上跑裸机的启动代码 lpc2xxx_cstartup.s 基本上一样，只是改了一些标号而已。

;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;
;; Part one of the system initialization code,
;; contains low-level
;; initialization.
;;
;; Copyright 2006 IAR Systems. All rights reserved.
;;
;; $Revision: 21638 $
;;

        MODULE  ?cstartup

        ;; Forward declaration of sections.
        
        ;定义各种模式STACK，具体大小位置是由linker文件(相当于ADS中的分散加载)
        ;决定的,这些STACK都定义在内部RAM中
        SECTION IRQ_STACK:DATA:NOROOT(3)  ;jtk  NOROOT表示如果这个段里的标号没引用就被linker舍弃，ROOT则一定不舍弃
        SECTION ABT_STACK:DATA:NOROOT(3)  ;jtk  (1)表示字节对齐数，为2的幂，(2)表示4字节对齐，(3)表示8字节对齐
        SECTION SVC_STACK:DATA:NOROOT(3)
        SECTION UND_STACK:DATA:NOROOT(3)
        SECTION FIQ_STACK:DATA:NOROOT(3)
        SECTION CSTACK:DATA:NOROOT(3)

;
; The module in this file are included in the libraries, and may be
; replaced by any user-defined modules that define the PUBLIC symbol
; __iar_program_start or a user defined start symbol.
;
; To override the cstartup defined in the library, simply add your
; modified version to the workbench project.

;jtk 通常INTVEC段被连接到0地址，应该在.icf文件中有定义
        SECTION .intvec:CODE:NOROOT(2)

        PUBLIC  __vector  ;jtk PUBLIC声明可以被外部引用的标号
        PUBLIC  __vector_0x14
        PUBLIC  __iar_program_start
        EXTERN undef_handler, prefetch_handler, data_handler,
        EXTERN irq_handler, fiq_handler


        ARM
__vector:  
        ;jtk 绝对跳转，跳转到相应的异常处理程序，PC总是指向当前指令的下两条指令的地址，即PC的值为当前指令的地址值加8个字节
        ;jtk 所以LDR PC, [PC,#24]跳转到24+8=32字节后
        ldr   pc,[pc,#+24]              ;; Reset jtk 跳转到__iar_program_start
        ldr   pc,[pc,#+24]              ;; Undefined instructions
        B   .                           ;; Software interrupt (SWI/SVC)
        ldr   pc,[pc,#+24]              ;; Prefetch abort
        ldr   pc,[pc,#+24]              ;; Data abort
__vector_0x14
        DC32  0                         ;; RESERVED
        ldr   pc,[pc,#+24]              ;; IRQ
        ldr   pc,[pc,#+24]              ;; FIQ
;jtk 上面的中断向量跳转到这里来，如果在c语言中有定义，
;下面的标号如果在c语言中有相应的处理程序，那么一旦有中断产生就会跳到相应的中断函数去
        DC32  __iar_program_start       ;; Reset
        DC32  undef_handler             ;; Undefined instructions
        DC32  0                         ;; Software interrupt (SWI/SVC)
        DC32  prefetch_handler          ;; Prefetch abort
        DC32  data_handler              ;; Data abort
        DC32  0                         ;; RESERVED
        DC32  irq_handler               ;; IRQ
        DC32  fiq_handler               ;; FIQ


; --------------------------------------------------
; ?cstartup -- low-level system initialization code.
;
; After a reser execution starts here, the mode is ARM, supervisor
; with interrupts disabled.
;



        SECTION .text:CODE:NOROOT(2)

;        PUBLIC  ?cstartup   ;jtk  ?xxx表示仅能由汇编访问的外部标号
        EXTERN  ?main
        ;REQUIRE强制__vector被引用，这样__vector就一定会被link了
        REQUIRE __vector     ;jtk  __xxx 表示可由C语言访问/定义的外部标号

        ARM

__iar_program_start:  ;jtk系统复位后从__iar_program_start开始执行
?cstartup:   ;jtk 这个不知道有什么用

;
; Add initialization needed before setup of stackpointers here.
;

; Errata  MAM.1Incorrect read of data from SRAM after Reset and MAM
; is not enabled or partially enabled.
; Work-around: User code should enable the MAM after Reset and before
; any RAM accesses
MAMCR    DEFINE  0xE01FC000     ; MAM Control Register
MAMTIM   DEFINE  0xE01FC004     ; MAM Timing register

        ldr     r0,=MAMCR
        ldr     r1,=MAMTIM
        ldr     r2,=0
        str     r2,[r0]   ;jtk 改变MAM定时值时先向MAMCR写入0来关闭MAM
        ldr     r2,=3     ; 1 < 20 MHz; 20 MHz < 2 < 40 MHz; 40MHz > 3
        str     r2,[r1]
        ldr     r2,=2     ;MAM功能全部使能
        str     r2,[r0]

; Initialize the stack pointers.
; The pattern below can be used for any of the exception stacks:
; FIQ, IRQ, SVC, ABT, UND, SYS.
; The USR mode uses the same stack as SYS.
; The stack segments must be defined in the linker command file,
; and be declared above.
;
; --------------------
; Mode, correspords to bits 0-5 in CPSR
MODE_BITS DEFINE  0x1F    ; Bit mask for mode bits in CPSR
USR_MODE  DEFINE  0x10    ; User mode
FIQ_MODE  DEFINE  0x11    ; Fast Interrupt Request mode
IRQ_MODE  DEFINE  0x12    ; Interrupt Request mode
SVC_MODE  DEFINE  0x13    ; Supervisor mode
ABT_MODE  DEFINE  0x17    ; Abort mode
UND_MODE  DEFINE  0x1B    ; Undefined Instruction mode
SYS_MODE  DEFINE  0x1F    ; System mode


;初始化堆栈指针
        MRS     r0, cpsr                ; Original PSR value

        BIC     r0, r0, #MODE_BITS      ; Clear the mode bits jtk 将r低5位清零
        ORR     r0, r0, #ABT_MODE       ; Set ABT mode bits
        MSR     cpsr_c, r0              ; Change the mode   jtk cpsr_c代表cpsr中的低8位，也就是控制位
        LDR     sp, =SFE(ABT_STACK)     ; End of ABT_STACK ;取ABT_STACK的末地址给sp

        BIC     r0, r0, #MODE_BITS      ; Clear the mode bits
        ORR     r0, r0, #SVC_MODE       ; Set SVC mode bits
        MSR     cpsr_c, r0              ; Change the mode
        LDR     sp, =SFE(SVC_STACK)     ; End of SVC_STACK

        BIC     r0, r0, #MODE_BITS      ; Clear the mode bits
        ORR     r0, r0, #UND_MODE       ; Set UND mode bits
        MSR     cpsr_c, r0              ; Change the mode
        LDR     sp, =SFE(UND_STACK)     ; End of UND_STACK

        BIC     r0, r0, #MODE_BITS      ; Clear the mode bits
        ORR     r0, r0, #FIQ_MODE       ; Set FIQ mode bits
        MSR     cpsr_c, r0              ; Change the mode
        LDR     sp, =SFE(FIQ_STACK)     ; End of FIQ_STACK

        BIC     r0, r0, #MODE_BITS      ; Clear the mode bits
        ORR     r0, r0, #IRQ_MODE       ; Set IRQ mode bits
        MSR     cpsr_c, r0              ; Change the mode
        LDR     sp, =SFE(IRQ_STACK)     ; End of IRQ_STACK

        BIC     r0 ,r0, #MODE_BITS      ; Clear the mode bits
        ORR     r0 ,r0, #SYS_MODE       ; Set System mode bits
        MSR     cpsr_c, r0              ; Change the mode
        LDR     sp, =SFE(CSTACK)        ; End of CSTACK

#ifdef __ARMVFP__
        ;; Enable the VFP coprocessor.

        MOV     r0, #0x40000000         ; Set EN bit in VFP
        FMXR    fpexc, r0               ; FPEXC, clear others.

;
; Disable underflow exceptions by setting flush to zero mode.
; For full IEEE 754 underflow compliance this code should be removed
; and the appropriate exception handler installed.
;

        MOV     r0, #0x01000000         ; Set FZ bit in VFP
        FMXR    fpscr, r0               ; FPSCR, clear others.
#endif

;
; Add more initialization here
;

; Continue to ?main for C-level initialization.

        LDR     r0, =?main
        BX      r0

        END