S32K系列S32K144学习笔记——CAN

一用S32K144苦似海,道友,能不用,千万不去用。

本例程基以下如图所示接口操作,MCU为S32K144,开发平台S32DSworkspace
功能描述:CAN0通信 CAN0_EN–>PB15
如有错误,麻烦帮忙指出,谢谢!
在这里插入图片描述

#include "S32K144.h" /* include peripheral declarations S32K144 */
#include "s32_core_cm4.h"

void WDOG_disable (void)
{
	WDOG->CNT=0xD928C520; 	 //解锁看门狗
	WDOG->TOVAL=0x0000FFFF;	 //把时间配置为最大
	WDOG->CS = 0x00002100;   //关闭看门狗
}

void SOSC_init_8MHz(void)
{
  	SCG->SOSCDIV=0x00000101;  //SOSCDIV1 & SOSCDIV2 =1:  分频/1
  	SCG->SOSCCFG=0x00000024;  //Range=2: 选择晶体振荡器的中频范围 (SOSC 1MHz-8MHz)
                              // HGO=0:   控制晶体振荡器的工作功率模式 --低功率模式
                              // EREFS=1: 外部参考选择OSC内部晶体振荡器
  	while(SCG->SOSCCSR & SCG_SOSCCSR_LK_MASK); //等待SOSCCSR解锁 寄存器解锁后才可写入
  	SCG->SOSCCSR=0x00000001;  // LK=0:  SOSCCSR可以写
                              // SOSCCM=0: 系统OSC时钟监视器被禁用
                              // SOSCEN=1: 启用系统OSC
  	while(!(SCG->SOSCCSR & SCG_SOSCCSR_SOSCVLD_MASK)); //等待系统OSC成功启用,输出时钟有效
}


void SPLL_init_160MHz(void)
{
  	while(SCG->SPLLCSR & SCG_SPLLCSR_LK_MASK); //等待SPLLCSR寄存器解锁  寄存器解锁后才可写入
  	SCG->SPLLCSR = 0x00000000;  // LK=0: SPLLCSR可以写入
  	  	  	  	  	  	  	    // SPLLEN=0: SPLL禁用
  	SCG->SPLLDIV = 0x00000302;  // SPLLDIV1 分频/2; SPLLDIV2 分频/4
  	SCG->SPLLCFG = 0x00180000;  // PREDIV=0: 锁相环参考时钟分频因子
                                // MULT=24:  SPLL时钟频率的乘法因子
                                // SPLL_CLK = 8MHz / 1 * 40 / 2 = 160 MHz    SPLL_CLK = (VCO_CLK)/2  VCO_CLK = SPLL_SOURCE/(PREDIV+1)*(MULT+16)
  	while(SCG->SPLLCSR & SCG_SPLLCSR_LK_MASK); //等待SPLLCSR寄存器解锁  寄存器解锁后才可写入
  	SCG->SPLLCSR = 0x00000001;  // LK=0: SPLLCSR可以写入
                                // SPLLCM=0: SPLL时钟监视器被禁用
                                // SPLLEN=1: 开启SPLL
  	while(!(SCG->SPLLCSR & SCG_SPLLCSR_SPLLVLD_MASK)); //等待SPLL成功启用,输出时钟有效
}

void NormalRUNmode_40MHz (void)
{
	SCG->RCCR=SCG_RCCR_SCS(6)   // SPLL做为系统时钟源
	|SCG_RCCR_DIVCORE(0b11)     // DIVCORE=3, 分频/4: Core clock = 160/4 MHz = 40 MHz
	|SCG_RCCR_DIVBUS(0b11)      // DIVBUS=3, 分频/4: bus clock = 160/4 MHz = 40 MHz
	|SCG_RCCR_DIVSLOW(0b111);   // DIVSLOW=7, 分频/8: SCG slow, flash clock= 160/8 MHz = 20MHZ
	while (((SCG->CSR & SCG_CSR_SCS_MASK) >> SCG_CSR_SCS_SHIFT ) != 6) {}//等待系统时钟源成功选择SPLL
}

/*********************************************************************
 * 函数原型:void CAN_GPIO_init (void)
 * 功   能:CAN GPIO初始化
 * 输入参数:无
 * 返回参数:无
 *
 * 其他说明:
*********************************************************************/
void CAN_PORT_init (void)
{
	PCC->PCCn[PCC_PORTE_INDEX] |= PCC_PCCn_CGC_MASK; //使能PTE端口时钟
	PORTE->PCR[4] |= PORT_PCR_MUX(5); // Port E4: MUX = ALT5, CAN0_RX 复用
	PORTE->PCR[5] |= PORT_PCR_MUX(5); // Port E5: MUX = ALT5, CAN0_TX 复用

	PCC->PCCn[PCC_PORTB_INDEX] |= PCC_PCCn_CGC_MASK; //使能PTB端口时钟
	PTB->PDDR |= (1<<15);        //端口PTB15配置为输出
	PORTB->PCR[15] = 0x00000100; //端口PTB15为GPIO
	PTB->PTOR &= ~(1<<15);       //输出低电平
}

/*********************************************************************
 * 函数原型:void CAN0_init(void)
 * 功    能:CAN0初始化
 * 输入参数:无
 * 返回参数:无
 *
 * 其他说明:
*********************************************************************/
void CAN0_init(void)
{
	#define MSG_BUF_SIZE  4    /* Msg Buffer Size. (CAN 2.0AB: 2 hdr +  2 data= 4 words) */

	unsigned int i=0;

	PCC->PCCn[PCC_FlexCAN0_INDEX] |= PCC_PCCn_CGC_MASK; /* CGC=1: enable clock to FlexCAN0 */

	CAN0->MCR |= CAN_MCR_MDIS_MASK;         /* MDIS=1: Disable module before selecting clock */

	CAN0->CTRL1 &= ~CAN_CTRL1_CLKSRC_MASK;  /* CLKSRC=0: Clock Source = oscillator (8 MHz) */

	CAN0->MCR &= ~CAN_MCR_MDIS_MASK;        /* MDIS=0; Enable module config. (Sets FRZ, HALT) */

	while (!((CAN0->MCR & CAN_MCR_FRZACK_MASK) >> CAN_MCR_FRZACK_SHIFT))  {} /* Good practice: wait for FRZACK=1 on freeze mode entry/exit */

	CAN0->CTRL1 = 0x00DB0006; /* Configure for 500 KHz bit time */
                              /* Time quanta freq = 16 time quanta x 500 KHz bit time= 8MHz */
                              /* PRESDIV+1 = Fclksrc/Ftq = 8 MHz/8 MHz = 1 */
                              /*    so PRESDIV = 0 */
                              /* PSEG2 = Phase_Seg2 - 1 = 4 - 1 = 3 */
                              /* PSEG1 = PSEG2 = 3 */
                              /* PROPSEG= Prop_Seg - 1 = 7 - 1 = 6 */
                              /* RJW: since Phase_Seg2 >=4, RJW+1=4 so RJW=3. */
                              /* SMP = 1: use 3 bits per CAN sample */
                              /* CLKSRC=0 (unchanged): Fcanclk= Fosc= 8 MHz */
	for(i=0; i<128; i++ )
	{                         /* CAN0: clear 32 msg bufs x 4 words/msg buf = 128 words*/
		CAN0->RAMn[i] = 0;    /* Clear msg buf word */
	}

	for(i=0; i<16; i++ )
	{                                 /* In FRZ mode, init CAN0 16 msg buf filters */
		CAN0->RXIMR[i] = 0xFFFFFFFF;  /* Check all ID bits for incoming messages */
	}

	CAN0->RXMGMASK = 0x1FFFFFFF; /* Global acceptance mask: check all ID bits */   //增加了周工语句后屏蔽的语句

	CAN0->RAMn[ 4*MSG_BUF_SIZE + 0] = 0x04000000; /* Msg Buf 4, word 0: Enable for reception */
                                                  /* EDL,BRS,ESI=0: CANFD not used */
                                                  /* CODE=4: MB set to RX inactive */
                                                  /* IDE=0: Standard ID or Extended */
                                                  /* SRR, RTR, TIME STAMP = 0: not applicable */

#ifdef NODE_A                                     /* Node A receives msg with std ID 0x511 */
	CAN0->RAMn[ 4*MSG_BUF_SIZE + 1] = 0x14440000; /* Msg Buf 4, word 1: Standard ID = 0x111 */
#else                                             /* Node B to receive msg with std ID 0x555 */
	CAN0->RAMn[ 4*MSG_BUF_SIZE + 1] = 0x15540000; /* Msg Buf 4, word 1: Standard ID = 0x555*/
#endif
                                                  /* PRIO = 0: CANFD not used */
	CAN0->MCR = 0x0000001F;//CAN_MCR_IRMQ_MASK | CAN_MCR_SRXDIS_MASK;   /* Negate FlexCAN 0 halt state for 32 MBs */

	CAN0->IMASK1 |= (1<<4); /* Open FIFO receives interrupt */

	while ((CAN0->MCR && CAN_MCR_FRZACK_MASK) >> CAN_MCR_FRZACK_SHIFT)  {}
    /* Good practice: wait for FRZACK to clear (not in freeze mode) */
	while ((CAN0->MCR && CAN_MCR_NOTRDY_MASK) >> CAN_MCR_NOTRDY_SHIFT)  {}
    /* Good practice: wait for NOTRDY to clear (module ready)  */
}

/*********************************************************************
 * 函数原型:void CAN0_transmit_msg(void)
 * 功        能:CAN0发送数据
 * 输入参数:无
 * 返回参数:无
 *
 * 其他说明:
*********************************************************************/
void CAN0_transmit_msg(void)
{
	/* Assumption:  Message buffer CODE is INACTIVE */
	CAN0->IFLAG1 = 0x00000001;       /* Clear CAN 0 MB 0 flag without clearing others */

	CAN0->RAMn[ 0*MSG_BUF_SIZE + 2] = 0xA5112233; /* MB0 word 2: data word 0 */
	CAN0->RAMn[ 0*MSG_BUF_SIZE + 3] = 0x44556677; /* MB0 word 3: data word 1 */

#ifdef NODE_A
	CAN0->RAMn[ 0*MSG_BUF_SIZE + 1] = 0x15540000; /* MB0 word 1: Tx msg with STD ID 0x555 */
#else
	CAN0->RAMn[ 0*MSG_BUF_SIZE + 1] = 0x14440000; /* MB0 word 1: Tx msg with STD ID 0x511 */
#endif

	CAN0->RAMn[ 0*MSG_BUF_SIZE + 0] = 0x0C400000 | 8 <<CAN_WMBn_CS_DLC_SHIFT; /* MB0 word 0: */
                                                /* EDL,BRS,ESI=0: CANFD not used */
                                                /* CODE=0xC: Activate msg buf to transmit */
                                                /* IDE=0: Standard ID */
                                                /* SRR=1 Tx frame (not req'd for std ID) */
                                                /* RTR = 0: data, not remote tx request frame*/
                                                /* DLC = 8 bytes */
}

void CAN0_NVIC_init_IRQs (void)
{
	S32_NVIC->ICPR[1] = 1 << (81 % 32);  /* IRQ81-CHA0 0-15: clr any pending IRQ*/
	S32_NVIC->ISER[(uint32_t)(CAN0_ORed_0_15_MB_IRQn) >> 5U] = (uint32_t)(1UL << ((uint32_t)(CAN0_ORed_0_15_MB_IRQn) & (uint32_t)0x1FU));
	S32_NVIC->IP[81] = 0xb;              /* IRQ81-CAN0 0-15: priority 10 of 0-15*/
}

int main(void)
{
	unsigned int ADC_Value;
	
	WDOG_disable();                   //关闭看门狗

	SOSC_init_8MHz();                 //配置系统振荡器为外部8MHZ
	SPLL_init_160MHz();               //使用SOSC 8MHZ配置SPLL 为160 MHz
	NormalRUNmode_40MHz();            //配置系列时钟40MHz, 40MHz总线时钟
	
	CAN0_init();
	CAN0_NVIC_init_IRQs();
	CAN_PORT_init();
	
	for(;;)
	{

	}
	
	return 0;
}

/*********************************************************************
 * 函数原型:void CAN0_ORed_0_15_MB_IRQHandler(void)
 * 功        能:CAN0中断服务器
 * 输入参数:无
 * 返回参数:无
 *
 * 其他说明:
*********************************************************************/
void CAN0_ORed_0_15_MB_IRQHandler(void)
{
	unsigned char j;

	if ((CAN0->IFLAG1 >> 4) & 1)
	{

		RxCODE   = (CAN0->RAMn[ 4*MSG_BUF_SIZE + 0] & 0x07000000) >> 24;  /* Read CODE field */
		RxID     = (CAN0->RAMn[ 4*MSG_BUF_SIZE + 1] & CAN_WMBn_ID_ID_MASK)  >> CAN_WMBn_ID_ID_SHIFT ;
		RxLENGTH = (CAN0->RAMn[ 4*MSG_BUF_SIZE + 0] & CAN_WMBn_CS_DLC_MASK) >> CAN_WMBn_CS_DLC_SHIFT;
		for (j=0; j<2; j++) {  /* Read two words of data (8 bytes) */
		  RxDATA[j] = CAN0->RAMn[ 4*MSG_BUF_SIZE + 2 + j];
		}
		RxTIMESTAMP = (CAN0->RAMn[ 0*MSG_BUF_SIZE + 0] & 0x000FFFF);

		if((RxID==0x15540000)||(RxID==0x14880000))
		{
			CAN0_transmit_msg();
		}

		CAN0->IFLAG1 = 0x00000010;       /* Clear CAN 0 MB 4 flag without clearing others*/
	}
}
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