stm8/
#include "mapping.inc"
#include "stm8s105k.inc"
segment 'rom'
main.l
; initialize SP
ldw X,#stack_end
ldw SP,X
#ifdef RAM0
; clear RAM0
ram0_start.b EQU $ram0_segment_start
ram0_end.b EQU $ram0_segment_end
ldw X,#ram0_start
clear_ram0.l
clr (X)
incw X
cpw X,#ram0_end
jrule clear_ram0
#endif
#ifdef RAM1
; clear RAM1
ram1_start.w EQU $ram1_segment_start
ram1_end.w EQU $ram1_segment_end
ldw X,#ram1_start
clear_ram1.l
clr (X)
incw X
cpw X,#ram1_end
jrule clear_ram1
#endif
; clear stack
stack_start.w EQU $stack_segment_start
stack_end.w EQU $stack_segment_end
ldw X,#stack_start
clear_stack.l
clr (X)
incw X
cpw X,#stack_end
jrule clear_stack
;output port_d
mov PD_DDR, #$ff
mov PD_CR1, #$ff
mov PD_ODR, #$00
;input PORT_C
;input floating with interrupt
mov PC_DDR,#$00
mov PC_CR1,#$00
mov PC_CR2,#$ff
;interrupt sensitivity
mov EXTI_CR1,#$20 ;falling edge
;configure timer2 --PWM
MOV TIM2_CR1,#%00000000 ;counter enable OFF
MOV TIM2_IER,#$00 ;no interrupts
MOV TIM2_CCMR1,#%01100000 ;PWM mode1+CC1 as output
MOV TIM2_CCER1,#$00000001
;enable CC1 output directly connected to PD4
;the frequency 1kHz
ldw x, #$07D0
ld a ,xh
ld TIM2_ARRH,a
ld a ,xl
ld TIM2_ARRL,a
;the dutycycle 50%
ldw x, #$03E8
ld a,xh
ld TIM2_CCR1H,a
ld a,xl
ld TIM2_CCR1L,a
;config tim3 for 1 second
mov TIM3_CR1,#%00000000 ;tim3 off
mov TIM3_PSCR,#$07 ;prescaler x128
bset TIM3_EGR,#0 ;force uev to update prescaler
mov TIM3_IER, #$01 ;TIM3 interrupt on update enabled
;config TIM3
MOV TIM3_ARRH,#%00111101 ;15625HZ 1s
MOV TIM3_ARRL, #%00001001
RIM
infinite_loop.l
ld a,#$01 ;empty operation
jra infinite_loop
interrupt NonHandledInterrupt
NonHandledInterrupt.l
iret
interrupt sound
sound
MOV TIM2_CR1,#%00000001 ;enable tim2
MOV TIM3_CR1,#%00000001 ;enable tim3
iret
interrupt timer
timer
MOV TIM2_CR1,#%00000000 ;disable tim2
MOV TIM3_CR1,#%00000000 ;disable tim3
BRES TIM3_SR1,#0 ;clear flag
iret
segment 'vectit'
dc.l {$82000000+main} ; reset
dc.l {$82000000+NonHandledInterrupt} ; trap
dc.l {$82000000+NonHandledInterrupt} ; irq0
dc.l {$82000000+NonHandledInterrupt} ; irq1
dc.l {$82000000+NonHandledInterrupt} ; irq2
dc.l {$82000000+NonHandledInterrupt} ; irq3
dc.l {$82000000+NonHandledInterrupt} ; irq4
dc.l {$82000000+sound} ; irq5
dc.l {$82000000+NonHandledInterrupt} ; irq6
dc.l {$82000000+NonHandledInterrupt} ; irq7
dc.l {$82000000+NonHandledInterrupt} ; irq8
dc.l {$82000000+NonHandledInterrupt} ; irq9
dc.l {$82000000+NonHandledInterrupt} ; irq10
dc.l {$82000000+NonHandledInterrupt} ; irq11
dc.l {$82000000+NonHandledInterrupt} ; irq12
dc.l {$82000000+NonHandledInterrupt} ; irq13
dc.l {$82000000+NonHandledInterrupt} ; irq14
dc.l {$82000000+timer} ; irq15
dc.l {$82000000+NonHandledInterrupt} ; irq16
dc.l {$82000000+NonHandledInterrupt} ; irq17
dc.l {$82000000+NonHandledInterrupt} ; irq18
dc.l {$82000000+NonHandledInterrupt} ; irq19
dc.l {$82000000+NonHandledInterrupt} ; irq20
dc.l {$82000000+NonHandledInterrupt} ; irq21
dc.l {$82000000+NonHandledInterrupt} ; irq22
dc.l {$82000000+NonHandledInterrupt} ; irq23
dc.l {$82000000+NonHandledInterrupt} ; irq24
dc.l {$82000000+NonHandledInterrupt} ; irq25
dc.l {$82000000+NonHandledInterrupt} ; irq26
dc.l {$82000000+NonHandledInterrupt} ; irq27
dc.l {$82000000+NonHandledInterrupt} ; irq28
dc.l {$82000000+NonHandledInterrupt} ; irq29
end
微暗之火大火!!!!!!!!!!!!