2440启动代码分析

;MINI2440的启动代码中从nandflash读数据有2部分代码：
;  1）是C语言写的，CopyProgramFromNand，
;  2）是汇编写的，
;      mov	r5, #NFCONF
;			;set timing value
; 	  ...
;  	  bic r0, r0, #1
;			str	r0, [r5, #4]      	; NAND flash controller enable
;			但是还不能使用。去掉这部分汇编没有影响。这里是去掉了这部分汇编的代码。直接把.txt改为.s就能使用

;=========================================
; NAME: 2440INIT.S
; DESC: C start up codes
;       Configure memory, ISR ,stacks
;	Initialize C-variables
; HISTORY:
; 2002.02.25:kwtark: ver 0.0
; 2002.03.20:purnnamu: Add some functions for testing STOP,Sleep mode
; 2003.03.14:DonGo: Modified for 2440.
;=========================================

	GET option.inc
	GET memcfg.inc
	GET 2440addr.inc

BIT_SELFREFRESH EQU	(1<<22)

;Pre-defined constants  ;//预定义6种工作模式
	
USERMODE    EQU 	0x10  ;//用户模式
FIQMODE     EQU 	0x11
IRQMODE     EQU 	0x12
SVCMODE     EQU 	0x13
ABORTMODE   EQU 	0x17
UNDEFMODE   EQU 	0x1b 

MODEMASK    EQU 	0x1f ;//模式掩码
NOINT       EQU 	0xc0


;//设置6种工作模式的堆栈的起始地址
;//在option.inc中定义了_STACK_BASEADDRESS      EQU 0x33ff8000
;The location of stacks
UserStack	EQU	(_STACK_BASEADDRESS-0x3800)	;0x33ff4800 ~
SVCStack	EQU	(_STACK_BASEADDRESS-0x2800)	;0x33ff5800 ~
UndefStack	EQU	(_STACK_BASEADDRESS-0x2400)	;0x33ff5c00 ~
AbortStack	EQU	(_STACK_BASEADDRESS-0x2000)	;0x33ff6000 ~
IRQStack	EQU	(_STACK_BASEADDRESS-0x1000)	;0x33ff7000 ~
FIQStack	EQU	(_STACK_BASEADDRESS-0x0)	;0x33ff8000 ~


;//；检查在tasm.exe里是否设置了采用THUMB(16位)代码(armasm -16 ...@ADS 1.0)
;//；判断是不是thumb指令。
;Check if tasm.exe(armasm -16 ...@ADS 1.0) is used.
	GBLL    THUMBCODE  ;//	定义THUMBCODE全局变量	
	[ {CONFIG} = 16    ;//{CONFIG}由编译器得来。这里表示你的目前处于领先地16位编译方式
THUMBCODE SETL  {TRUE}
	    CODE32         ;//		否则是ARM模式		
 		|
THUMBCODE SETL  {FALSE}
    ]

 		MACRO        ;//宏定义MOV_PC_LR，作用：子程序返回
	MOV_PC_LR
 		[ THUMBCODE   ;//	在目标地址是THUMB指令,在ARM模式中	要 用BX指令转THUMB  
	    bx lr
 		|
	    mov	pc,lr
 		]
	MEND

 		MACRO
	MOVEQ_PC_LR
 		[ THUMBCODE
        bxeq lr
 		|
	    moveq pc,lr
 		]
	MEND





    	MACRO     ;// 先定义了一个负责处理中断宏
$HandlerLabel HANDLER $HandleLabel           ;$lable macroname $parameter
;HandlerLabel     //为中断服务入口地址
$HandlerLabel
	sub	sp,sp,#4	;decrement sp(to store jump address)
	                       ;//将要使用的r0寄存器入栈
	stmfd	sp!,{r0}	;PUSH the work register to stack(lr does not push because it return to original address)
	ldr     r0,=$HandleLabel;load the address of HandleXXX to r0
	ldr     r0,[r0]	 ;load the contents(service routine start address) of HandleXXX
	                        ;//将对应的中断函数首地址入栈
	str     r0,[sp,#4]      ;store the contents(ISR) of HandleXXX to stack
	                         ;//将中断函数首地址出栈 放入程序指针中 系统将跳转到对应中断处理函数
	ldmfd   sp!,{r0,pc}     ;POP the work register and pc(jump to ISR)
	MEND


;//一个arm由RO,RW,ZI三个断组成 其中RO为代码段，RW是已经初始化的全局变量，ZI是未初始化的全局变量
;//（对于GNU工具 对应的概念是TEXT ,DATA,BSS）bootloader 
;//bootloader要将RW段复制到ram中并将ZI段清零 编译器使用下列段来记录各段的起始和结束地址
;//这些标号的值是通过编译器的设定来确定的
;//注意：是在SDRAM中运行的地址
	IMPORT  |Image$$RO$$Base|	; Base of ROM code
	IMPORT  |Image$$RO$$Limit|  ; End of ROM code (=start of ROM data)
	IMPORT  |Image$$RW$$Base|   ; Base of RAM to initialise
	IMPORT  |Image$$ZI$$Base|   ; Base and limit of area
	IMPORT  |Image$$ZI$$Limit|  ; to zero initialise

	IMPORT	MMU_SetAsyncBusMode  ;//	引入外部变量MMU的快速总线模式和同步总线模式两个变量
	IMPORT	MMU_SetFastBusMode	;

	IMPORT  Main    ; The main entry of mon program
	IMPORT  CopyProgramFromNand

	AREA    Init,CODE,READONLY

	ENTRY
	
	EXPORT	__ENTRY
__ENTRY
ResetEntry
	;1)The code, which converts to Big-endian, should be in little endian code.
	;2)The following little endian code will be compiled in Big-Endian mode.
	;  The code byte order should be changed as the memory bus width.
	;3)The pseudo instruction,DCD can not be used here because the linker generates error.
	;//ASSERT 是断言伪指令,语法是:ASSERT +逻辑表达式
	;//	def 是逻辑伪操作符，格式为： :DEF:label，作用是：判断label是否定义过 

	ASSERT	:DEF:ENDIAN_CHANGE
	                                   ;//在option.inc中ENDIAN_CHANGE	SETL	{FALSE} 所以下面没执行，直接  b	ResetHandler                              
	[ ENDIAN_CHANGE
	    ASSERT  :DEF:ENTRY_BUS_WIDTH
	    [ ENTRY_BUS_WIDTH=32
		b	ChangeBigEndian	    ;DCD 0xea000007
	    ]

	    [ ENTRY_BUS_WIDTH=16
		andeq	r14,r7,r0,lsl #20   ;DCD 0x0007ea00
	    ]

	    [ ENTRY_BUS_WIDTH=8
		streq	r0,[r0,-r10,ror #1] ;DCD 0x070000ea
	    ]
	|
	    b	ResetHandler
    ]
	b	HandlerUndef	;handler for Undefined mode
	b	HandlerSWI	;handler for SWI interrupt
	b	HandlerPabort	;handler for PAbort
	b	HandlerDabort	;handler for DAbort
	b	.		;reserved
	b	HandlerIRQ	;handler for IRQ interrupt
	b	HandlerFIQ	;handler for FIQ interrupt

;@0x20
	b	EnterPWDN	; Must be @0x20.
ChangeBigEndian
;@0x24
	[ ENTRY_BUS_WIDTH=32
	    DCD	0xee110f10	;0xee110f10 => mrc p15,0,r0,c1,c0,0
	    DCD	0xe3800080	;0xe3800080 => orr r0,r0,#0x80;  //Big-endian
	    DCD	0xee010f10	;0xee010f10 => mcr p15,0,r0,c1,c0,0
	]
	[ ENTRY_BUS_WIDTH=16
	    DCD 0x0f10ee11
	    DCD 0x0080e380
	    DCD 0x0f10ee01
	]
	[ ENTRY_BUS_WIDTH=8
	    DCD 0x100f11ee
	    DCD 0x800080e3
	    DCD 0x100f01ee
    ]
	DCD 0xffffffff  ;swinv 0xffffff is similar with NOP and run well in both endian mode.
	DCD 0xffffffff    ;//用于分配一片连续的字存储单元并用指定的数据初始化。 
	DCD 0xffffffff
	DCD 0xffffffff
	DCD 0xffffffff
	DCD 0xffffffff
	b ResetHandler
	
;//下面是具体的中断处理函数跳转的宏，通过上面的$HandlerLabel的宏定义展开后跳转到对应的中断处理函数（对于向量中断）
HandlerFIQ      HANDLER HandleFIQ
HandlerIRQ      HANDLER HandleIRQ
HandlerUndef    HANDLER HandleUndef
HandlerSWI      HANDLER HandleSWI
HandlerDabort   HANDLER HandleDabort
HandlerPabort   HANDLER HandlePabort


;//下面这段程序是用来处理非向量中断，具体判断I_ISPR中各位是否置1 置1表示目前此中断等待响应（每次只能有一位置1），
;//从最高优先级中断位开始判断，检测到等待服务 
;//中断就将pc置为中断服务函数首地址
IsrIRQ
	sub	sp, sp, #4       ;reserved for PC  ;//预留返回指针的存储位置
	stmfd	sp!, {r8-r9}
	
	ldr	r9, =INTOFFSET    ; //；从中断偏移寄存器取得中断偏移量
	ldr	r9, [r9]
	ldr	r8, =HandleEINT0  ;// ；中断处理的第一个函数
	add	r8, r8,r9,lsl #2   ;// ；查找相应的中断
	ldr	r8, [r8]           ;//；相应的中断地址入栈
	str	r8, [sp,#8]
	ldmfd	sp!,{r8-r9,pc}  ;// ；跳到中断


	LTORG

;=======
; ENTRY
;=======
;//扳子上电和复位后 程序开始从位于0x0执行b ResetHandler 程序从跳转到这里执行 
;//板子上电复位后 执行几个步骤这里通过标号在注释中加1，2，3....标示 标号表示执行顺序 
;//   1.禁止看门狗 屏蔽所有中断
ResetHandler
	ldr	r0,=WTCON       ;watch dog disable
	ldr	r1,=0x0
	str	r1,[r0]

	ldr	r0,=INTMSK
	ldr	r1,=0xffffffff  ;all interrupt disable
	str	r1,[r0]

	ldr	r0,=INTSUBMSK
	ldr	r1,=0x7fff		;all sub interrupt disable
	str	r1,[r0]

	[ {TRUE}
	;rGPFDAT = (rGPFDAT & ~(0xf<<4)) | ((~data & 0xf)<<4);
	; Led_Display
	ldr	r0,=GPBCON
	ldr	r1,=0x00555555
	str	r1,[r0]
	ldr	r0,=GPBDAT
	ldr	r1,=0x07fe
	str	r1,[r0]
	]



	;//the user can change the frequency by writing the PMS value and the PLL lock time will be automatically inserted. datasheet P213
	;To reduce PLL lock time, adjust the LOCKTIME register.
	ldr	r0,=LOCKTIME
	ldr	r1,=0xffffff
	str	r1,[r0]

    [ PLL_ON_START
	; Added for confirm clock divide. for 2440.
	; Setting value Fclk:Hclk:Pclk
	ldr	r0,=CLKDIVN
	ldr	r1,=CLKDIV_VAL		;=5  0=1:1:1, 1=1:1:2, 2=1:2:2, 3=1:2:4, 4=1:4:4, 5=1:4:8, 6=1:3:3, 7=1:3:6.
	str	r1,[r0]
	
	;	MMU_SetAsyncBusMode and MMU_SetFastBusMode over 4K, so do not call here
	;	call it after copy
	;	[ CLKDIV_VAL>1 		; means Fclk:Hclk is not 1:1.
	;	bl MMU_SetAsyncBusMode
	;	|
	;	bl MMU_SetFastBusMode	; default value.
	;	]
	;program has not been copied, so use these directly

	;// 设置异步模式  datasheet p215
	[ CLKDIV_VAL>1 		; means Fclk:Hclk is not 1:1.
	mrc p15,0,r0,c1,c0,0
	orr r0,r0,#0xc0000000;R1_nF:OR:R1_iA
	mcr p15,0,r0,c1,c0,0
	|
	mrc p15,0,r0,c1,c0,0
	bic r0,r0,#0xc0000000;R1_iA:OR:R1_nF
	mcr p15,0,r0,c1,c0,0
	]
	
	;Configure UPLL
	ldr	r0,=UPLLCON
	ldr	r1,=((U_MDIV<<12)+(U_PDIV<<4)+U_SDIV)  ;// 56 2 2
	str	r1,[r0]
	nop	; Caution: After UPLL setting, at least 7-clocks delay must be inserted for setting hardware be completed.
	nop
	nop
	nop
	nop
	nop
	nop
	;Configure MPLL
	ldr	r0,=MPLLCON
	ldr	r1,=((M_MDIV<<12)+(M_PDIV<<4)+M_SDIV)  ;Fin=12MHz  92 1 1 MPll=400MHZ
	str	r1,[r0]
    ]

	;Check if the boot is caused by the wake-up from SLEEP mode.
	ldr	r1,=GSTATUS2    ;//P280
	ldr	r0,[r1]
	tst	r0,#0x2
	;In case of the wake-up from SLEEP mode, go to SLEEP_WAKEUP handler.
	bne	WAKEUP_SLEEP

	EXPORT StartPointAfterSleepWakeUp
StartPointAfterSleepWakeUp

;//2.设置存储相关寄存器的程序 
;//这是设置SDRAM,flash ROM 存储器连接和工作时序的程序,片选定义的程序 
;//SMRDATA map在下面的程序中定义 
;//具体寄存器各位含义请参考s3c2440 datasheet

	;Set memory control registers
 	;ldr	r0,=SMRDATA
 	adrl	r0, SMRDATA	;be careful!
	ldr	r1,=BWSCON	;BWSCON Address
	add	r2, r0, #52	;End address of SMRDATA

0
	ldr	r3, [r0], #4
	str	r3, [r1], #4
	cmp	r2, r0
	bne	%B0

;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;;;;;;;;;;;;       When EINT0 is pressed,  Clear SDRAM 
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; check if EIN0 button is pressed

    ldr	r0,=GPFCON   
	ldr	r1,=0x0   
	str	r1,[r0]   ;//GPC0 as input ,实际上MINI2440的GPC0没接Button,所以这里没意义
	ldr	r0,=GPFUP
	ldr	r1,=0xff
	str	r1,[r0]

	ldr	r1,=GPFDAT
	ldr	r0,[r1]
       bic	r0,r0,#(0x1e<<1)  ; bit clear
	tst	r0,#0x1
	bne %F1      ;//no pressed
	
	

; Clear SDRAM Start //使用LED作指示
  
	ldr	r0,=GPFCON
	ldr	r1,=0x55aa
	str	r1,[r0]
;	ldr	r0,=GPFUP
;	ldr	r1,=0xff
;	str	r1,[r0]
	ldr	r0,=GPFDAT
	ldr	r1,=0x0
	str	r1,[r0]	;LED=****

	mov r1,#0   ;//工作寄存器清零
	mov r2,#0
	mov r3,#0
	mov r4,#0
	mov r5,#0
	mov r6,#0
	mov r7,#0
	mov r8,#0
	
	ldr	r9,=0x4000000   ;64MB
	ldr	r0,=0x30000000
0	
	stmia	r0!,{r1-r8}  ;//内存清0
	subs	r9,r9,#32 
	bne	%B0

;Clear SDRAM End

1

 		;Initialize stacks  ;//3.设置不同工作模式的堆栈 
	bl	InitStacks

;//4.初始化FLASH
;===========================================================
	
	ldr	r0, =BWSCON
	ldr	r0, [r0]
	ands	r0, r0, #6		;OM[1:0] != 0, NOR FLash boot
	                        ;//bit BWSCON[2:1]为OM[1:0]的状态, OM[1:0]=00时，为nand flash.ands后Z！=0，为非nand flash    
	bne	copy_proc_beg		;do not read nand flash
	adr	r0, ResetEntry		;OM[1:0] == 0, NAND FLash boot
	cmp	r0, #0				;if use Multi-ice, //判断是否是加载启动,ne则是加载启动，直接跳到地址修正处
	bne	copy_proc_beg		;do not read nand flash for boot
	;nop
;===========================================================
nand_boot_beg

	bl CopyProgramFromNand
	
	ldr	pc, =copy_proc_beg  ;//copy nand flash 到ram


	
;===========================================================
;//是nor flash boot 时的代码搬运，或者是加载启动时的地址修正
copy_proc_beg
	adr	r0, ResetEntry ;//代码存放的地址
	ldr	r2, BaseOfROM  ;//代码在SDRAM运行的地址Rese
	cmp	r0, r2
	ldreq	r0, TopOfROM   ;//;TopOfROM RO的结束地址     NE,不执行
	beq	InitRam	          ;//如果相等则已经在内存中，跳过搬运
	ldr r3, TopOfROM     
		            ;//事实上前面nandflash已经做了copy，如果是nand boot,这段搬运的代码不会再
		            ;//被执行。所以是nor flash boot 时的代码搬运，或者是加载启动时的地址修正
0	
	ldmia	r0!, {r4-r7}   ;//；搬运代码
	stmia	r2!, {r4-r7}
	cmp	r2, r3
	bcc	%B0

	sub	r2, r2, r3   ;    //；搬完后可能 BaseOfBSS-TopOfROM!=0   多搬了BSS段的有数据的部分(RW)，减掉多搬的
	sub	r0, r0, r2				
		
InitRam	
		
	ldr	r2, BaseOfBSS    ; ；|Image$$RW$$Base| 
	ldr	r3, BaseOfZero	  ;；|Image$$ZI$$Base|
0
	cmp	r2, r3
	ldrcc	r1, [r0], #4    ;//;cc　less than  搬运BSS段的有数据的部分(RW)，到BaseOfBSS
	strcc	r1, [r2], #4
	bcc	%B0	

	mov	r0,	#0
	ldr	r3,	EndOfBSS
1	
	cmp	r2,	r3       ;//;把ZI段清0
	strcc	r0, [r2], #4
	bcc	%B1
	
	ldr	pc, =%F2		;goto compiler address
2
	
;	[ CLKDIV_VAL>1 		; means Fclk:Hclk is not 1:1.
;	bl	MMU_SetAsyncBusMode
;	|
;	bl MMU_SetFastBusMode	; default value.
;	]
	
	;bl	Led_Test

;//5.设置中断处理函数 把我们用说查二级向量表 ; 的中断例程安装到一级向量表(异常向量表)里
;===========================================================
  	; Setup IRQ handler
	ldr	r0,=HandleIRQ       ;This routine is needed
	ldr	r1,=IsrIRQ	  ;if there is not 'subs pc,lr,#4' at 0x18, 0x1c
	str	r1,[r0]

;	;Copy and paste RW data/zero initialized data
;	ldr	r0, =|Image$$RO$$Limit| ; Get pointer to ROM data
;	ldr	r1, =|Image$$RW$$Base|  ; and RAM copy
;	ldr	r3, =|Image$$ZI$$Base|
;
;	;Zero init base => top of initialised data
;	cmp	r0, r1      ; Check that they are different
;	beq	%F2
;1
;	cmp	r1, r3      ; Copy init data
;	ldrcc	r2, [r0], #4    ;--> LDRCC r2, [r0] + ADD r0, r0, #4
;	strcc	r2, [r1], #4    ;--> STRCC r2, [r1] + ADD r1, r1, #4
;	bcc	%B1
;2
;	ldr	r1, =|Image$$ZI$$Limit| ; Top of zero init segment
;	mov	r2, #0
;3
;	cmp	r3, r1      ; Zero init
;	strcc	r2, [r3], #4
;	bcc	%B3


    [ :LNOT:THUMBCODE
 		bl	Main	;Do not use main() because ......
 		;ldr	pc, =Main	;
 		b	.
    ]

    [ THUMBCODE	 ;for start-up code for Thumb mode
 		orr	lr,pc,#1
 		bx	lr
 		CODE16
 		bl	Main	;Do not use main() because ......
 		b	.
		CODE32
    ]


;function initializing stacks //让各模式下的堆栈指针指向相应的堆栈
InitStacks
	;Do not use DRAM,such as stmfd,ldmfd......
	;SVCstack is initialized before
	;Under toolkit ver 2.5, 'msr cpsr,r1' can be used instead of 'msr cpsr_cxsf,r1'
	mrs	r0,cpsr
	bic	r0,r0,#MODEMASK       ;MODEMASK=0x1f   r0=1110 0000
	orr	r1,r0,#UNDEFMODE|NOINT ;#UNDEFMODE|NOINT=0x1b|0xc0=1101 1011  r1=1111 1011 // 未定义指令模式
	msr	cpsr_cxsf,r1		;UndefMode
	ldr	sp,=UndefStack		; UndefStack=0x33FF_5C00

	orr	r1,r0,#ABORTMODE|NOINT
	msr	cpsr_cxsf,r1		;AbortMode
	ldr	sp,=AbortStack		; AbortStack=0x33FF_6000

	orr	r1,r0,#IRQMODE|NOINT
	msr	cpsr_cxsf,r1		;IRQMode
	ldr	sp,=IRQStack		; IRQStack=0x33FF_7000

	orr	r1,r0,#FIQMODE|NOINT
	msr	cpsr_cxsf,r1		;FIQMode
	ldr	sp,=FIQStack		; FIQStack=0x33FF_8000

	bic	r0,r0,#MODEMASK|NOINT
	orr	r1,r0,#SVCMODE
	msr	cpsr_cxsf,r1		;SVCMode
	ldr	sp,=SVCStack		; SVCStack=0x33FF_5800

	;USER mode has not be initialized.

	mov	pc,lr
	;The LR register will not be valid if the current mode is not SVC mode.
	
;===========================================================


;===========================================================

	LTORG

;GCS0->SST39VF1601
;GCS1->16c550
;GCS2->IDE
;GCS3->CS8900
;GCS4->DM9000
;GCS5->CF Card
;GCS6->SDRAM
;GCS7->unused

SMRDATA DATA
; Memory configuration should be optimized for best performance
; The following parameter is not optimized.
; Memory access cycle parameter strategy
; 1) The memory settings is  safe parameters even at HCLK=75Mhz.
; 2) SDRAM refresh period is for HCLK<=75Mhz.

	DCD (0+(B1_BWSCON<<4)+(B2_BWSCON<<8)+(B3_BWSCON<<12)+(B4_BWSCON<<16)+(B5_BWSCON<<20)+(B6_BWSCON<<24)+(B7_BWSCON<<28))
	DCD ((B0_Tacs<<13)+(B0_Tcos<<11)+(B0_Tacc<<8)+(B0_Tcoh<<6)+(B0_Tah<<4)+(B0_Tacp<<2)+(B0_PMC))   ;GCS0
	DCD ((B1_Tacs<<13)+(B1_Tcos<<11)+(B1_Tacc<<8)+(B1_Tcoh<<6)+(B1_Tah<<4)+(B1_Tacp<<2)+(B1_PMC))   ;GCS1
	DCD ((B2_Tacs<<13)+(B2_Tcos<<11)+(B2_Tacc<<8)+(B2_Tcoh<<6)+(B2_Tah<<4)+(B2_Tacp<<2)+(B2_PMC))   ;GCS2
	DCD ((B3_Tacs<<13)+(B3_Tcos<<11)+(B3_Tacc<<8)+(B3_Tcoh<<6)+(B3_Tah<<4)+(B3_Tacp<<2)+(B3_PMC))   ;GCS3
	DCD ((B4_Tacs<<13)+(B4_Tcos<<11)+(B4_Tacc<<8)+(B4_Tcoh<<6)+(B4_Tah<<4)+(B4_Tacp<<2)+(B4_PMC))   ;GCS4
	DCD ((B5_Tacs<<13)+(B5_Tcos<<11)+(B5_Tacc<<8)+(B5_Tcoh<<6)+(B5_Tah<<4)+(B5_Tacp<<2)+(B5_PMC))   ;GCS5
	DCD ((B6_MT<<15)+(B6_Trcd<<2)+(B6_SCAN))    ;GCS6
	DCD ((B7_MT<<15)+(B7_Trcd<<2)+(B7_SCAN))    ;GCS7
	DCD ((REFEN<<23)+(TREFMD<<22)+(Trp<<20)+(Tsrc<<18)+(Tchr<<16)+REFCNT)

	DCD 0x32	    ;SCLK power saving mode, BANKSIZE 128M/128M

	DCD 0x30	    ;MRSR6 CL=3clk
	DCD 0x30	    ;MRSR7 CL=3clk
	
BaseOfROM	DCD	|Image$$RO$$Base|
TopOfROM	DCD	|Image$$RO$$Limit|
BaseOfBSS	DCD	|Image$$RW$$Base|
BaseOfZero	DCD	|Image$$ZI$$Base|
EndOfBSS	DCD	|Image$$ZI$$Limit|

	ALIGN
	
;Function for entering power down mode
; 1. SDRAM should be in self-refresh mode.
; 2. All interrupt should be maksked for SDRAM/DRAM self-refresh.
; 3. LCD controller should be disabled for SDRAM/DRAM self-refresh.
; 4. The I-cache may have to be turned on.
; 5. The location of the following code may have not to be changed.

;void EnterPWDN(int CLKCON);
EnterPWDN
	mov r2,r0		;r2=rCLKCON
	tst r0,#0x8		;SLEEP mode?
	bne ENTER_SLEEP

ENTER_STOP
	ldr r0,=REFRESH
	ldr r3,[r0]		;r3=rREFRESH
	mov r1, r3
	orr r1, r1, #BIT_SELFREFRESH
	str r1, [r0]		;Enable SDRAM self-refresh

	mov r1,#16			;wait until self-refresh is issued. may not be needed.
0	subs r1,r1,#1
	bne %B0

	ldr r0,=CLKCON		;enter STOP mode.
	str r2,[r0]

	mov r1,#32
0	subs r1,r1,#1	;1) wait until the STOP mode is in effect.
	bne %B0		;2) Or wait here until the CPU&Peripherals will be turned-off
			;   Entering SLEEP mode, only the reset by wake-up is available.

	ldr r0,=REFRESH ;exit from SDRAM self refresh mode.
	str r3,[r0]

	MOV_PC_LR

ENTER_SLEEP
	;NOTE.
	;1) rGSTATUS3 should have the return address after wake-up from SLEEP mode.

	ldr r0,=REFRESH
	ldr r1,[r0]		;r1=rREFRESH
	orr r1, r1, #BIT_SELFREFRESH
	str r1, [r0]		;Enable SDRAM self-refresh

	mov r1,#16			;Wait until self-refresh is issued,which may not be needed.
0	subs r1,r1,#1
	bne %B0

	ldr	r1,=MISCCR
	ldr	r0,[r1]
	orr	r0,r0,#(7<<17)  ;Set SCLK0=0, SCLK1=0, SCKE=0.
	str	r0,[r1]

	ldr r0,=CLKCON		; Enter sleep mode
	str r2,[r0]

	b .			;CPU will die here.


WAKEUP_SLEEP
	;Release SCLKn after wake-up from the SLEEP mode.
	ldr	r1,=MISCCR
	ldr	r0,[r1]
	bic	r0,r0,#(7<<17)  ;SCLK0:0->SCLK, SCLK1:0->SCLK, SCKE:0->=SCKE.
	str	r0,[r1]

	;Set memory control registers
 	ldr	r0,=SMRDATA	;be careful! 
	ldr	r1,=BWSCON	;BWSCON Address
	add	r2, r0, #52	;End address of SMRDATA
0
	ldr	r3, [r0], #4
	str	r3, [r1], #4
	cmp	r2, r0
	bne	%B0

	mov r1,#256
0	subs r1,r1,#1	;1) wait until the SelfRefresh is released.
	bne %B0

	ldr r1,=GSTATUS3 	;GSTATUS3 has the start address just after SLEEP wake-up
	ldr r0,[r1]

	mov pc,r0
	
;=====================================================================
; Clock division test
; Assemble code, because VSYNC time is very short
;=====================================================================
	EXPORT CLKDIV124
	EXPORT CLKDIV144
	
CLKDIV124
	
	ldr     r0, = CLKDIVN
	ldr     r1, = 0x3		; 0x3 = 1:2:4
	str     r1, [r0]
;	wait until clock is stable
	nop
	nop
	nop
	nop
	nop

	ldr     r0, = REFRESH
	ldr     r1, [r0]
	bic		r1, r1, #0xff
	bic		r1, r1, #(0x7<<8)
	orr		r1, r1, #0x470	; REFCNT135
	str     r1, [r0]
	nop
	nop
	nop
	nop
	nop
	mov     pc, lr

CLKDIV144
	ldr     r0, = CLKDIVN
	ldr     r1, = 0x4		; 0x4 = 1:4:4
	str     r1, [r0]
;	wait until clock is stable
	nop
	nop
	nop
	nop
	nop

	ldr     r0, = REFRESH
	ldr     r1, [r0]
	bic		r1, r1, #0xff
	bic		r1, r1, #(0x7<<8)
	orr		r1, r1, #0x630	; REFCNT675 - 1520
	str     r1, [r0]
	nop
	nop
	nop
	nop
	nop
	mov     pc, lr


    	ALIGN    ;// ;边界对齐   

    	AREA RamData, DATA, READWRITE   ;//；段定义
;//;这里将中断异常向量建立在sdram中
;//；下面是对ram区域map的定义 

        ^   _ISR_STARTADDRESS   ;//;^ is a synonym for MAP.内存表的首地址
HandleReset 	#   4             ;# is a synonym for FIELD.
HandleUndef 	#   4
HandleSWI		#   4
HandlePabort    #   4
HandleDabort    #   4
HandleReserved  #   4
HandleIRQ		#   4
HandleFIQ		#   4

;Do not use the label 'IntVectorTable',
;The value of IntVectorTable is different with the address you think it may be.
;IntVectorTable
;@0x33FF_FF20
HandleEINT0		#   4
HandleEINT1		#   4
HandleEINT2		#   4
HandleEINT3		#   4
HandleEINT4_7	#   4
HandleEINT8_23	#   4
HandleCAM		#   4		; Added for 2440.
HandleBATFLT	#   4
HandleTICK		#   4
HandleWDT		#   4
HandleTIMER0 	#   4
HandleTIMER1 	#   4
HandleTIMER2 	#   4
HandleTIMER3 	#   4
HandleTIMER4 	#   4
HandleUART2  	#   4
;@0x33FF_FF60
HandleLCD 		#   4
HandleDMA0		#   4
HandleDMA1		#   4
HandleDMA2		#   4
HandleDMA3		#   4
HandleMMC		#   4
HandleSPI0		#   4
HandleUART1		#   4
HandleNFCON		#   4		; Added for 2440.
HandleUSBD		#   4
HandleUSBH		#   4
HandleIIC		#   4
HandleUART0 	#   4
HandleSPI1 		#   4
HandleRTC 		#   4
HandleADC 		#   4
;@0x33FF_FFA0
	END