以 imx6ull-14x14-evk.dts
源码进行分析,imx6ull-14x14-evk.dts
包含 imx6ull.dtsi
文件,imx6ull.dtsi
包含 skeleton.dtsi
文件。
一、源码分析
1、skeleton.dtsi
skeleton.dtsi
只包含设备树最基本节点,节点中没有任何数据。skeleton.dtsi
只为满足设备树基本要求。
/ {
#address-cells = <1>;
#size-cells = <1>;
chosen { };
aliases { };
memory { device_type = "memory"; reg = <0 0>; };
};
2、imx6ull.dtsi
imx6ull.dtsi
中包含 imx6ull
芯片相关的外设描述,可以用在不同的开发板上。imx6ull.dtsi
属于芯片级外设描述。
/ {
aliases {
can0 = &flexcan1;
can1 = &flexcan2;
ethernet0 = &fec1;
ethernet1 = &fec2;
gpio0 = &gpio1;
gpio1 = &gpio2;
gpio2 = &gpio3;
gpio3 = &gpio4;
gpio4 = &gpio5;
i2c0 = &i2c1;
i2c1 = &i2c2;
i2c2 = &i2c3;
i2c3 = &i2c4;
mmc0 = &usdhc1;
mmc1 = &usdhc2;
serial0 = &uart1;
serial1 = &uart2;
serial2 = &uart3;
serial3 = &uart4;
serial4 = &uart5;
serial5 = &uart6;
serial6 = &uart7;
serial7 = &uart8;
spi0 = &ecspi1;
spi1 = &ecspi2;
spi2 = &ecspi3;
spi3 = &ecspi4;
usbphy0 = &usbphy1;
usbphy1 = &usbphy2;
};
cpus {
cpu0: cpu@0 {
};
};
intc: interrupt-controller@00a01000 {
};
clocks {
ckil: clock@0 {
};
osc: clock@1 {
};
ipp_di0: clock@2 {
};
ipp_di1: clock@3 {
};
};
soc {
busfreq {
};
pmu {
};
caam_sm: caam-sm@00100000 {
};
irq_sec_vio: caam_secvio {
};
ocrams: sram@00900000 {
};
ocrams_ddr: sram@00904000 {
};
ocram: sram@00905000 {
};
dma_apbh: dma-apbh@01804000 {
};
gpmi: gpmi-nand@01806000{
};
aips1: aips-bus@02000000 {
spba-bus@02000000 {
spdif: spdif@02004000 {
};
ecspi1: ecspi@02008000 {
};
ecspi2: ecspi@0200c000 {
};
ecspi3: ecspi@02010000 {
};
ecspi4: ecspi@02014000 {
};
uart7: serial@02018000 {
};
uart1: serial@02020000 {
};
uart8: serial@02024000 {
};
sai1: sai@02028000 {
};
sai2: sai@0202c000 {
};
sai3: sai@02030000 {
};
asrc: asrc@02034000 {
};
};
tsc: tsc@02040000 {
};
bee: bee@02044000 {
};
pwm1: pwm@02080000 {
};
pwm2: pwm@02084000 {
};
pwm3: pwm@02088000 {
};
pwm4: pwm@0208c000 {
};
flexcan1: can@02090000 {
};
flexcan2: can@02094000 {
};
gpt1: gpt@02098000 {
};
gpio1: gpio@0209c000 {
};
gpio2: gpio@020a0000 {
};
gpio3: gpio@020a4000 {
};
gpio4: gpio@020a8000 {
};
gpio5: gpio@020ac000 {
};
snvslp: snvs@020b0000 {
};
fec2: ethernet@020b4000 {
};
kpp: kpp@020b8000 {
};
wdog1: wdog@020bc000 {
};
wdog2: wdog@020c0000 {
};
clks: ccm@020c4000 {
};
anatop: anatop@020c8000 {
reg_3p0: regulator-3p0@120 {
};
reg_arm: regulator-vddcore@140 {
};
reg_soc: regulator-vddsoc@140 {
};
};
usbphy1: usbphy@020c9000 {
};
usbphy2: usbphy@020ca000 {
};
tempmon: tempmon {
};
caam_snvs: caam-snvs@020cc000 {
};
snvs: snvs@020cc000 {
snvs_rtc: snvs-rtc-lp {
};
snvs_poweroff: snvs-poweroff {
};
snvs_pwrkey: snvs-powerkey {
};
};
epit1: epit@020d0000 {
};
epit2: epit@020d4000 {
};
src: src@020d8000 {
};
gpc: gpc@020dc000 {
};
iomuxc: iomuxc@020e0000 {
};
gpr: iomuxc-gpr@020e4000 {
};
mqs: mqs {
};
gpt2: gpt@020e8000 {
};
sdma: sdma@020ec000 {
};
pwm5: pwm@020f0000 {
};
pwm6: pwm@020f4000 {
};
pwm7: pwm@020f8000 {
};
pwm8: pwm@020fc000 {
};
};
aips2: aips-bus@02100000 {
crypto: caam@2140000 {
sec_jr0: jr0@1000 {
};
sec_jr1: jr1@2000 {
};
sec_jr2: jr2@3000 {
};
};
usbotg1: usb@02184000 {
};
usbotg2: usb@02184200 {
};
usbmisc: usbmisc@02184800 {
};
fec1: ethernet@02188000 {
};
sim1: sim@0218c000 {
};
usdhc1: usdhc@02190000 {
};
usdhc2: usdhc@02194000 {
};
adc1: adc@02198000 {
};
i2c1: i2c@021a0000 {
};
i2c2: i2c@021a4000 {
};
i2c3: i2c@021a8000 {
};
romcp@021ac000 {
};
mmdc: mmdc@021b0000 {
};
sim2: sim@021b4000 {
};
weim: weim@021b8000 {
};
ocotp: ocotp-ctrl@021bc000 {
};
csu: csu@021c0000 {
};
csi: csi@021c4000 {
};
lcdif: lcdif@021c8000 {
};
pxp: pxp@021cc000 {
};
qspi: qspi@021e0000 {
};
uart2: serial@021e8000 {
};
uart3: serial@021ec000 {
};
uart4: serial@021f0000 {
};
uart5: serial@021f4000 {
};
i2c4: i2c@021f8000 {
};
uart6: serial@021fc000 {
};
};
};
};
3、imx6ull-14x14-evk.dts
imx6ull-14x14-evk.dts
包含一些开发板上其他芯片设备的描述。imx6ull-14x14-evk.dts
是针对于板级外设描述。imx6ull-14x14-evk.dts
会根据需求对 imx6ull.dtsi
中一些节点进行覆盖会修改。
/dts-v1/;
/ {
chosen {
};
memory {
};
reserved-memory {
linux,cma {
};
};
backlight {
};
pxp_v4l2 {
};
regulators {
reg_can_3v3: regulator@0 {
};
reg_sd1_vmmc: regulator@1 {
};
reg_gpio_dvfs: regulator-gpio {
};
};
sound {
};
spi4 {
gpio_spi: gpio_spi@0 {
};
};
};
&cpu0 {
};
&clks {
};
&csi {
port {
csi1_ep: endpoint {
};
};
};
&fec1 {
};
&fec2 {
mdio {
ethphy0: ethernet-phy@2 {
};
ethphy1: ethernet-phy@1 {
};
};
};
&flexcan1 {
};
&flexcan2 {
};
&gpc {
};
&i2c1 {
mag3110@0e {
};
fxls8471@1e {
};
};
&i2c2 {
codec: wm8960@1a {
};
ov5640: ov5640@3c {
port {
};
};
};
};
&iomuxc {
imx6ul-evk {
pinctrl_hog_1: hoggrp-1 {
};
pinctrl_csi1: csi1grp {
};
pinctrl_enet1: enet1grp {
};
pinctrl_enet2: enet2grp {
};
pinctrl_flexcan1: flexcan1grp{
};
pinctrl_flexcan2: flexcan2grp{
};
pinctrl_i2c1: i2c1grp {
};
pinctrl_i2c2: i2c2grp {
};
pinctrl_lcdif_dat: lcdifdatgrp {
};
pinctrl_lcdif_ctrl: lcdifctrlgrp {
};
pinctrl_pwm1: pwm1grp {
};
pinctrl_qspi: qspigrp {
};
pinctrl_sai2: sai2grp {
};
pinctrl_tsc: tscgrp {
};
pinctrl_uart1: uart1grp {
};
pinctrl_uart2: uart2grp {
};
pinctrl_uart2dte: uart2dtegrp {
};
pinctrl_usdhc1: usdhc1grp {
};
pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
};
pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
};
pinctrl_usdhc2: usdhc2grp {
};
pinctrl_usdhc2_8bit: usdhc2grp_8bit {
};
pinctrl_usdhc2_8bit_100mhz: usdhc2grp_8bit_100mhz {
};
pinctrl_usdhc2_8bit_200mhz: usdhc2grp_8bit_200mhz {
};
pinctrl_wdog: wdoggrp {
};
};
};
&iomuxc_snvs {
imx6ul-evk {
pinctrl_hog_2: hoggrp-2 {
};
pinctrl_dvfs: dvfsgrp {
};
pinctrl_lcdif_reset: lcdifresetgrp {
};
pinctrl_spi4: spi4grp {
};
pinctrl_sai2_hp_det_b: sai2_hp_det_grp {
};
};
};
&lcdif {
display0: display {
};
};
&pwm1 {
};
&pxp {
};
&qspi {
flash0: n25q256a@0 {
};
};
&sai2 {
};
&tsc {
};
&uart1 {
};
&uart2 {
};
&usbotg1 {
};
&usbotg2 {
};
&usbphy1 {
};
&usbphy2 {
};
&usdhc1 {
};
&usdhc2 {
};
&wdog1 {
};
二、节点覆盖和追加
1、同一层次节点,后面节点覆盖前面节点
memory@30000000 {
device_type = "memory";
reg = <0x30000000 0x20000000>;
};
// 覆盖
memory@30000000 {
reg = <0x30000000 0x10000000>;
};
2、直接引用方式:属性相同,后面覆盖前面;属性不同就增加
xusbxti: oscillator@1 {
compatible = "fixed-clock";
reg = <1>;
clock-frequency = <0>;
clock-output-names = "xusbxti";
#clock-cells = <0>;
};
// 覆盖
&xusbxti {
clock-frequency = <24000000>;
};
// 追加
&xusbxti {
status = "okay";
};
以上内容只为说明逻辑,不一定符合设备树规范。
三、总结
skeleton.dtsi
描述设备树必须的节点。imx6ull.dtsi
描述 soc 级设备信息。imx6ull-14x14-evk.dts
描述板级设备信息。
imx6ull-14x14-evk.dts
文件对 skeleton.dtsi
和 imx6ull.dtsi
文件内容进行覆盖或追加。