/*
a0 = addr
t2 = *(addr)
t4 for right shift
*/
LEAF(print_reg)
li t0,UART0_BASE_ADDR
li t1,10
lw t2,0(a0)
li t4,32
1:
sub t4,4
move t3,t2
srl t3,t4
and t3,0xf
blt t3,t1,2f
add t3,48
add t3,39 //a = 10+39+48 =97
2:
sw t3,UART_TX(t0)
nop
nop
nop
nop
nop
nop
beqz t4,3f
nop
b 1f
nop
3:
j ra
nop
END(print_reg)
a0 = addr
t2 = *(addr)
t4 for right shift
*/
LEAF(print_reg)
li t0,UART0_BASE_ADDR
li t1,10
lw t2,0(a0)
li t4,32
1:
sub t4,4
move t3,t2
srl t3,t4
and t3,0xf
blt t3,t1,2f
add t3,48
add t3,39 //a = 10+39+48 =97
2:
sw t3,UART_TX(t0)
nop
nop
nop
nop
nop
nop
beqz t4,3f
nop
b 1f
nop
3:
j ra
nop
END(print_reg)