STM32---NRF24L01（临时代码）

#include<stm32f10x.h>
#define NRF_READ_REG    0x00  	// ¶Á¼Ä´æÆ÷Ö¸Áî
#define NRF_WRITE_REG   0x20 	// д¼Ä´æÆ÷Ö¸Áî
#define ACTIVATE		0x50  	// follow with 0x73 to activate feature register
#define R_RX_PL_WID   	0x60	// ¶Á½ÓÊÕ»º³åÇøµÄ³¤¶È
#define RD_RX_PLOAD     0x61  	// ¶ÁÈ¡½ÓÊÕÊý¾ÝÖ¸Áî
#define WR_TX_PLOAD     0xA0  	// д´ý·¢Êý¾ÝÖ¸Áî
#define W_ACK_PAYLOAD	0xA8	// Used in RX mode.
#define FLUSH_TX        0xE1 	// ³åÏ´·¢ËÍ FIFOÖ¸Áî
#define FLUSH_RX        0xE2  	// ³åÏ´½ÓÊÕ FIFOÖ¸Áî
#define REUSE_TX_PL     0xE3  	// ¶¨ÒåÖظ´×°ÔØÊý¾ÝÖ¸Áî
#define NOP             0xFF  	// ±£Áô
/******************************************************************************
							NRF24L01¼Ä´æÆ÷µØÖ·
*******************************************************************************/ 
#define CONFIG          0x00  	// ÅäÖÃÊÕ·¢×´Ì¬£¬CRCУÑéģʽÒÔ¼°ÊÕ·¢×´Ì¬ÏìÓ¦·½Ê½
#define EN_AA           0x01  	// ×Ô¶¯Ó¦´ð¹¦ÄÜÉèÖÃ
#define EN_RXADDR       0x02  	// ¿ÉÓÃÐŵÀÉèÖÃ
#define SETUP_AW        0x03  	// ÊÕ·¢µØÖ·¿í¶ÈÉèÖÃ
#define SETUP_RETR      0x04  	// ×Ô¶¯ÖØ·¢¹¦ÄÜÉèÖÃ
#define RF_CH           0x05  	// ¹¤×÷ƵÂÊÉèÖÃ
#define RF_SETUP        0x06  	// ·¢ÉäËÙÂÊ¡¢¹¦ºÄ¹¦ÄÜÉèÖÃ
#define NRFRegSTATUS    0x07  	// ״̬¼Ä´æÆ÷
#define OBSERVE_TX      0x08  	// ·¢Ëͼà²â¹¦ÄÜ
#define CD              0x09  	// µØÖ·¼ì²â           
#define RX_ADDR_P0      0x0A  	// ƵµÀ0½ÓÊÕÊý¾ÝµØÖ·
#define RX_ADDR_P1      0x0B  	// ƵµÀ1½ÓÊÕÊý¾ÝµØÖ·
#define RX_ADDR_P2      0x0C  	// ƵµÀ2½ÓÊÕÊý¾ÝµØÖ·
#define RX_ADDR_P3      0x0D  	// ƵµÀ3½ÓÊÕÊý¾ÝµØÖ·
#define RX_ADDR_P4      0x0E  	// ƵµÀ4½ÓÊÕÊý¾ÝµØÖ·
#define RX_ADDR_P5      0x0F  	// ƵµÀ5½ÓÊÕÊý¾ÝµØÖ·
#define TX_ADDR         0x10  	// ·¢Ë͵ØÖ·¼Ä´æÆ÷
#define RX_PW_P0        0x11  	// ½ÓÊÕƵµÀ0½ÓÊÕÊý¾Ý³¤¶È
#define RX_PW_P1        0x12  	// ½ÓÊÕƵµÀ1½ÓÊÕÊý¾Ý³¤¶È
#define RX_PW_P2        0x13  	// ½ÓÊÕƵµÀ2½ÓÊÕÊý¾Ý³¤¶È
#define RX_PW_P3        0x14  	// ½ÓÊÕƵµÀ3½ÓÊÕÊý¾Ý³¤¶È
#define RX_PW_P4        0x15  	// ½ÓÊÕƵµÀ4½ÓÊÕÊý¾Ý³¤¶È
#define RX_PW_P5        0x16  	// ½ÓÊÕƵµÀ5½ÓÊÕÊý¾Ý³¤¶È
#define FIFO_STATUS     0x17  	// FIFOÕ»ÈëÕ»³ö״̬¼Ä´æÆ÷ÉèÖÃ

#define DYNPD    		0x1C  	// per pipe DPL control 
#define FEATURE    		0x1D  	// ¡°Feature¡± register address 

#define NRF_CE_GPIO GPIOB
#define NRF_CE_Pin GPIO_Pin_2

#define NRF_CSN_GPIO GPIOA
#define NRF_CSN_Pin  GPIO_Pin_4

#define NRF_IRQ_GPIO GPIOB
#define NRF_IRQ_Pin  GPIO_Pin_0

#define NRF_CE_H  NRF_CE_GPIO->BSRR = NRF_CE_Pin
#define NRF_CE_L	NRF_CE_GPIO->BRR  = NRF_CE_Pin

#define NRF_CSN_H NRF_CSN_GPIO->BSRR = NRF_CSN_Pin
#define NRF_CSN_L NRF_CSN_GPIO->BRR  = NRF_CSN_Pin

#define NRF_IRQ_Read	NRF_IRQ_GPIO->IDR & NRF_IRQ_Pin

char a_temp;
void PrintString(char *a)
{
	while(*a != '\0')
	{
		a_temp = (char)*a ;
		a++;
		USART_ITConfig(USART1,USART_IT_TXE,ENABLE);
	}
}

void SPI1_Init(void)
{
	SPI_InitTypeDef SPI_InitStructure; 
	GPIO_InitTypeDef GPIO_InitStructure;
	
	RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE);
	RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB, ENABLE);
	RCC_APB2PeriphClockCmd(RCC_APB2Periph_SPI1, ENABLE);
	//ÅäÖÃSCK,MISO,MOSIÒý½Å  
	GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5|GPIO_Pin_6|GPIO_Pin_7; 
	GPIO_InitStructure.GPIO_Speed = GPIO_Speed_10MHz; 
	GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; //ÍÆÍ츴ÓÃ
	GPIO_Init(GPIOA, &GPIO_InitStructure);
	//ÅäÖÃCEÒý½Å
	GPIO_InitStructure.GPIO_Pin = NRF_CE_Pin; 
	GPIO_InitStructure.GPIO_Speed = GPIO_Speed_10MHz; 
	GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP; //ÍÆÍìÊä³ö
	GPIO_Init(NRF_CE_GPIO, &GPIO_InitStructure);
	//ÅäÖÃCSNÒý½Å
	GPIO_InitStructure.GPIO_Pin = NRF_CSN_Pin; 
	GPIO_InitStructure.GPIO_Speed = GPIO_Speed_10MHz; 
	GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP; //ÍÆÍìÊä³ö
	GPIO_Init(NRF_CSN_GPIO, &GPIO_InitStructure);	
	//ÅäÖÃIRQÒý½Å
	GPIO_InitStructure.GPIO_Pin = NRF_IRQ_Pin; 
	GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; 
	GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPU; //ÉÏÀ­ÊäÈë
	GPIO_Init(NRF_IRQ_GPIO, &GPIO_InitStructure);	
	NRF_CSN_H;	//½ûÖ¹NRFÆ÷¼þ
	SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex; //Ë«ÏßÈ«Ë«¹¤ 
	SPI_InitStructure.SPI_Mode = SPI_Mode_Master; //Ö÷ģʽ 
	SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b; //Êý¾Ý´óС8λ 
	SPI_InitStructure.SPI_CPOL = SPI_CPOL_Low; //ʱÖÓ¼«ÐÔ£¬¿ÕÏÐʱΪµÍ 
	SPI_InitStructure.SPI_CPHA = SPI_CPHA_1Edge; //µÚ1¸ö±ßÑØÓÐЧ£¬ÉÏÉýÑØΪ²ÉÑùʱ¿Ì 
	SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;  //NSSÐźÅÓÉÈí¼þ²úÉú 
	SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_8; //8·ÖƵ£¬9MHz 
	SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB; //¸ßλÔÚÇ° 
	SPI_InitStructure.SPI_CRCPolynomial = 7; 
	SPI_Init(SPI1, &SPI_InitStructure); 
	   
	SPI_Cmd(SPI1, ENABLE);//ʹÄÜ SPI1
	
	PrintString("\r\n SPI1 ³õʼ»¯Íê³É£¡");
}

uint8_t SPI_RW(uint8_t data)
{
	while(SPI_I2S_GetFlagStatus(SPI1,SPI_I2S_FLAG_TXE) == RESET);
	SPI_I2S_SendData(SPI1,data);
	while(SPI_I2S_GetFlagStatus(SPI1,SPI_I2S_FLAG_RXNE) == RESET);
	return SPI_I2S_ReceiveData(SPI1);
}

uint8_t NRF_Write_Reg(uint8_t reg,uint8_t value)
{
	uint8_t status;
	NRF_CSN_L;
	status = SPI_RW(reg);
	SPI_RW(value);
	NRF_CSN_H;
	return status;
}

uint8_t NRF_Read_Reg(uint8_t reg)
{
	uint8_t reg_val;
	NRF_CSN_L;
	SPI_RW(reg);
	reg_val = SPI_RW(0);
	NRF_CSN_H;
	return reg_val;
}

uint8_t NRF_Write_Buf(uint8_t reg,uint8_t *pBuf,uint8_t uchars)
{
	uint8_t i;
	uint8_t status;
	NRF_CSN_L;
	status = SPI_RW(reg);
	for(i=0;i<uchars;i++)
	{
		SPI_RW(pBuf[i]);
	}
	NRF_CSN_H;
	return status;
}

uint8_t NRF_Read_Buff(uint8_t reg,uint8_t *pBuf,uint8_t uchars)
{
	uint8_t i;
	uint8_t  status;
	NRF_CSN_L;
	status = SPI_RW(reg);
	for(i=0;i<uchars;i++)
	{
			pBuf[i] = SPI_RW(0);
	}
	NRF_CSN_H;
	return status;
}

uint8_t NRF24L01_RXDATA[32];
uint8_t NRF34L01_TXDATA[32];
static uint8_t TX_ADDRESS[5] = {0X1A,0X3B,0X5C,0X7D,0X9E};
static uint8_t RX_ADDRESS[5] = {0X1A,0X3B,0X5C,0X7D,0X9E};
#define TX 1
#define RX 2
void NRF24L01_Init(uint8_t Chanal,uint8_t Mode)
{
	NRF_CE_L;
	NRF_Write_Reg(FLUSH_TX,0xff);
	NRF_Write_Reg(FLUSH_RX,0xff);
	NRF_Write_Buf(NRF_WRITE_REG + TX_ADDR, TX_ADDRESS,5);
	NRF_Write_Buf(NRF_WRITE_REG + RX_ADDR_P0,RX_ADDRESS,5);
	
	NRF_Write_Reg(NRF_WRITE_REG + EN_AA, 0X01);
	NRF_Write_Reg(NRF_WRITE_REG + EN_RXADDR, 0X01);
	NRF_Write_Reg(NRF_WRITE_REG + SETUP_RETR,0X1A);
	
	NRF_Write_Reg(NRF_WRITE_REG + RF_CH, Chanal);
	NRF_Write_Reg(NRF_WRITE_REG + RX_PW_P0, 32);
	NRF_Write_Reg(NRF_WRITE_REG + RF_SETUP,0X0F);
	
	if(Mode == TX)
		NRF_Write_Reg(NRF_WRITE_REG + CONFIG,0X0E);
	else if(Mode == RX)
		NRF_Write_Reg(NRF_WRITE_REG + CONFIG, 0X0F);
	NRF_CE_H;
}


void uart_init()
{
	GPIO_InitTypeDef gpio_usart;
	USART_InitTypeDef usart;
	RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_USART1,ENABLE);

	gpio_usart.GPIO_Pin = GPIO_Pin_9;
	gpio_usart.GPIO_Speed = GPIO_Speed_50MHz;
	gpio_usart.GPIO_Mode = GPIO_Mode_AF_PP;
	GPIO_Init(GPIOA,&gpio_usart);
	
	gpio_usart.GPIO_Pin = GPIO_Pin_10;
	gpio_usart.GPIO_Speed = GPIO_Speed_50MHz;
	gpio_usart.GPIO_Mode = GPIO_Mode_IN_FLOATING;
	GPIO_Init(GPIOA,&gpio_usart);
	
	usart.USART_BaudRate = 115200;
	usart.USART_WordLength = USART_WordLength_8b;
	usart.USART_StopBits = USART_StopBits_1;
	usart.USART_Parity = USART_Parity_No;
	usart.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
	usart.USART_Mode = USART_Mode_Tx;
	USART_Init(USART1,&usart);
	
	USART_Cmd(USART1,ENABLE);
	USART_ClearFlag(USART1,USART_FLAG_TC);
}

void nvic_init()
{
	NVIC_InitTypeDef nvic;
	NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);
	nvic.NVIC_IRQChannel = USART1_IRQn;
	nvic.NVIC_IRQChannelPreemptionPriority = 0;
	nvic.NVIC_IRQChannelSubPriority= 0;
	nvic.NVIC_IRQChannelCmd = ENABLE;
	NVIC_Init(&nvic);
}


void NRF24L01_Check(void)
{
	uint8_t buf[5];
	uint8_t i;
	
	NRF_Write_Buf(NRF_WRITE_REG + TX_ADDR,TX_ADDRESS,5);
	NRF_Read_Buff(TX_ADDR,buf,5);
	
	for(i=0;i<5;i++)
	{
		if(buf[i] != TX_ADDRESS[i])
		break;
	}
	if(i == 5)
		PrintString("\r\nNRF24L01 SUCCESS!");
	else
		PrintString("\r\nNRF24L01 ERROR!");
}


#define RX_DR 6
#define TX_DS 5
#define MAX_RT 4
#define TX_FULL 0 

static void NRF24L01_Set_TX(void)
{
	NRF_CE_L;
	NRF_Write_Reg(NRF_WRITE_REG + CONFIG,0x0E);//·¢ËÍ
	NRF_CE_H;
}

static void NRF24L01_Set_RX(void)
{
	NRF_CE_L;
	NRF_Write_Reg(NRF_WRITE_REG + CONFIG,0x0F);//½ÓÊÕ
	NRF_CE_H;
}

void NRF_Send_TX(uint8_t *tx_buf, uint8_t len)
{
	NRF24L01_Set_TX();
	NRF_Write_Buf(WR_TX_PLOAD,tx_buf,len);
	NRF_CE_H;
	while(NRF_IRQ_Read);
	uint8_t status = NRF_Read_Reg(NRF_READ_REG + NRFRegSTATUS);
	NRF_Write_Reg(NRF_WRITE_REG + NRFRegSTATUS,status);
	if(status & (1<< TX_FULL))
	{
		if(status & (1 << TX_FULL))
		{
			NRF_Write_Reg(FLUSH_TX,0xff);
		}
	}
	if(status & (1 << TX_DS))
	{
		NRF24L01_Set_RX();
	}
}
static uint8_t data[32] = {'$','M','>'};
static void Delay(uint16_t n)
{
	uint16_t i,j;
	for(i=0 ; i<n;i++)
	for(j=0;j<8500;j++);
}
int main()
{
	Delay(5000);
	uart_init();
	nvic_init();
	SPI1_Init();
	NRF24L01_Init(40,TX);
	NRF24L01_Check();
	while(1)
	{
		PrintString("\r\ning");
		NRF_Send_TX(data,32);
		Delay(1000);
	}
}
void USART1_IRQHandler(void)
{
	if(USART1->SR & USART_SR_TC)
	{
		USART1->DR = a_temp;
		while(USART_GetFlagStatus(USART1,USART_FLAG_TXE) == RESET);  
		USART1->CR1 &= ~USART_CR1_TXEIE;
	}
}