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转载 Oops信息及栈回溯

http://blog.chinaunix.net/uid-14753126-id-2980100.html1. Oops信息来源及格式Oops这个单词含义为“惊讶”,当内核出错时(比如访问非法地址)打印出来的信息被称为Oops信息。Oops信息包含以下几部分内容:(1)一段文本描述信息。      比如类似“Unable to handle kernel NULL point

2013-10-17 18:58:27 1306

原创 内核中的 dev_emerg/dev_alert/dev_crit/dev_err/dev_warn/dev_notice/_dev_info

本文基于 android 3.4.5 kernel。在 drivers/base/core.c#define define_dev_printk_level(func, kern_level)  \int func(const struct device *dev, const char *fmt, ...) \{        \ struct va_format vaf;

2013-10-16 20:24:56 13149

原创 CONFIG_DEBUG_USER

关于CONFIG_DEBUG_USER把menuconfig中查到的 CONFIG_DEBUG_USER 信息copy在下面:  | CONFIG_DEBUG_USER:  |  | When a user program crashes due to an exception, the kernel can  | print a brief message explainin

2013-10-16 13:28:05 4418

ARM® Architecture Reference Manual ARMv7-A and ARMv7-R edition

ARM® Architecture Reference Manual ARMv7-A and ARMv7-R edition

2018-06-15

Bare-metal Boot Code for ARMv8-A Processors

Hardware verification engineers often run bare-metal tests to verify core-related function in a System on Chip (SoC). However, it can be challenging to write boot code for a bare-metal system, without a basic understanding of software development on the ARM architecture. This application note provides code examples for the following important operations that are involved in booting a bare-metal system: • Initializing exceptions. • Initializing registers. • Configuring the MMU and caches. • Enabling NEON and Floating Point. • Changing Exception levels. The code examples are written with the GNU assembly grammar and are tested on the Cortex-A53, Cortex-A72, and Cortex-A73 processors. They also apply to other ARMv8-A processors.

2018-05-29

ARM Generic Interrupt Controller Architecture Specification (3.0 & 4.0)

ARM Generic Interrupt Controller Architecture Specification (GIC architecture version 3.0 and version 4.0)

2018-05-04

KBUILD系统原理分析.pdf

从别的地方下载的一份文档,详细讲述了内核Kbuild机制,值得一看

2012-09-27

linux进程管理之可执行文件的加载和运行.pdf

linux进程管理之可执行文件的加载和运行

2011-10-31

Brief Introduction to MIPS32 Shadow Registers

Brief Introduction to MIPS32 Core Shadow Registers for Microcontroller Applications

2011-10-10

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