三段式状态机
在用三段式状态机写滞环比较器时遇到如下问题:
always @(posedge CLK_50M or negedge RST_N) begin
state <= next_state;
end
always @(posedge CLK_50M or negedge RST_N) begin
case(state)
IDLE: next_state <= CALCULATIE;
CALCULATIE:
next_state <= change_flag ? CONTROL : CALCULATIE;
CONTROL:
next_state <= control_over ? CALCULATIE : CONTROL;
default:
next_state <= IDLE;
endcase
end
在仿真中显示,当change_flag为0时,next_state依然被改变。
删除三段式状态机转为两段式解决问题
always @(posedge CLK_50M or negedge RST_N) begin
case(state)
IDLE: state<= CALCULATIE;
CALCULATIE:
state <= change_flag ? CONTROL : CALCULATIE;
CONTROL:
state <= control_over ? CALCULATIE : CONTROL;
default:
state<= IDLE;
endcase
end