task switch | ||||||||||
context switch | ||||||||||
hardware context | ||||||||||
switch_to Macro | ||||||||||
#define switch_to(prev,next,last) do { | / | |||||||||
unsigned long esi,edi; | / | |||||||||
asm volatile("pushfl/n/t" | / | |||||||||
"pushl %%ebp/n/t" | / | |||||||||
"movl %%esp,%0/n/t" | /* save ESP */ | / | ||||||||
"movl %5,%%esp/n/t" | /* restore ESP */ | / | ||||||||
"movl $1f,%1/n/t" | /* save EIP */ | / | ||||||||
"pushl %6/n/t" | /* restore EIP */ | / | ||||||||
"jmp __switch_to/n" | / | |||||||||
"1:/t" | / | |||||||||
"popl %%ebp/n/t" | / | |||||||||
"popfl" | / | |||||||||
:"=m" (prev->thread.esp),"=m" (prev->thread.eip), | / | |||||||||
"=a" (last),"=S" (esi),"=D" (edi) | / | |||||||||
:"m" (next->thread.esp),"m" (next->thread.eip), | / | |||||||||
"2" (prev), "d" (next)); | / | |||||||||
} while (0) | ||||||||||
1. movl prev, %eax | ||||||||||
movl next, %edx | ||||||||||
2. pushfl | ||||||||||
pushl %ebp | ||||||||||
3,movl %esp,484(%eax) | //prev->thread.esp | |||||||||
4,movl 484(%edx), %esp | //next->thread.esp | |||||||||
5,movl $1f, 480(%eax) | //prev->thread.eip | |||||||||
6,pushl 480(%edx) | //next->thread.eip | |||||||||
7,jmp _ _switch_to | ||||||||||
8. 1: | ||||||||||
popl %ebp | ||||||||||
popfl | ||||||||||
9,movl %eax, last | ||||||||||
_ _switch_to ( ) | ||||||||||
_ _switch_to(struct task_struct *prev_p, | ||||||||||
struct task_struct *next_p) | ||||||||||
_ _attribute_ _(regparm(3)); | ||||||||||
_ _unlazy_fpu( ) macro,save the contents of the FPU, MMX, and XMM registers of the prev_p process. | ||||||||||
smp_processor_id( ) macro to get the index of the local CPU | ||||||||||
Loads next_p->thread.esp0 in the esp0 field of the TSS relative to the local CPU | ||||||||||
Loads in the Global Descriptor Table of the local CPU the Thread-Local Storage (TLS) segments used by the next_p process | ||||||||||
Stores the contents of the fs and gs segmentation registers in prev_p->thread.fs and prev_p->thread.gs | ||||||||||
load fs or the gs segmentation register | ||||||||||
Loads six of the dr0,..., dr7 debug registers | ||||||||||
Updates the I/O bitmap in the TSS | ||||||||||
Terminates | ||||||||||
FPU:arithmetic floating-point unit | ||||||||||
floating-point registers belongs to hardware context | ESCAPE | |||||||||
MMX instructions act on the floating-point registers of the FPU | ||||||||||
SIMD: | single-instruction multiple-data | |||||||||
SSE extensions | Streaming SIMD Extensions | Pentium III | ||||||||
XMM registers | ||||||||||
SSE2 extensions | Pentium 4 | |||||||||
TS (Task-Switching) flag in the cr0 register |
Understanding the linux kernel-ch3-Process Switch
最新推荐文章于 2023-09-19 09:55:36 发布