cpu之Memory_Writeback

最新推荐文章于 2024-02-07 09:29:48 发布

coolsunxu

最新推荐文章于 2024-02-07 09:29:48 发布

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分类专栏： Verilog CPU 文章标签： cpu

本文链接：https://blog.csdn.net/coolsunxu/article/details/78833445

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module Memory_Writeback(
	input wire clk,
	input wire RegWriteM,
	input wire[4:0] WriteRegM,
	input wire[31:0] ResultM,
	
	input wire Memory_sucess,
	
	output reg Write_sucess,
	
	output reg RegWriteW,
	output reg[4:0] WriteRegW,
	output reg[31:0] ResultW
	
);

always @(posedge clk) begin
	if (Memory_sucess==1'b0) begin
	 	WriteRegW <= 5'b00000;
	end else begin
		WriteRegW <=WriteRegM;
	end
	
	 RegWriteW <=RegWriteM;
	 ResultW <=ResultM;
	 Write_sucess <= Memory_sucess;
end

endmodule