AT9G45的pwm驱动有问题,快来解救小弟.

最新推荐文章于 2022-09-10 16:18:48 发布
最新推荐文章于 2022-09-10 16:18:48 发布
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分类专栏： linux高级编程 Linux Driver AT91SAM9G45 文章标签： alignment struct div module function file
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在使用AT9G45芯片进行PWM驱动时遇到了困难，文章主要聚焦于头文件的内容，探讨可能存在的struct对齐问题、div模块功能、function调用以及file的相关错误，寻求解决方案。
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 AT9G45的pwm,头文件

#ifndef AT91_PWM_H
#define AT91_PWM_H

#define PWMC_BASE 0xfffb8000

/****************  pwm模式寄存器偏移0x00  *****************/
#define PWM_MR_OFF              0x00000000    ///< PWM Mode Register offset.
#define PWM_MR     (*((volatile unsigned long *)(PWMC_BASE + PWM_MR_OFF))) ///< PWM Mode Register.
#define PWM_MR_DIVA_MASK        0x000000FF    ///< PWM Mode Divide factor A Mask.
#define PWM_MR_DIVA_SHIFT       0             ///< PWM Mode Divide factor A LSB.
#define PWM_MR_DIVB_MASK        0x00FF0000    ///< PWM Mode Divide factor B Mask.
#define PWM_MR_DIVB_SHIFT       16            ///< PWM Mode Divide factor B LSB.

#define PWM_MR_PREA_MASK        0x00000F00    ///< PWM Mode prescaler A Mask.
#define PWM_MR_PREA_SHIFT       8             ///< PWM Mode prescaler A LSB.
#define PWM_MR_PREB_MASK        0x0F000000    ///< PWM Mode prescaler B Mask.
#define PWM_MR_PREB_SHIFT       24            ///< PWM Mode prescaler B LSB.

#define PWM_MR_PRE_MCK          0             ///< PWM Mode prescaler set to MCK.
#define PWM_MR_PRE_MCK_DIV2     1             ///< PWM Mode prescaler set to MCK/2.
#define PWM_MR_PRE_MCK_DIV4     2             ///< PWM Mode prescaler set to MCK/4.
#define PWM_MR_PRE_MCK_DIV8     3             ///< PWM Mode prescaler set to MCK/8.
#define PWM_MR_PRE_MCK_DIV16    4             ///< PWM Mode prescaler set to MCK/16.
#define PWM_MR_PRE_MCK_DIV32    5             ///< PWM Mode prescaler set to MCK/32.
#define PWM_MR_PRE_MCK_DIV64    6             ///< PWM Mode prescaler set to MCK/64.
#define PWM_MR_PRE_MCK_DIV128   7             ///< PWM Mode prescaler set to MCK/128.
#define PWM_MR_PRE_MCK_DIV256   8             ///< PWM Mode prescaler set to MCK/256.
#define PWM_MR_PRE_MCK_DIV512   9             ///< PWM Mode prescaler set to MCK/512.
#define PWM_MR_PRE_MCK_DIV1024  10            ///< PWM Mode prescaler set to MCK/1024.

#define PWM_CHID_MASK           0x0000000F
#define PWM_CHID0               0
#define PWM_CHID1               1
#define PWM_CHID2               2
#define PWM_CHID3               3

/***********************  pwm使能寄存器偏移0x04  *****************/
#define PWM_ENA_OFF             0x00000004    ///< PWM Enable Register offset.
#define PWM_ENA     (*((volatile unsigned long *)(PWMC_BASE + PWM_ENA_OFF))) ///< PWM Enable Register.


/***********************  pwm去使能寄存器0x08  *****************/
#define PWM_DIS_OFF             0x00000008    ///< PWM Disable Register offset.
#define PWM_DIS     (*((volatile unsigned long *)(PWMC_BASE + PWM_DIS_OFF))) ///< PWM Disable Register.

/*********************  pwm状态寄存器0x0C  *****************/
#define PWM_SR_OFF              0x0000000C    ///< PWM Status Register offset.
#define PWM_SR      (*((volatile unsigned long *)(PWMC_BASE + PWM_SR_OFF)))  ///< PWM Status Register.

/**********************  pwm中断使能寄存器0x10 *****************/
#define PWM_IER_OFF             0x00000010    ///< PWM Interrupt Enable Register offset.
#define PWM_IER     (*((volatile unsigned long *)(PWMC_BASE + PWM_IER_OFF))) ///< PWM Interrupt Enable Register.

/**********************  pwm中断去使能寄存器0x14  *****************/
#define PWM_IDR_OFF             0x00000014    ///< PWM Interrupt Disable Register offset.
#define PWM_IDR     (*((volatile unsigned long *)(PWMC_BASE + PWM_IDR_OFF))) ///< PWM Interrupt Disable Register.


/**********************  pwm中断掩码寄存器0x18  *****************/
#define PWM_IMR_OFF             0x00000018    ///< PWM Interrupt Mask Register offset.
#define PWM_IMR     (*((volatile unsigned long *)(PWMC_BASE + PWM_IMR_OFF))) ///< PWM Interrupt Mask Register.

/**********************  pwm中断状态寄存器0x1c  *****************/
#define PWM_ISR_OFF             0x0000001C    ///< PWM Interrupt Status Register offset.
#define PWM_ISR     (*((volatile unsigned long *)(PWMC_BASE + PWM_ISR_OFF))) ///< PWM Interrupt Status Register.

/**********************  pwm通道模式寄存器 0x200+ch_num*0x20+0x00  *****************/
#define PWM_CH0_OFF             0x00000200    ///< PWM Channel 0 registers offset.
#define PWM_CH1_OFF             0x00000220    ///< PWM Channel 1 registers offset.
#define PWM_CH2_OFF             0x00000240    ///< PWM Channel 2 registers offset.
#define PWM_CH3_OFF             0x00000260    ///< PWM Channel 3 registers offset.

#define PWM_CMR_OFF             0x00000000    ///< PWM Channel Mode Register offset.
#define PWM_CMR0    (*((volatile unsigned long *)(PWMC_BASE + PWM_CMR_OFF + PWM_CH0_OFF))) ///< PWM Channel 0 Mode Register.
#define PWM_CMR1    (*((volatile unsigned long *)(PWMC_BASE + PWM_CMR_OFF + PWM_CH1_OFF))) ///< PWM Channel 1 Mode Register.
#define PWM_CMR2    (*((volatile unsigned long *)(PWMC_BASE + PWM_CMR_OFF + PWM_CH2_OFF))) ///< PWM Channel 2 Mode Register.
#define PWM_CMR3    (*((volatile unsigned long *)(PWMC_BASE + PWM_CMR_OFF + PWM_CH3_OFF))) ///< PWM Channel 3 Mode Register.



#define PWM_CPRE_MCK_MASK       0x0000000F    ///< PWM Mode prescaler mask.
#define PWM_CPRE_MCK            0             ///< PWM Mode prescaler set to MCK.
#define PWM_CPRE_MCK_DIV2       1             ///< PWM Mode prescaler set to MCK/2.
#define PWM_CPRE_MCK_DIV4       2             ///< PWM Mode prescaler set to MCK/4.
#define PWM_CPRE_MCK_DIV8       3             ///< PWM Mode prescaler set to MCK/8.
#define PWM_CPRE_MCK_DIV16      4             ///< PWM Mode prescaler set to MCK/16.
#define PWM_CPRE_MCK_DIV32      5             ///< PWM Mode prescaler set to MCK/32.
#define PWM_CPRE_MCK_DIV64      6             ///< PWM Mode prescaler set to MCK/64.
#define PWM_CPRE_MCK_DIV128     7             ///< PWM Mode prescaler set to MCK/128.
#define PWM_CPRE_MCK_DIV256     8             ///< PWM Mode prescaler set to MCK/256.
#define PWM_CPRE_MCK_DIV512     9             ///< PWM Mode prescaler set to MCK/512.
#define PWM_CPRE_MCK_DIV1024    10            ///< PWM Mode prescaler set to MCK/1024.
#define PWM_CPRE_CLKA           11            ///< PWM Mode prescaler set to CLKA.
#define PWM_CPRE_CLKB           12            ///< PWM Mode prescaler set to CLKB.
#define 	AT91C_PWMC_CPRE_MCKB                 0xC /**< (PWMC_CH)  */ 
#define PWM_CALG                8             ///< PWM Mode channel alignment.
#define PWM_CPOL                9             ///< PWM Mode channel polarity.
#define PWM_CPD                 10            ///< PWM Mode channel update period.


#define PWM_CDTY_OFF            0x00000004    ///< PWM Channel Duty Cycle Register offset.
#define PWM_CDTY0   (*((volatile unsigned long *)(PWMC_BASE + PWM_CDTY_OFF + PWM_CH0_OFF))) ///< PWM Channel 0 Duty Cycle Register.
#define PWM_CDTY1   (*((volatile unsigned long *)(PWMC_BASE + PWM_CDTY_OFF + PWM_CH1_OFF))) ///< PWM Channel 1 Duty Cycle Register.
#define PWM_CDTY2   (*((volatile unsigned long *)(PWMC_BASE + PWM_CDTY_OFF + PWM_CH2_OFF))) ///< PWM Channel 2 Duty Cycle Register.
#define PWM_CDTY3   (*((volatile unsigned long *)(PWMC_BASE + PWM_CDTY_OFF + PWM_CH3_OFF))) ///< PWM Channel 3 Duty Cycle Register.

#define PWM_CPRD_OFF            0x00000008    ///< PWM Channel Period Register offset.
#define PWM_CPRD0   (*((volatile unsigned long *)(PWMC_BASE + PWM_CPRD_OFF + PWM_CH0_OFF))) ///< PWM Channel 0 Period Register.
#define PWM_CPRD1   (*((volatile unsigned long *)(PWMC_BASE + PWM_CPRD_OFF + PWM_CH1_OFF))) ///< PWM Channel 1 Period Register.
#define PWM_CPRD2   (*((volatile unsigned long *)(PWMC_BASE + PWM_CPRD_OFF + PWM_CH2_OFF))) ///< PWM Channel 2 Period Register.
#define PWM_CPRD3   (*((volatile unsigned long *)(PWMC_BASE + PWM_CPRD_OFF + PWM_CH3_OFF))) ///< PWM Channel 3 Period Register.

#define PWM_CCNT_OFF            0x0000000C    ///< PWM Channel Counter Register offset.
#define PWM_CCNT0   (*((volatile unsigned long *)(PWMC_BASE + PWM_CCNT_OFF + PWM_CH0_OFF))) ///< PWM Channel 0 Counter Register.00204
#define PWM_CCNT1   (*((volatile unsigned long *)(PWMC_BASE + PWM_CCNT_OFF + PWM_CH1_OFF))) ///< PWM Channel 1 Counter Register.
#define PWM_CCNT2   (*((volatile unsigned long *)(PWMC_BASE + PWM_CCNT_OFF + PWM_CH2_OFF))) ///< PWM Channel 2 Counter Register.
#define PWM_CCNT3   (*((volatile unsigned long *)(PWMC_BASE + PWM_CCNT_OFF + PWM_CH3_OFF))) ///< PWM Channel 3 Counter Register.

#define PWM_CUPD_OFF            0x00000010    ///< PWM Channel Update Register offset.
#define PWM_CUPD0   (*((volatile unsigned long *)(PWMC_BASE + PWM_CUPD_OFF + PWM_CH0_OFF))) ///< PWM Channel 0 Update Register.
#define PWM_CUPD1   (*((volatile unsigned long *)(PWMC_BASE + PWM_CUPD_OFF + PWM_CH1_OFF))) ///< PWM Channel 1 Update Register.
#define PWM_CUPD2   (*((volatile unsigned long *)(PWMC_BASE + PWM_CUPD_OFF + PWM_CH2_OFF))) ///< PWM Channel 2 Update Register.
#define PWM_CUPD3   (*((volatile unsigned long *)(PWMC_BASE + PWM_CUPD_OFF + PWM_CH3_OFF))) ///< PWM Channel 3 Update Register.

extern void PWMC_ConfigureChannel( 
    unsigned char channel, 
    unsigned int prescaler, 
    unsigned int alignment, 
    unsigned int polarity); 
 
extern void PWMC_ConfigureClocks 
    (unsigned int clka, 
     unsigned int clkb, 
     unsigned int mck); 
 
void PWMC_SetPeriod(unsigned char channel, unsigned short period); 
void PWMC_SetDutyCycle(unsigned char channel, unsigned short duty); 
void PWMC_EnableChannel(unsigned char channel); 
void PWMC_DisableChannel(unsigned char channel); 
void PWMC_EnableChannelIt(unsigned char channel); 
void PWMC_DisableChannelIt(unsigned char channel); 
unsigned short FindClockConfiguration(unsigned int frequency, unsigned int mck);

#define trace_DEBUG                     0 
#define trace_INFO                      1 
#define trace_WARNING                   2 
#define trace_ERROR                     3 
#define trace_FATAL                     4 
#define trace_LEVEL                     0 

#define trace_CONFIGURE(mode, baudrate, mck) { \
        const Pin pinsDbgu[] = {PINS_DBGU}; \
        PIO_Configure(pinsDbgu, PIO_LISTSIZE(pinsDbgu)); \
        DBGU_Configure(mode, baudrate, mck); \
    } 

#define trace_LOG(level, ...) { \
        if (level >= trace_LEVEL) { \
            printk(__VA_ARGS__); \
        } \
    } 


#define ASSERT(condition, ...)  { \
        if (!(condition)) { \
            printk(__VA_ARGS__); \
            while (1); \
        } \
    } 
	
#define SANITY_ERROR            "Sanity check failed at %s:%d\n\r" 
#define SANITY_CHECK(condition) ASSERT(condition, SANITY_ERROR, __FILE__, __LINE__) 


#endif /* AT91_PWM_H */

at9g45库文件: 

#include "at91_pwm.h"  




unsigned short FindClockConfiguration(   
    unsigned int frequency,   
    unsigned int mck)   
{   
    unsigned int divisors[11] = {1, 2, 4, 8, 16, 32, 64, 128, 256, 512, 1024};   
    unsigned char divisor = 0;   
    unsigned int prescaler;   
   
    SANITY_CHECK(frequency < mck);
   
    // Find prescaler and divisor values   
    prescaler = (mck / divisors[divisor]) / frequency;   
    while ((prescaler > 255) && (divisor < 11)) {   
   
        divisor++;   
        prescaler = (mck / divisors[divisor]) / frequency;   
    }   
   
    // Return result   
    if (divisor < 11) {   
   
        trace_LOG(trace_DEBUG, "-D- Found divisor=%d and prescaler=%d for freq=%dHz\n\r",   
                  divisors[divisor], prescaler, frequency);   
        return prescaler | (divisor << 8);   
    }   
    else {   
   
        return 0;   
    }   
}   
//------------------------------------------------------------------------------   
//         Global functions   
//------------------------------------------------------------------------------   
   
//------------------------------------------------------------------------------   
/// Configures PWM a channel with the given parameters.   
/// The PWM controller must have been clocked in the PMC prior to calling this   
/// function.   
/// \param channel  Channel number.   
/// \param prescaler  Channel prescaler.   
/// \param alignment  Channel alignment.   
/// \param polarity  Channel polarity.   
//------------------------------------------------------------------------------   
void PWMC_ConfigureChannel(   
    unsigned char channel,   
    unsigned int prescaler,   
    unsigned int alignment,   
    unsigned int polarity)   
{   
    SANITY_CHECK(prescaler < PWM_CPRE_CLKB);   
    SANITY_CHECK((alignment & ~(1 << PWM_CALG)) == 0);   
    SANITY_CHECK((polarity & ~(1<<PWM_CPOL)) == 0);   
   
    // Disable channel   
    PWM_DIS |= (1 << channel);
   
    // Configure channel   
    PWM_CMR0 = prescaler | alignment | polarity;   
}   
   
//------------------------------------------------------------------------------   
/// Configures PWM clocks A & B to run at the given frequencies. This function   
/// finds the best MCK divisor and prescaler values automatically.   
/// \param clka  Desired clock A frequency (0 if not used).   
/// \param clkb  Desired clock B frequency (0 if not used).   
/// \param mck  Master clock frequency.   
//------------------------------------------------------------------------------   
void PWMC_ConfigureClocks(unsigned int clka, unsigned int clkb, unsigned int mck)   
{   
    unsigned int mode = 0;   
    unsigned int result;   
   
    // Clock A   
    if (clka != 0) {   
   
        result = FindClockConfiguration(clka, mck);   
        ASSERT(result != 0, "-F- Could not generated the desired PWM frequency (%dHz)\n\r", clka);   
        mode |= result;   
    }   
   
    // Clock B   
    if (clkb != 0) {   
   
        result = FindClockConfiguration(clkb, mck);   
        ASSERT(result != 0, "-F- Could not generated the desired PWM frequency (%dHz)\n\r", clkb);   
        mode |= (result << 16);   
    }   
   
    // Configure clocks   
    trace_LOG(trace_DEBUG, "-D- Setting PWMC_MR = 0x%08X\n\r", mode);   
    PWM_MR = mode;   
}   
   
//------------------------------------------------------------------------------   
/// Sets the period value used by a PWM channel. This function writes directly   
/// to the CPRD register if the channel is disabled; otherwise, it uses the   
/// update register CUPD.   
/// \param channel  Channel number.   
/// \param period  Period value.   
//------------------------------------------------------------------------------   
void PWMC_SetPeriod(unsigned char channel, unsigned short period)   
{   
    // If channel is disabled, write to CPRD   
    if ((PWM_SR & (1 << channel)) == 0) {   
   
        PWM_CPRD0 = period;   
    }   
    // Otherwise use update register   
    else {   
   
        PWM_CMR0 |= (1 << PWM_CPD);   
        PWM_CUPD0 = period;   
    }   
}   
   
//------------------------------------------------------------------------------   
/// Sets the duty cycle used by a PWM channel. This function writes directly to   
/// the CDTY register if the channel is disabled; otherwise it uses the   
/// update register CUPD.   
/// Note that the duty cycle must always be inferior or equal to the channel   
/// period.   
/// \param channel  Channel number.   
/// \param duty  Duty cycle value.   
//------------------------------------------------------------------------------   
void PWMC_SetDutyCycle(unsigned char channel, unsigned short duty)   
{   
    SANITY_CHECK(duty <= PWM_CPRD0);   
   
 
    ASSERT(duty > 0, "-F- Duty cycle value 0 is not permitted on SAM7S chips.\n\r");   
	
		
    ASSERT((duty > 1) || (PWM_CMR0 & (1 << PWM_CALG)),   
           "-F- Duty cycle value 1 is not permitted in left-aligned mode on SAM7S chips.\n\r");   

   
    // If channel is disabled, write to CDTY   
    if ((PWM_SR & (1 << channel)) == 0) {   
   
        PWM_CDTY0 = duty;   
    }   
    // Otherwise use update register   
    else {   
   
        PWM_CMR0 &= ~(1 << PWM_CPD);   
        PWM_CUPD0 = duty;   
    }   
}   
   
//------------------------------------------------------------------------------   
/// Enables the given PWM channel. This does NOT enable the corresponding pin;   
/// this must be done in the user code.   
/// \param channel  Channel number.   
//------------------------------------------------------------------------------   
void PWMC_EnableChannel(unsigned char channel)   
{   
    PWM_ENA |= 1 << channel;   
}   
   
//------------------------------------------------------------------------------   
/// Disables the given PWM channel.   
/// \param channel  Channel number.   
//------------------------------------------------------------------------------   
void PWMC_DisableChannel(unsigned char channel)   
{   
    PWM_DIS |= 1 << channel;   
}   
   
//------------------------------------------------------------------------------   
/// Enables the period interrupt for the given PWM channel.   
/// \param channel  Channel number.   
//------------------------------------------------------------------------------   
void PWMC_EnableChannelIt(unsigned char channel)   
{   
    PWM_IER |= 1 << channel;   
}   
   
//------------------------------------------------------------------------------   
/// Disables the period interrupt for the given PWM channel.   
/// \param channel  Channel number.   
//------------------------------------------------------------------------------   
void PWMC_DisableChannelIt(unsigned char channel)   
{   
    PWM_IDR |= 1 << channel;   
}

at9g45,驱动文件: 

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/fs.h>		           /* everything... */
#include <linux/cdev.h>                /* cdev...*/
#include <linux/gpio.h>
#include <linux/proc_fs.h>
#include <asm/uaccess.h>
#include "at91_pwm.h"
#include "at91_pwm.c"

#define DEVICE_NAME "mypwm"

static int led_major = 0;
static int led_minor = 0;
struct cdev *led_device;

static void PWM_Set_Freq(int arg)
{
	at91_set_gpio_output(AT91_PIN_PD15, 0);	//设置PD15为输出模式
	at91_set_gpio_value(AT91_PIN_PD15, 0);	//设置PD15输出为0,表示点亮
	at91_set_B_periph(AT91_PIN_PD24, 1);	/* enable PWM0 */

	
	PWMC_ConfigureChannel(0, 1, 2, 3);
	PWMC_ConfigureClocks(1000, 500, 10);
	PWMC_SetPeriod(0, 1);
	PWMC_SetDutyCycle(0, 50);
}

static void PWM_Stop(void)
{
	at91_set_gpio_output(AT91_PIN_PD24, 0);	
	at91_set_gpio_value(AT91_PIN_PD24, 1);

	return ;
}

		   
static int myled_open(struct inode *inode, struct file *filp)
{
	PWMC_EnableChannel(0);//这一步在测试驱动的时候总是报内存操作错误
	at91_set_B_periph(AT91_PIN_PD24, 1);/* enable PWM0 */

	return 0;
}

static int myled_release(struct inode *inode, struct file *filp)
{
	PWMC_DisableChannel(0); //这一步在测试驱动的时候总是报内存操作错误
	return 0;
}

static int myled_ioctl(struct inode *inode, struct file *filp, unsigned int cmd, unsigned long arg)
{
	if (arg > 4)
	{
		return -1;
	}
	
	switch (cmd)
	{
		case 0:
			if (arg == 0)
				return -1;
			PWM_Set_Freq(arg);
			break;
			//通过cmd命令控制PD15
		case 1:
			PWM_Stop();
			break;
	}
	return 0;
}

struct file_operations led_fops = 
{
	.owner =    THIS_MODULE,
	.open =     myled_open,
	.release =  myled_release,
	.ioctl = myled_ioctl,
};


static void __exit my_led_exit(void)
{
    dev_t devno = MKDEV(led_major, led_minor);	//通过主次设备号获得设备号
	
	if (led_device)
	{
		cdev_del(led_device);	//删除设备号
		
		kfree(led_device);	//释放设备号空间
		led_device = NULL;	//设置为空, 防止再次被调用
	}
	
	unregister_chrdev_region(devno, 1);	//卸载主设备号
	

    return;
}

static int __init my_led_init(void)
{
	int result = 0;	//用来返回结果值
	dev_t dev = 0;	//设备号
	
	/***********************分配主次设备号******************/
	result = alloc_chrdev_region(&dev, led_minor, 1, DEVICE_NAME);	//自动分配主设备号
	led_major = MAJOR(dev);	//得到主设备号
	
	if (result < 0)
	{
		printk(KERN_WARNING "wfet_kb: can't get major %d\n", led_major);
		return result;
	}
	
	/*********************注册字符设备*************************/
	led_device = kmalloc(sizeof(struct cdev), GFP_KERNEL);	//字符设备的全局结构占用的内存要用kmalloc或kzalloc申请
	
	if(!led_device)
	{
		result = -ENOMEM;
		unregister_chrdev_region(dev, 1);
		return result;
	}
	memset(led_device, 0, sizeof(struct cdev));
	
	cdev_init(led_device, &led_fops);	//字符设备初始化
	led_device->owner = THIS_MODULE;
	
	result = cdev_add(led_device, dev, 1);	//字符设备添加
	if(result)
	{
		printk(KERN_NOTICE "Error %d adding LED device, major_%d", result, MAJOR(dev));
		kfree(led_device);	//释放空间
		unregister_chrdev_region(dev, 1);	//注销设备号
		return result;
	}

    return 0;
}


module_init(my_led_init)
module_exit(my_led_exit)

MODULE_LICENSE("GPL");

at9g45测试文件: 

#include <stdio.h>
#include "at91_ioctl.h"

int main(int argc, char** argv)
{
    int fp;

    fp = open("/dev/mypwm", 0);
    if(fp < 0)
    {
        printf("Open error!\n");
        return -1;
    }

    ioctl(fp, atoi(argv[1]));

    close(fp);

    return 0;
}


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<br /><br />纪念第一个驱动程序：at91sam9g45核心板的看门狗驱动<br />看门狗的驱动一般来说比较简单，只要做寄存器的设置实现开启、关闭、喂狗功能。本项目中我们使用的是at91sam9g45处理器，带有看门狗定时器。这个看门狗的驱动却比较复杂，应用层想用它的话，将涉及到boot引导设置，uboot配置及驱动，改写驱动程序。下面将逐步说明。<br />1、boot引导(bootstrap-v1.14)<br />由于该看门狗的MR寄存器只能写一次(Only a processor res
AT91-PWM应用
weixin_33828101的博客
10-24 172
步骤1: make menuconfig配置内核, 开启PWM输出功能. [cpp] view plain copy Device Drivers ---&gt;     Misc devices  ---&gt;       &lt;*&gt;Atmel AT32/AT91 PWM support     [*] LEDSupport  ---&gt;       ...
AT91SAM9G45开发板 9G45开发板
ARM愚公的博客
12-24 1221
AT91SAM9G45开发板    AT91SAM9G45开发板Gift9G45基于Atmel 400MHz ARM9处理器，AT91SAM9G45芯片把用户接口的功能性和高速数据连接相结合，包括LCD控制器，电阻触摸屏，相机接口，音频，10/100M以太网，USB和SDIO等。    处理器:         Atmel 工业级AT91SAM9G45         400MHZ
9G45的SDRAM 版本 正式研发OK
MeTech--研发专栏
07-31 2435
atmel 在2010年之前的ARM最高端ARM 9G45(与9M10兼容)  被研发成功     在现在的市面上大多都是抄袭官方的DDR2 控制器做的，但是9G45也就400M，用DDR2太浪费了，没必要滴，所以我就用SDRAM 实现了，32位，这样修改软件配置就是一个非常大的麻烦，在9G45研发过程中，需要特别注意的是，复位 一般的RC可能不咋么可靠了！可能上档次了吧！呵呵！或则需要一个
ucGUI.zip_at91sam9g45
最新发布
09-24
移植ucGUI到AT91SAM9G45意味着开发者可以利用该库创建有图形界面的应用程序，这些应用程序可以在该处理器驱动的硬件上运行。ucGUI的特点包括高效的内存管理、多种图形对象支持（如按钮、列表、滚动条等）、字体支持...
at91sam9g45_devices.rar_The Chip_at91sam9g45
09-22
"at91sam9g45_devices.rar"是一个压缩包，其中包含"at91sam9g45_devices.c"源代码文件，该文件是针对AT91SAM9G45芯片的Linux内核设备驱动程序。这个驱动程序负责初始化和管理芯片上的各种内置设备，如串行端口、...
AT91SAM9G45中文版数据手册
02-21
AT91SAM9G45是一款基于ARM926EJ-S内核的微处理器，由Atmel公司设计，广泛应用于嵌入式系统和工业控制领域。这款芯片的数据手册是理解其功能、特性以及如何进行硬件设计和软件开发的关键参考资料。 在《AT91SAM9G45...
EB-SAM9G45开发板—基于AT91SAM9G45处理器的全功能评估板-电路方案
04-20
EB-SAM9G45（原称EM-SAM9G45）开发板是英蓓特公司新推出的一款基 于ATMEL公司AT91SAM9G45处理器（ARM926EJ-S内核）的全功能评估板。SAM9G45开发板主频高达400MHz，可支持 WinCE和Linux操作系统的开发板调试，带有256...
AT91SAM7X系列所有例程
10-14
AT91SAM7X系列arm7芯片所有例程，keil、iar、gnu可打开，pio pwm twi adc can emac uip rrt spi usart usb
SAM4E单片机之旅——5、LED呼吸和PWM
07-17
利用PWM的中断功能，动态改变脉冲的占空比，来实现呼吸灯的效果。
Linux PWM驱动框架 (二)
hwx1546的博客
09-10 980
Linux PWM驱动框架 (二)
samd20 21 配置pwm 改变频率 占空比
jacycle的专栏
10-09 1501
static void configure_tc(void) {     //! [setup_config]     struct tc_config config_tc;     //! [setup_config]     //! [setup_config_defaults]     tc_get_config_defaults(&config_tc);     config
linux驱动之PWM(定时器)
chenliang0224的专栏
02-25 3194
说明：以下由两部分组成，定时器驱动、定时器应用程序构成； 1.驱动程序； #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #includ
字符设备驱动——申请设备号、注册字符设备
aidixi4007的博客
08-14 276
1. 设备号 主设备号：用来标识与设备文件相关的驱动程序，——反应设备类型 次设备号：为内核所用，被驱动程序用来辨别操作那个设备文件——区分同类型的具体某个设备 1.1 设备号的内部表达 在内核中，保存设备号（包括主设备号和此设备好）使用类型 dev_t （<linux/types.h>) ...
QtSql：没有该文件或目录 解决方案
异ﾘ度ｭ空ｳ間（镜像站）
07-31 2077
显然include 是没错的，可是怎么也找不到这个文件，程序编译不过..... 解决方案如下：在XXX.pro文件中添加一行             QT += sql 就可以了，这个方法还可以用再其他场合...要是找不到什么头文件可以考虑试试
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