ES8388 Record/Playback/Bypass寄存器设置

已于 2024-09-03 16:00:23 修改
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分类专栏： Audio 文章标签： 开发语言
于 2024-09-03 15:50:15 首次发布
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本文链接：https://blog.csdn.net/itom1900/article/details/141863871
版权 
void ES8388_Init_Record()
{
    //ES8388 user guide
    uint8_t data = 0;

    es8388_write_reg(0, 0x80);
    es8388_write_reg(0, 0x00);
    delay_1ms(100);

    es8388_write_reg(0x8, 0x00);

    es8388_write_reg(0x02, 0xF3);

    es8388_write_reg(0x2B, 0x80);

    es8388_write_reg(0x00, 0x05);

    es8388_write_reg(0x01, 0x40);

    es8388_write_reg(0x03, 0x00);

    es8388_write_reg(0x0a, 0x00);

    es8388_write_reg(0x09, 0x00);//0x00

    es8388_write_reg(0x0c, 0x4C);//I2S 16BIT

    es8388_write_reg(0x0d, 0x04);//0x2-0x4

    es8388_write_reg(0x10, 0x00);

    es8388_write_reg(0x11, 0x00);

//    ES8388 guide single mic
//    es8388_write_reg(0x12, 0xe2);
//    es8388_write_reg(0x13, 0xa0);
//    es8388_write_reg(0x14, 0x12);
//    es8388_write_reg(0x15, 0x06);
//    es8388_write_reg(0x16, 0xc3);

    es8388_write_reg(0x0f, 0x30);

    es8388_write_reg(0x02, 0x55);

    delay_1ms(1000);

}

void ES8388_Init_Playback()
{
    //ES8388 user guide
    uint8_t data = 0;

    es8388_write_reg(0, 0x80);
    es8388_write_reg(0, 0x00);
    delay_1ms(100);

    es8388_write_reg(0x08, 0x00);

    es8388_write_reg(0x02, 0xF3);

    es8388_write_reg(0x2B, 0x80);

    es8388_write_reg(0x00, 0x05);

    es8388_write_reg(0x01, 0x40);

    es8388_write_reg(0x04, 0x3c);

    es8388_write_reg(0x17, 0x18);//I2S 16BIT

    es8388_write_reg(0x18, 0x04);//0x2-0x4

    es8388_write_reg(0x1a, 0x00);

    es8388_write_reg(0x1b, 0x00);

    es8388_write_reg(0x19, 0x32);

    es8388_write_reg(0x26, 0x00);

    es8388_write_reg(0x27, 0xb8);

    es8388_write_reg(0x28, 0x38);

    es8388_write_reg(0x29, 0xb8);

    es8388_write_reg(0x2e, 0x1e);

    es8388_write_reg(0x2f, 0x1e);

    es8388_write_reg(0x30, 0x1e);

    es8388_write_reg(0x31, 0x1e);

    es8388_write_reg(0x02, 0xaa);

    delay_1ms(1000);

}

void ES8388_Init_ByPass()
{
    //ES8388 user guide
    uint8_t data = 0;

    es8388_write_reg(0, 0x80);
    es8388_write_reg(0, 0x00);
    delay_1ms(100);

    es8388_write_reg(0x08, 0x00);

    es8388_write_reg(0x02, 0xF3);

    es8388_write_reg(0x2B, 0x80);

    es8388_write_reg(0x00, 0x05);

    es8388_write_reg(0x01, 0x40);

    es8388_write_reg(0x03, 0x3f);

    es8388_write_reg(0x04, 0xfc);

    es8388_write_reg(0x26, 0x00);

    es8388_write_reg(0x27, 0x38);

    es8388_write_reg(0x28, 0x38);

    es8388_write_reg(0x29, 0x50);

    es8388_write_reg(0x2e, 0x1e);

    es8388_write_reg(0x2f, 0x1e);

    es8388_write_reg(0x30, 0x1e);

    es8388_write_reg(0x31, 0x1e);

    es8388_write_reg(0x02, 0xf0);

    delay_1ms(100);

}

void ES8388_Init()
{
    uint8_t data = 0;

    es8388_write_reg(0, 0x80);      /* 软复位ES8388 */
    es8388_write_reg(0, 0x00);
    delay_1ms(100);                  /* 等待复位 */

    es8388_write_reg(0x01, 0x58);

    es8388_write_reg(0x01, 0x50);
    es8388_write_reg(0x02, 0xF3);
    es8388_write_reg(0x02, 0xF0);

    es8388_write_reg(0x03, 0x09);   /* 麦克风偏置电源关闭 */
    es8388_write_reg(0x00, 0x06);   /* 使能参考        500K驱动使能 */
    es8388_write_reg(0x04, 0x00);   /* DAC电源管理，不打开任何通道 */
    es8388_write_reg(0x08, 0x00);   /* MCLK不分频 */
    es8388_write_reg(0x2B, 0x80);   /* DAC控制    DACLRC与ADCLRC相同 */

    es8388_write_reg(0x09, 0x88);   /* ADC L/R PGA增益配置为+24dB */
    es8388_write_reg(0x0C, 0x4C);   /* ADC    数据选择为left data = left ADC, right data = left ADC  音频数据为16bit */
    es8388_write_reg(0x0D, 0x02);   /* ADC配置 MCLK/采样率=256 */
    es8388_write_reg(0x10, 0x00);   /* ADC数字音量控制将信号衰减 L  设置为最小！！！ */
    es8388_write_reg(0x11, 0x00);   /* ADC数字音量控制将信号衰减 R  设置为最小！！！ */

    es8388_write_reg(0x17, 0x18);   /* DAC 音频数据为16bit */
    es8388_write_reg(0x18, 0x02);   /* DAC    配置 MCLK/采样率=256 */
    es8388_write_reg(0x1A, 0x00);   /* DAC数字音量控制将信号衰减 L  设置为最小！！！ */
    es8388_write_reg(0x1B, 0x00);   /* DAC数字音量控制将信号衰减 R  设置为最小！！！ */
    es8388_write_reg(0x27, 0xB8);   /* L混频器 */
    es8388_write_reg(0x2A, 0xB8);   /* R混频器 */
    delay_1ms(100);

}

1: 基于SAI音频接口的ES8388音频codec驱动的开发

1：初始化ES8388音频接口

2：初始化UDMA和SAI配置

/**
  * Copyright (c) 2019 Nuclei Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
  * Licensed under the Apache License, Version 2.0 (the License); you may
  * not use this file except in compliance with the License.
  * You may obtain a copy of the License at
  *
  * www.apache.org/licenses/LICENSE-2.0
  *
  * Unless required by applicable law or agreed to in writing, software
  * distributed under the License is distributed on an AS IS BASIS, WITHOUT
  * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  * See the License for the specific language governing permissions and
  * limitations under the License.
  */

#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include "ns_sdk_hal.h"

#if CFG_SIMULATION
#define SOC_CLK                (100000000)
#else
#define SOC_CLK                (SystemCoreClock)
#endif
#define EEP_FIRST_PAGE         (0x00)
#define I2C_OK                 (0)
#define I2C_FAIL               (1)
#define EEPROM_BLOCK0_ADDRESS  (0x50)
#define BUFFER_SIZE            (16)
#define I2C1_SPEED             (400000)
#define I2C1_SLAVE_ADDRESS7    (0x50)
#define I2C_PAGE_SIZE          (16)

#define ES8388_ADDRESS (0x10)

#define SAI0_S0_BASE_A    SAI0_S0_CFG_A_BASE
#define SAI0_S0_BASE_B    SAI0_S0_CFG_B_BASE

#define ARR_SIZE    2*(2*16000*2)//2S*2channel*16KHz sample rate*sizeof(16bit)
#define FIFO_RDAT    0x14

uint16_t SAI0_S0_A_Send_buffer[ARR_SIZE] = {0};
uint16_t SAI0_S0_B_Receive_buffer[ARR_SIZE] = {0};

uint8_t state0 = 0;
uint8_t mute = 1;

void UDMA0_IRQHandler(void)
{
    if (UDMA_PA2M_GetITStatus(SAI0_SAI_0_B_RX_DMA_DMA_IRQ, PA2M_FTRANS_IRQ_STAT) == SET) {
       state0 = 1;
//       UDMA_PA2M_ITConfig(SAI0_SAI_0_B_RX_DMA_DMA_IRQ, PA2M_FTRANS_IRQ_EN, DISABLE);
//       SAI_Config(SAI0_S0_CFG_B,DISABLE);
//       SAI_Config(SAI0_S0_CFG_A,DISABLE);
       printf("record int\r\n");
       UDMA_PA2M_ClearITStatus(SAI0_SAI_0_B_RX_DMA_DMA_IRQ, PA2M_FTRANS_IRQ_CLEAR_STAT);
    }

    if (UDMA_PA2M_GetITStatus(SAI0_SAI_0_A_TX_DMA_DMA_IRQ, PA2M_FTRANS_IRQ_STAT) == SET) {
       state0 = 2;
//       UDMA_PA2M_ITConfig(SAI0_SAI_0_A_TX_DMA_DMA_IRQ, PA2M_FTRANS_IRQ_EN, DISABLE);
//       SAI_Config(SAI0_S0_CFG_B, DISABLE);
//       SAI_Config(SAI0_S0_CFG_A, DISABLE);
       printf("playback int\r\n");
       UDMA_PA2M_ClearITStatus(SAI0_SAI_0_A_TX_DMA_DMA_IRQ, PA2M_FTRANS_IRQ_CLEAR_STAT);
    }

}

/**
  * \brief cofigure the I2C1 interfaces
  */
void I2C_Config(void)
{
    I2C_InitTypeDef init = {0};
    init.duty = I2C_50_DUTY;
    init.clk = I2C1_SPEED;
    init.mode = I2C_MASTER_MODE;
    init.scl_pull = ENABLE;
    init.sda_pull = ENABLE;
    I2C_Init(I2C1, &init);
}

uint8_t es8388_write_reg(uint8_t reg, uint8_t val)
{
    uint32_t timeout = 0xFFFFFFFF;
    I2C_ACK(I2C1, DISABLE);
    I2C_Start(I2C1);
    I2C_Send_SlaveAddr(I2C1, ES8388_ADDRESS, I2C_DIR_WRITE, timeout);
    /* wait until I2C recv ack */
    while (!I2C_Get_Status(I2C1, I2C_STATUS_ADDR_ACK)) {}
//    delay_1ms(10);
    I2C_Clear_Status(I2C1, I2C_STATUS_ADDR_ACK);
    I2C_Write(I2C1, reg, timeout);
    /* wait until I2C recv ack */
    while (I2C_Get_Status(I2C1, I2C_STATUS_ACK)) {}
//    delay_1ms(10);
    I2C_Write(I2C1, val, timeout);
    /* wait until I2C recv ack */
    while (I2C_Get_Status(I2C1, I2C_STATUS_ACK)) {}
//    delay_1ms(10);
    I2C_Stop(I2C1);
}

void es8388_read_reg(uint8_t reg, uint8_t *dat)
{
	uint8_t temp = 0;
    uint32_t timeout = 0xFFFFFFFF;
//    uint8_t *p_buffer;

    I2C_ACK(I2C1, DISABLE);
    I2C_Start(I2C1);
    I2C_Send_SlaveAddr(I2C1, ES8388_ADDRESS, I2C_DIR_WRITE, timeout);
    /* wait until I2C recv ack */
    while (!I2C_Get_Status(I2C1, I2C_STATUS_ADDR_ACK)) {}
//    delay_1ms(10);
    I2C_Clear_Status(I2C1, I2C_STATUS_ADDR_ACK);
    I2C_Write(I2C1, reg, timeout);
    /* wait until I2C recv ack */
    while (I2C_Get_Status(I2C1, I2C_STATUS_ACK)) {}
//    delay_1ms(10);
    I2C_Restart(I2C1);
    I2C_Send_SlaveAddr(I2C1, ES8388_ADDRESS, I2C_DIR_READ, timeout);
    /* wait until I2C recv ack */
    while (!I2C_Get_Status(I2C1, I2C_STATUS_ADDR_ACK)) {}
//    delay_1ms(10);
    I2C_Clear_Status(I2C1, I2C_STATUS_ADDR_ACK);
    I2C_ACK(I2C1, ENABLE);
    I2C_ACK(I2C1, DISABLE);
    I2C_Read(I2C1, dat, timeout);
    I2C_Stop(I2C1);

}

void ES8388_Reset()
{
    es8388_write_reg(0, 0x80);      /* 软复位ES8388 */
    es8388_write_reg(0, 0x00);
    delay_1ms(100);                  /* 等待复位 */
}

void ES8388_Init_Record()
{
	//ES8388 user guide
	uint8_t data = 0;

    es8388_write_reg(0, 0x80);
    es8388_write_reg(0, 0x00);
    delay_1ms(100);

    es8388_write_reg(0x8, 0x00);

    es8388_write_reg(0x02, 0xF3);

    es8388_write_reg(0x2B, 0x80);

    es8388_write_reg(0x00, 0x05);

    es8388_write_reg(0x01, 0x40);

    es8388_write_reg(0x03, 0x00);

    es8388_write_reg(0x0a, 0x00);

    es8388_write_reg(0x09, 0x00);//0x00

    es8388_write_reg(0x0c, 0x4C);//I2S 16BIT

    es8388_write_reg(0x0d, 0x04);//0x2-0x4

    es8388_write_reg(0x10, 0x00);

    es8388_write_reg(0x11, 0x00);

//    //ES8388 guide single mic
//    es8388_write_reg(0x12, 0xe2);
//    es8388_write_reg(0x13, 0xa0);
//    es8388_write_reg(0x14, 0x12);
//    es8388_write_reg(0x15, 0x06);
//    es8388_write_reg(0x16, 0xc3);

    es8388_write_reg(0x0f, 0x30);

    es8388_write_reg(0x02, 0x55);

    es8388_read_reg(0x0d, &data);
    printf("es8388 0x0d = 0x%x\r\n", data);

    es8388_read_reg(0x08, &data);
    printf("es8388 0x08 = 0x%x\r\n", data);

    delay_1ms(1000);

}

void ES8388_Init_Playback()
{
	//ES8388 user guide
	uint8_t data = 0;

    es8388_write_reg(0, 0x80);
    es8388_write_reg(0, 0x00);
    delay_1ms(100);

    es8388_write_reg(0x08, 0x00);

    es8388_write_reg(0x02, 0xF3);

    es8388_write_reg(0x2B, 0x80);

    es8388_write_reg(0x00, 0x05);

    es8388_write_reg(0x01, 0x40);

    es8388_write_reg(0x04, 0x3c);

    es8388_write_reg(0x17, 0x18);//I2S 16BIT

    es8388_write_reg(0x18, 0x04);//0x2-0x4

    es8388_write_reg(0x1a, 0x00);

    es8388_write_reg(0x1b, 0x00);

    es8388_write_reg(0x19, 0x32);

    es8388_write_reg(0x26, 0x00);

    es8388_write_reg(0x27, 0xb8);

    es8388_write_reg(0x28, 0x38);

    es8388_write_reg(0x29, 0xb8);

    es8388_write_reg(0x2e, 0x1e);

    es8388_write_reg(0x2f, 0x1e);

    es8388_write_reg(0x30, 0x1e);

    es8388_write_reg(0x31, 0x1e);

    es8388_write_reg(0x02, 0xaa);

    es8388_read_reg(0x0d, &data);
    printf("es8388 0x0d = 0x%x\r\n", data);

    es8388_read_reg(0x08, &data);
    printf("es8388 0x08 = 0x%x\r\n", data);

    delay_1ms(1000);

}

void ES8388_Init_ByPass()
{
	//ES8388 user guide
	uint8_t data = 0;

    es8388_write_reg(0, 0x80);
    es8388_write_reg(0, 0x00);
    delay_1ms(100);

    es8388_write_reg(0x08, 0x00);

    es8388_write_reg(0x02, 0xF3);

    es8388_write_reg(0x2B, 0x80);

    es8388_write_reg(0x00, 0x05);

    es8388_write_reg(0x01, 0x40);

    es8388_write_reg(0x03, 0x3f);

    es8388_write_reg(0x04, 0xfc);

    es8388_write_reg(0x26, 0x00);

    es8388_write_reg(0x27, 0x38);

    es8388_write_reg(0x28, 0x38);

    es8388_write_reg(0x29, 0x50);

    es8388_write_reg(0x2e, 0x1e);

    es8388_write_reg(0x2f, 0x1e);

    es8388_write_reg(0x30, 0x1e);

    es8388_write_reg(0x31, 0x1e);

    es8388_write_reg(0x02, 0xf0);

    delay_1ms(100);

}

void ES8388_Init()
{

	uint8_t data = 0;

    es8388_write_reg(0, 0x80);      /* 软复位ES8388 */
    es8388_write_reg(0, 0x00);
    delay_1ms(100);                  /* 等待复位 */

    es8388_write_reg(0x01, 0x58);

    es8388_write_reg(0x01, 0x50);
    es8388_write_reg(0x02, 0xF3);
    es8388_write_reg(0x02, 0xF0);

    es8388_write_reg(0x03, 0x09);   /* 麦克风偏置电源关闭 */
    es8388_write_reg(0x00, 0x06);   /* 使能参考		500K驱动使能 */
    es8388_write_reg(0x04, 0x00);   /* DAC电源管理，不打开任何通道 */
    es8388_write_reg(0x08, 0x00);   /* MCLK不分频 */
    es8388_write_reg(0x2B, 0x80);   /* DAC控制	DACLRC与ADCLRC相同 */

    es8388_write_reg(0x09, 0x88);   /* ADC L/R PGA增益配置为+24dB */
    es8388_write_reg(0x0C, 0x4C);   /* ADC	数据选择为left data = left ADC, right data = left ADC  音频数据为16bit */
    es8388_write_reg(0x0D, 0x02);   /* ADC配置 MCLK/采样率=256 */
    es8388_write_reg(0x10, 0x00);   /* ADC数字音量控制将信号衰减 L  设置为最小！！！ */
    es8388_write_reg(0x11, 0x00);   /* ADC数字音量控制将信号衰减 R  设置为最小！！！ */

    es8388_write_reg(0x17, 0x18);   /* DAC 音频数据为16bit */
    es8388_write_reg(0x18, 0x02);   /* DAC	配置 MCLK/采样率=256 */
    es8388_write_reg(0x1A, 0x00);   /* DAC数字音量控制将信号衰减 L  设置为最小！！！ */
    es8388_write_reg(0x1B, 0x00);   /* DAC数字音量控制将信号衰减 R  设置为最小！！！ */
    es8388_write_reg(0x27, 0xB8);   /* L混频器 */
    es8388_write_reg(0x2A, 0xB8);   /* R混频器 */
    delay_1ms(100);

    es8388_read_reg(0x09, &data);
    printf("ES8388[0x09] = 0x%x\n\r", data);

    es8388_read_reg(0x0c, &data);
    printf("ES8388[0x0c] = 0x%x\n\r", data);

    es8388_read_reg(0x0d, &data);
    printf("ES8388[0x0d] = 0x%x\n\r", data);

}

#if 0
void SAIxA_Tx_Config()
{
    SAI_InitTypeDef sai_init_t = {0};
    SAI_FrameInitTypeDef sai_frame_t = {0};
    SAI_SlotInitTypeDef sai_slot_t = {0};

    sai_init_t.Synchro = SAI_AUDIOCTRL_SYNCEN_ASYNCH;
    sai_init_t.ClockPolarity = SAI_AUDIOCTRL_CKPOL_NEGEDGE;
    sai_init_t.PortNum = SAI_AUDIOCTRL_PORTN_PORT0_ENABLE;
    sai_init_t.SAIProtocol = SAI_AUDIOCTRL_PRTCFG_FREE_PROTOCOL;
    sai_init_t.MonoStereoMode = SAI_AUDIOCTRL_MONO_DISABLE;
    sai_init_t.FirstBit = SAI_GEN_CFG0_LSBFIRST_ENABLE;
    sai_init_t.ClockStrobingEdge = SAI_GEN_CFG0_CKSTR_ENABLE;
    sai_init_t.TriState = SAI_GEN_CFG0_TRIS_DISABLE;
    sai_init_t.AudioMode = SAI_AUDIOCTRL_MODE_MASTER_TX;
    sai_init_t.Syncin = SAI_AUDIOCTRL_SYNCIN_NOSYNCIN;
    sai_init_t.Syncout = SAI_AUDIOCTRL_SYNCOUT_ENABLE;

    sai_frame_t.FrameLength = SAI_GEN_CFG0_FRL(15);
    sai_frame_t.ActiveFrameLength = SAI_GEN_CFG0_FSALL(0);
    sai_frame_t.FSDefinition = SAI_GEN_CFG0_FSDEF_DISABLE;
    sai_frame_t.FSPolarity = SAI_GEN_CFG0_FSPOL_ENABLE;
    sai_frame_t.FSOffset = SAI_GEN_CFG0_FSOFF_ENABLE;

    sai_slot_t.FirstBitOffset = SAI_GEN_CFG1_FBOFF(0);
    sai_slot_t.SlotSize = SAI_GEN_CFG1_SLOTSZ_DATASIZE;
    sai_slot_t.SlotNumber = SAI_GEN_CFG1_NBSLOT(1);
    sai_slot_t.SlotActive = SAI_GEN_CFG1_SLOTEN_ACTIVE_0 | SAI_GEN_CFG1_SLOTEN_ACTIVE_1;
    sai_slot_t.DataSize = SAI_GEN_CFG1_DS_8;
    sai_slot_t.RestoreSize = SAI_FIFOCTRL_FTH_SIZE_8;
    sai_slot_t.DmaState = SAI_FIFOCTRL_DMAEN_ENABLE;

    /* SAI1 A reg init */
    SAI_Init(SAI0_S0_CFG_A, &sai_init_t,&sai_frame_t,&sai_slot_t);

}

void SAIxB_Rx_Config()
{
    SAI_InitTypeDef sai_init_t = {0};
    SAI_FrameInitTypeDef sai_frame_t = {0};
    SAI_SlotInitTypeDef sai_slot_t = {0};

    sai_init_t.Synchro = SAI_AUDIOCTRL_SYNCEN_ASYNCH;
    sai_init_t.ClockPolarity = SAI_AUDIOCTRL_CKPOL_NEGEDGE;
    sai_init_t.PortNum = SAI_AUDIOCTRL_PORTN_PORT0_ENABLE;
    sai_init_t.SAIProtocol = SAI_AUDIOCTRL_PRTCFG_FREE_PROTOCOL;
    sai_init_t.MonoStereoMode = SAI_AUDIOCTRL_MONO_DISABLE;
    sai_init_t.FirstBit = SAI_GEN_CFG0_LSBFIRST_ENABLE;
    sai_init_t.ClockStrobingEdge = SAI_GEN_CFG0_CKSTR_ENABLE;
    sai_init_t.TriState = SAI_GEN_CFG0_TRIS_DISABLE;
//    sai_init_t.AudioMode = SAI_AUDIOCTRL_MODE_MASTER_TX;
//    sai_init_t.Syncin = SAI_AUDIOCTRL_SYNCIN_NOSYNCIN;
//    sai_init_t.Syncout = SAI_AUDIOCTRL_SYNCOUT_ENABLE;

    sai_frame_t.FrameLength = SAI_GEN_CFG0_FRL(31);
    sai_frame_t.ActiveFrameLength = SAI_GEN_CFG0_FSALL(15);
    sai_frame_t.FSDefinition = SAI_GEN_CFG0_FSDEF_DISABLE;
    sai_frame_t.FSPolarity = SAI_GEN_CFG0_FSPOL_ENABLE;
    sai_frame_t.FSOffset = SAI_GEN_CFG0_FSOFF_ENABLE;

    sai_slot_t.FirstBitOffset = SAI_GEN_CFG1_FBOFF(0);
    sai_slot_t.SlotSize = SAI_GEN_CFG1_SLOTSZ_DATASIZE;
    sai_slot_t.SlotNumber = SAI_GEN_CFG1_NBSLOT(1);
    sai_slot_t.SlotActive = SAI_GEN_CFG1_SLOTEN_ACTIVE_0 | SAI_GEN_CFG1_SLOTEN_ACTIVE_1;
    sai_slot_t.DataSize = SAI_GEN_CFG1_DS_8;
    sai_slot_t.RestoreSize = SAI_FIFOCTRL_FTH_SIZE_8;
    sai_slot_t.DmaState = SAI_FIFOCTRL_DMAEN_ENABLE;

    /* SAI2 A reg init */
    sai_init_t.AudioMode = SAI_AUDIOCTRL_MODE_SLAVE_RX;
    sai_init_t.Syncin = SAI_AUDIOCTRL_SYNCIN_NOSYNCIN;
    sai_init_t.Syncout = SAI_AUDIOCTRL_SYNCOUT_DISABLE;
    SAI_Init(SAI0_S0_CFG_B, &sai_init_t,&sai_frame_t,&sai_slot_t);

}

void SAIA_TX_DMA_Init()
{
    /*interrupt enable*/
    __enable_irq();
    uint8_t  arrvalue = 0;
    uint8_t *dst_base_addr=(uint8_t*) malloc(ARR_SIZE);
    uint8_t *src_base_addr=(uint8_t*) malloc(ARR_SIZE);
    memset((uint8_t *)dst_base_addr, 0, ARR_SIZE );
    memcpy((uint8_t *)src_base_addr, (uint8_t *)SAI0_S0_A_Send_buffer, ARR_SIZE);

    UDMA_PAM2MTypeDef UDMA_PAM2MStruct={0};
    UDMA_PAM2MStruct.UDMA_TransEn = PA2M_TRANS_ENABLE;
    UDMA_PAM2MStruct.UDMA_DstBaseAddr = ADDR32(SAI0_S0_BASE_A + FIFO_RDAT);
    UDMA_PAM2MStruct.UDMA_SrcBaseAddr = ADDR32(src_base_addr);
    UDMA_PAM2MStruct.UDMA_BufferSize = ARR_SIZE;
    UDMA_PAM2MStruct.UDMA_DstInc = PA2M_MDNA_DISABLE;
    UDMA_PAM2MStruct.UDMA_SrcInc = PA2M_MSNA_ENABLE;
    UDMA_PAM2MStruct.UDMA_Width = PA2M_MDWIDTH_8BIT;
    UDMA_PAM2MStruct.UDMA_Mode = PA2M_MODE_NORMAL;
    UDMA_PAM2MStruct.UDMA_PER_SEL = UDMA_SEL_SAI0_SAI_0_A_TX_DMA;

    UDMA_PAM2MStruct.UDMA_DstBaseAddr_H = (uint32_t)(ADDR64(SAI0_S0_BASE_A + FIFO_RDAT) >> 32) ;
    UDMA_PAM2MStruct.UDMA_SrcBaseAddr_H = (uint32_t)(ADDR64(src_base_addr) >> 32) ;

    UDMA_PAM2M_Init(SAI0_SAI_0_A_TX_DMA_DMA_CH, &UDMA_PAM2MStruct);

    /* DMA interrupt request*/
    ECLIC_Register_IRQ(UDMA0_IRQn, ECLIC_NON_VECTOR_INTERRUPT,
                    ECLIC_LEVEL_TRIGGER, 1, 0,
                    UDMA0_IRQHandler);
    UDMA_PA2M_ITConfig(UDMA_SEL_SAI0_SAI_0_A_TX_DMA, PA2M_FTRANS_IRQ_EN, ENABLE);

}

void SAIB_RX_DMA_Init()
{
    /*interrupt enable*/
    __enable_irq();
    uint8_t  arrvalue = 0;
    uint8_t *dst_base_addr=(uint8_t*) malloc(ARR_SIZE);
    uint8_t *src_base_addr=(uint8_t*) malloc(ARR_SIZE);
    memset((uint8_t *)dst_base_addr, 0, ARR_SIZE );
    memcpy((uint8_t *)src_base_addr, (uint8_t *)SAI0_S0_A_Send_buffer, ARR_SIZE);

    UDMA_PAM2MTypeDef UDMA_PAM2MStruct2={0};
    UDMA_PAM2MStruct2.UDMA_TransEn = PA2M_TRANS_ENABLE;
    UDMA_PAM2MStruct2.UDMA_DstBaseAddr = ADDR32(dst_base_addr);
    UDMA_PAM2MStruct2.UDMA_SrcBaseAddr = ADDR32(SAI0_S0_BASE_B + FIFO_RDAT);
    UDMA_PAM2MStruct2.UDMA_BufferSize = ARR_SIZE;
    UDMA_PAM2MStruct2.UDMA_DstInc = PA2M_MDNA_ENABLE;
    UDMA_PAM2MStruct2.UDMA_SrcInc = PA2M_MSNA_DISABLE;
    UDMA_PAM2MStruct2.UDMA_Width = PA2M_MDWIDTH_8BIT;
    UDMA_PAM2MStruct2.UDMA_Mode = PA2M_MODE_NORMAL;
    UDMA_PAM2MStruct2.UDMA_PER_SEL = UDMA_SEL_SAI0_SAI_0_B_RX_DMA;

    UDMA_PAM2MStruct2.UDMA_DstBaseAddr_H = (uint32_t)(ADDR64 (dst_base_addr) >> 32) ;
    UDMA_PAM2MStruct2.UDMA_SrcBaseAddr_H = (uint32_t)(ADDR64(SAI0_S0_BASE_B + FIFO_RDAT) >> 32) ;

    UDMA_PAM2M_Init(SAI0_SAI_0_B_RX_DMA_DMA_CH, &UDMA_PAM2MStruct2);

    /* DMA interrupt request*/
    ECLIC_Register_IRQ(UDMA0_IRQn, ECLIC_NON_VECTOR_INTERRUPT,
                    ECLIC_LEVEL_TRIGGER, 1, 0,
                    UDMA0_IRQHandler);
    UDMA_PA2M_ITConfig(SAI0_SAI_0_B_RX_DMA_DMA_IRQ, PA2M_FTRANS_IRQ_EN, ENABLE);
}
#endif

void SAI_Play_Start()
{
	SAI_Config(SAI0_S0_CFG_A,ENABLE);
}

void SAI_Play_Stop()
{
	SAI_Config(SAI0_S0_CFG_A,DISABLE);
}

void SAI_Rec_Start()
{
	SAI_Config(SAI0_S0_CFG_B,ENABLE);
}

void SAI_Rec_Stop()
{
	SAI_Config(SAI0_S0_CFG_B,DISABLE);
}

static void StartPlayer()
{
}

static void StartRecord()
{
}

/**
  * \brief main
  *
  * \return int
  */
int main(void)
{
    printf("ES8388 Test\n\r");

    #ifdef MISC_HAS_I2C1_HAS_CLK
    i2c1_clk_en(ENABLE);
    #endif
    #ifdef MISC_HAS_I2C1_RST
    i2c1_set_rst(DISABLE);
    i2c1_set_rst(ENABLE);
    #endif

    #ifdef CFG_SIMULATION
    #ifdef MISC_HAS_I2C1_CLK_DIV
    i2c1_clk_div(0);
    #endif
    #endif

    /* configure I2C */
    I2C_Config();
//    ES8388_Init();
//    ES8388_Init_Record();
//    ES8388_Init_ByPass();

	#ifdef MISC_HAS_SAI0_HAS_CLK
	sai0_clk_en(ENABLE);
	#endif
	#ifdef MISC_HAS_UDMA0_HAS_CLK
	udma0_clk_en(ENABLE);
	udma0_set_rst(DISABLE);
	udma0_set_rst(ENABLE);
	#endif
	#ifdef MISC_HAS_SAI0_RST
	sai0_set_rst(DISABLE);
	sai0_set_rst(ENABLE);
	#endif

//    PSRAM_Config();
//    PSRAM_Test();

    __enable_irq();

#if 0
    SAIB_RX_DMA_Init();
    SAIxB_Rx_Config();
    SAI_Rec_Start();
    delay_1ms(10000);
    SAI_Rec_Stop();
#endif

    SAI_InitTypeDef sai_init_t = {0};
    SAI_FrameInitTypeDef sai_frame_t = {0};
    SAI_SlotInitTypeDef sai_slot_t = {0};
    SAI_ClockInitTypeDef sai_clock_t = {0};

#if 1//Record
    ES8388_Init_Record();
    delay_1ms(2000);
    // Record
    //SAI0 A Record
    UDMA_PAM2MTypeDef UDMA_PAM2MStruct2={0};
    UDMA_PAM2MStruct2.UDMA_TransEn = PA2M_TRANS_ENABLE;
    UDMA_PAM2MStruct2.UDMA_DstBaseAddr = ADDR32(SAI0_S0_B_Receive_buffer);
    UDMA_PAM2MStruct2.UDMA_SrcBaseAddr = ADDR32(SAI0_S0_BASE_B + FIFO_RDAT);
    UDMA_PAM2MStruct2.UDMA_BufferSize = ARR_SIZE;//*sizeof(uint16_t);
    UDMA_PAM2MStruct2.UDMA_DstInc = PA2M_MDNA_ENABLE;
    UDMA_PAM2MStruct2.UDMA_SrcInc = PA2M_MSNA_DISABLE;
    UDMA_PAM2MStruct2.UDMA_Width = PA2M_MDWIDTH_16BIT;//PA2M_MDWIDTH_8BIT;
    UDMA_PAM2MStruct2.UDMA_Mode = PA2M_MODE_CONTINUOUS;//PA2M_MODE_NORMAL;
    UDMA_PAM2MStruct2.UDMA_PER_SEL = UDMA_SEL_SAI0_SAI_0_B_RX_DMA;

    UDMA_PAM2MStruct2.UDMA_SrcBaseAddr_H = (uint32_t)(ADDR64(SAI0_S0_BASE_B + FIFO_RDAT) >> 32) ;
    UDMA_PAM2MStruct2.UDMA_DstBaseAddr_H = (uint32_t)(ADDR64(SAI0_S0_B_Receive_buffer) >> 32) ;

    UDMA_PAM2M_Init(SAI0_SAI_0_B_RX_DMA_DMA_CH, &UDMA_PAM2MStruct2);

    /* DMA interrupt request */
    ECLIC_Register_IRQ(UDMA0_IRQn, ECLIC_NON_VECTOR_INTERRUPT,
                    ECLIC_LEVEL_TRIGGER, 1, 0,
                    UDMA0_IRQHandler);
    UDMA_PA2M_ITConfig(SAI0_SAI_0_B_RX_DMA_DMA_IRQ, PA2M_FTRANS_IRQ_EN, ENABLE);

    sai_init_t.Synchro = SAI_AUDIOCTRL_SYNCEN_INNER_SYNCHRONOUS;//SAI_AUDIOCTRL_SYNCEN_ASYNCH;//SAI_AUDIOCTRL_SYNCEN_INNER_SYNCHRONOUS;
    sai_init_t.ClockPolarity = SAI_AUDIOCTRL_CKPOL_NEGEDGE;
    sai_init_t.PortNum = SAI_AUDIOCTRL_PORTN_PORT0_ENABLE;
    sai_init_t.SAIProtocol = SAI_AUDIOCTRL_PRTCFG_FREE_PROTOCOL;
    sai_init_t.MonoStereoMode = SAI_AUDIOCTRL_MONO_DISABLE;
    sai_init_t.FirstBit = SAI_GEN_CFG0_LSBFIRST_DISABLE;//SAI_GEN_CFG0_LSBFIRST_ENABLE;
    sai_init_t.ClockStrobingEdge = SAI_GEN_CFG0_CKSTR_ENABLE;
    sai_init_t.TriState = SAI_GEN_CFG0_TRIS_DISABLE;
    sai_init_t.AudioMode = SAI_AUDIOCTRL_MODE_MASTER_RX;
    sai_init_t.Syncin = SAI_AUDIOCTRL_SYNCIN_NOSYNCIN;
    sai_init_t.Syncout = SAI_AUDIOCTRL_SYNCOUT_ENABLE;

    sai_frame_t.FrameLength = SAI_GEN_CFG0_FRL(31);//SAI_GEN_CFG0_FRL(15);
    sai_frame_t.ActiveFrameLength = SAI_GEN_CFG0_FSALL(15);//SAI_GEN_CFG0_FSALL(7);
    sai_frame_t.FSDefinition = SAI_GEN_CFG0_FSDEF_ENABLE;
    sai_frame_t.FSPolarity = SAI_GEN_CFG0_FSPOL_DISABLE;
    sai_frame_t.FSOffset = SAI_GEN_CFG0_FSOFF_ENABLE;//;

    sai_slot_t.FirstBitOffset = SAI_GEN_CFG1_FBOFF(0);
    sai_slot_t.SlotSize = SAI_GEN_CFG1_SLOTSZ_16B;//SAI_GEN_CFG1_SLOTSZ_DATASIZE;
    sai_slot_t.SlotNumber = SAI_GEN_CFG1_NBSLOT(1);//SAI_GEN_CFG1_NBSLOT(1);
    sai_slot_t.SlotActive = SAI_GEN_CFG1_SLOTEN_ACTIVE_ALL;//SAI_GEN_CFG1_SLOTEN_ACTIVE_0 | SAI_GEN_CFG1_SLOTEN_ACTIVE_1;
    sai_slot_t.DataSize = SAI_GEN_CFG1_DS_16;//SAI_GEN_CFG1_DS_8;
    sai_slot_t.RestoreSize = SAI_FIFOCTRL_FTH_SIZE_EMPTY;//SAI_FIFOCTRL_FTH_SIZE_8;
    sai_slot_t.DmaState = SAI_FIFOCTRL_DMAEN_ENABLE;
    SAI_Init(SAI0_S0_CFG_B, &sai_init_t,&sai_frame_t,&sai_slot_t);

    /* SAI1 A reg init */
    sai_init_t.AudioMode = SAI_AUDIOCTRL_MODE_MASTER_TX;
    sai_init_t.Syncin = SAI_AUDIOCTRL_SYNCIN_NOSYNCIN;
    sai_init_t.Syncout = SAI_AUDIOCTRL_SYNCOUT_ENABLE;
    SAI_Init(SAI0_S0_CFG_A, &sai_init_t,&sai_frame_t,&sai_slot_t);

    sai_clock_t.Mckdiv = 48 << 2;
    sai_clock_t.NoDivider = 0;
    sai_clock_t.OverSamplingRatio = 1;
    SAI_ClockInit(SAI0_S0_CFG_B, &sai_clock_t);

    sai_clock_t.Mckdiv = 48 << 2;
    sai_clock_t.NoDivider = 0;
    sai_clock_t.OverSamplingRatio = 1;
    SAI_ClockInit(SAI0_S0_CFG_A, &sai_clock_t);

    /* SAI0_S0_A start */
    SAI_Config(SAI0_S0_CFG_A,ENABLE);
    SAI_Config(SAI0_S0_CFG_B,ENABLE);

    while(1) {
    	if(state0 == 0)
    		delay_1ms(10);
    	else
    	{
    		state0 = 0;
    		memcpy((uint16_t *)SAI0_S0_A_Send_buffer, (uint16_t *)SAI0_S0_B_Receive_buffer, ARR_SIZE);
    		break;
    	}
    }

    printf("recording end\r\n");
#endif

    delay_1ms(5000);
    delay_1ms(5000);

#if 0
    ES8388_Init_Playback();
    delay_1ms(2000);
	//Playback
	//S0_A Playback
	UDMA_PAM2MTypeDef UDMA_PAM2MStruct={0};
	UDMA_PAM2MStruct.UDMA_TransEn = PA2M_TRANS_ENABLE;
	UDMA_PAM2MStruct.UDMA_DstBaseAddr = ADDR32(SAI0_S0_BASE_A + FIFO_RDAT);
	UDMA_PAM2MStruct.UDMA_SrcBaseAddr = ADDR32(SAI0_S0_A_Send_buffer);
	UDMA_PAM2MStruct.UDMA_BufferSize = ARR_SIZE;//ARR_SIZE*sizeof(uint16_t);
	UDMA_PAM2MStruct.UDMA_DstInc = PA2M_MDNA_DISABLE;
	UDMA_PAM2MStruct.UDMA_SrcInc = PA2M_MSNA_ENABLE;
	UDMA_PAM2MStruct.UDMA_Width = PA2M_MDWIDTH_16BIT;//PA2M_MDWIDTH_8BIT;
	UDMA_PAM2MStruct.UDMA_Mode = PA2M_MODE_CONTINUOUS;//PA2M_MODE_NORMAL;
	UDMA_PAM2MStruct.UDMA_PER_SEL = UDMA_SEL_SAI0_SAI_0_A_TX_DMA;

	UDMA_PAM2MStruct.UDMA_DstBaseAddr_H = (uint32_t)(ADDR64(SAI0_S0_BASE_A + FIFO_RDAT) >> 32) ;
	UDMA_PAM2MStruct.UDMA_SrcBaseAddr_H = (uint32_t)(ADDR64(SAI0_S0_A_Send_buffer) >> 32) ;

	UDMA_PAM2M_Init(SAI0_SAI_0_A_TX_DMA_DMA_CH, &UDMA_PAM2MStruct);

    /* DMA interrupt request */
    ECLIC_Register_IRQ(UDMA0_IRQn, ECLIC_NON_VECTOR_INTERRUPT,
                    ECLIC_LEVEL_TRIGGER, 1, 0,
                    UDMA0_IRQHandler);
    UDMA_PA2M_ITConfig(SAI0_SAI_0_A_TX_DMA_DMA_IRQ, PA2M_FTRANS_IRQ_EN, ENABLE);

	sai_init_t.Synchro = SAI_AUDIOCTRL_SYNCEN_INNER_SYNCHRONOUS;//SAI_AUDIOCTRL_SYNCEN_ASYNCH;
	sai_init_t.ClockPolarity = SAI_AUDIOCTRL_CKPOL_NEGEDGE;//SAI_AUDIOCTRL_CKPOL_POSEDGE;//SAI_AUDIOCTRL_CKPOL_NEGEDGE;
	sai_init_t.PortNum = SAI_AUDIOCTRL_PORTN_PORT0_ENABLE;
	sai_init_t.SAIProtocol = SAI_AUDIOCTRL_PRTCFG_FREE_PROTOCOL;
	sai_init_t.MonoStereoMode = SAI_AUDIOCTRL_MONO_DISABLE;
	sai_init_t.FirstBit = SAI_GEN_CFG0_LSBFIRST_DISABLE;//SAI_GEN_CFG0_LSBFIRST_ENABLE;//SAI_GEN_CFG0_LSBFIRST_DISABLE;//SAI_GEN_CFG0_LSBFIRST_ENABLE;
	sai_init_t.ClockStrobingEdge = SAI_GEN_CFG0_CKSTR_ENABLE;//SAI_GEN_CFG0_CKSTR_DISABLE;//SAI_GEN_CFG0_CKSTR_ENABLE;
	sai_init_t.TriState = SAI_GEN_CFG0_TRIS_DISABLE;
	sai_init_t.AudioMode = SAI_AUDIOCTRL_MODE_MASTER_TX;
	sai_init_t.Syncin = SAI_AUDIOCTRL_SYNCIN_NOSYNCIN;
	sai_init_t.Syncout = SAI_AUDIOCTRL_SYNCOUT_ENABLE;//SAI_AUDIOCTRL_SYNCOUT_DISABLE;//SAI_AUDIOCTRL_SYNCOUT_ENABLE;

	sai_frame_t.FrameLength = SAI_GEN_CFG0_FRL(31);//SAI_GEN_CFG0_FRL(15);
	sai_frame_t.ActiveFrameLength = SAI_GEN_CFG0_FSALL(15);//SAI_GEN_CFG0_FSALL(7);SAI_GEN_CFG0_FSALL(15);
	sai_frame_t.FSDefinition = SAI_GEN_CFG0_FSDEF_ENABLE;
	sai_frame_t.FSPolarity = SAI_GEN_CFG0_FSPOL_DISABLE;
	sai_frame_t.FSOffset = SAI_GEN_CFG0_FSOFF_ENABLE;

	sai_slot_t.FirstBitOffset = SAI_GEN_CFG1_FBOFF(0);
	sai_slot_t.SlotSize = SAI_GEN_CFG1_SLOTSZ_16B;//SAI_GEN_CFG1_SLOTSZ_DATASIZE;
	sai_slot_t.SlotNumber = SAI_GEN_CFG1_NBSLOT(1);//SAI_GEN_CFG1_NBSLOT(1);
	sai_slot_t.SlotActive = SAI_GEN_CFG1_SLOTEN_ACTIVE_ALL;//SAI_GEN_CFG1_SLOTEN_ACTIVE_0 | SAI_GEN_CFG1_SLOTEN_ACTIVE_1;
	sai_slot_t.DataSize = SAI_GEN_CFG1_DS_16;//SAI_GEN_CFG1_DS_8;
	sai_slot_t.RestoreSize = SAI_FIFOCTRL_FTH_SIZE_EMPTY;//SAI_FIFOCTRL_FTH_SIZE_8;
	sai_slot_t.DmaState = SAI_FIFOCTRL_DMAEN_ENABLE;

	/* SAI1 A reg init */
	SAI_Init(SAI0_S0_CFG_A, &sai_init_t,&sai_frame_t,&sai_slot_t);
    sai_init_t.AudioMode = SAI_AUDIOCTRL_MODE_MASTER_RX;
    sai_init_t.Syncin = SAI_AUDIOCTRL_SYNCIN_NOSYNCIN;
    sai_init_t.Syncout = SAI_AUDIOCTRL_SYNCOUT_ENABLE;
    SAI_Init(SAI0_S0_CFG_B, &sai_init_t,&sai_frame_t,&sai_slot_t);

	sai_clock_t.Mckdiv = 48 << 2; //10-> FS = 15.6khz
	sai_clock_t.NoDivider = 0;
	sai_clock_t.OverSamplingRatio = 1;
	SAI_ClockInit(SAI0_S0_CFG_A, &sai_clock_t);

	sai_clock_t.Mckdiv = 48 << 2; //10-> FS = 15.6khz
	sai_clock_t.NoDivider = 0;
	sai_clock_t.OverSamplingRatio = 1;
	SAI_ClockInit(SAI0_S0_CFG_B, &sai_clock_t);

	/* SAI0 S0 A Playback start */
	SAI_Config(SAI0_S0_CFG_A, ENABLE);

	SAI_Config(SAI0_S0_CFG_B, ENABLE);

    while(1) {
    	if(state0 == 0)
    		delay_1ms(10);
    	else
    	{
    		state0 = 0;
    		break;
    	}
    }
#endif
    delay_1ms(5000);
    printf("playback end\r\n");
    delay_1ms(5000);
    while(1) {}
}

itom1900
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目前从事linux驱动开发，多交流多学习吧
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