jlink 调试 ；uboot 修改、编译、烧写;

./ltib -m prep -p u-boot

./ltib -m scbuild -p u-boot

pkgs/kobs-ng-11.01.00.tar.gz   nand 烧写时需要

nand 针脚移植：pad控制，mutex复用：

uboot生成时的system.map中存储所有函数的地址,jlink可以直接操作imx53的控制寄存器（mem32读，w4写），ddr需初始化后才能读写

PATA_DATA0-16 ALT3;

jlink 调试

loadbin d:/uboot.bin 77800000    //f8000000
setpc 77800000

在uboot生成的文件中，有system.map文件，包含所有函数的执行地址

未经初始化SDRAM时，不能访问DDR的地址范围：0x7000_0000(CS0)  和0xB000_0000(CS1)，即：mem32 70000000 2  会出错
汇编代码查看：在调试机器代码时，可以用 /opt/freescale/usr/local/gcc-4.4.4-glibc-2.11.1-multilib-1.0/arm-fsl-linux-gnueabi/bin/arm-fsl-linux-gnueabi-objdump -dlib_arm/board.o

EIM_D16-31,  EIM_A25-16,   EIM_DA15-0

单独编译u-boot脚本，不需要执行 ./ltib -c

ddr3

F800_0000 F801_FFFF 128K iRAM (OCRAM)
F802_0000 F805_FFFF 256K GPU3D GMEM

1，修改链接地址 board/freescale/mx53_loco/config.mk    TEXT_BASE = 0xf8000000,

2，flash_header.S 中，修改 boot_data:        .word 0xf8000000  /*77800000*/

3，include/configs/mx53_loco.h   //#define CONFIG_ARCH_MMU

NAND 调试（bootCFG1【7-0】=1(nand boot)0(pata pads)00(one device)    10(5 address cycle)1(freq)0(disable mmu)

bootCFG2【7-0】= 01(2k+64b)0(8 bit)1(axi/ddr freq)    1(osc freq) 1(freq/28) 0 0

bootCFG3【7-0】=0000  0     01(64page in block)    0

mem32 63FDB028   1  //config 3   20bit : 1 No_sdma

mem32 63fdb024 1   //config 2 14bit:0,  将 15bit 置1，禁止中断

mem32 F7FF0000 10   //ram buffer address,512 Byte,一组

w4 f7ff1e00 3000   //NFC_NAND_CMD : page read 命令，第一个：00，第二个命令: 30

mem32 f7ff1e00  1
w4 f7ff1e40 80     //启动auto read

mem32 F7FF0000 10

w4 f7ff1e00 1080   //prgram
w4 f7ff1e40 40       // 启动auto  wtite
w4 f7ff1e40 4

mem32 63FDB02C   1   //31 interrupt,当nfc完成原子操作后设置,              28bit nand is active

ax88180

loadbin D:\arm_SRAM_Init.bin  f8001000   //管脚复用设置    mem32 53fa8110 33    //53fa81d8  0     mem32 53fa82A4 11    //53fa82e0   3
setpc  f8001000
g
h
mem32 53fa8110 33
mem32 53fa82A4 11
w4 53fa8004  19001b      //  1a  选择cs1  011010(01:64 MB,1 enable,)
w4 63fda000 630081     //enable eim_cs0  p1120
w4 63fda018 1300b7      //enable eim_cs1  p1120
w4 63fda094 10              //aclk 使能  0x10

mem32 63fda090 1   //启用debug模式下的bclk
w4 63fda090  21

#!/bin/bash
export ARCH=arm
export CROSS_COMPILE="/opt/freescale/usr/local/gcc-4.4.4-glibc-2.11.1-multilib-1.0/arm-fsl-linux-gnueabi/bin/arm-none-linux-gnueabi-"
export PATH=$PATH:"/opt/freescale/usr/local/gcc-4.4.4-glibc-2.11.1-multilib-1.0/arm-fsl-linux-gnueabi/"
make mx53_loco_config
make

jlink v8 + 驱动 调试

The on-chip internal RAM starts at address 0xF800_0000 and is 128 Kbytes in density

player.ini  指定UCL_INSTALL_SECTION，UTP_UPDATE（UTPmode），MX_UPDATE（RKLmode）

UTPmode operation can be applied to all i.MX platforms, while RKL mode operationcan only be applied to Bulk-IO mode i.MX device.

RKLmode operation is selected by specifying MX_UPDATE 

安装ads1.2

打开AXD,option--->configure target,点ADD，添加jlink安装目录下的JLinkRDI.dll文件

keil

DDR initialization is coded in the DCD table

requires configuring the relevant I/O pins with the right mode and
impedance and initializing the ESDCTL module.

1. To port to the custom board, the appropriate DDR initialization needs to be used. This is the same
initialization as would be used in a JTAG initialization script.
2. Open the file board/freescale/mx53_<custom board name>/flash_header.S
3. Modify all MXC_DCD_ITEM macros to match the memory specifications

If you change the number of MXC_DCD_ITEM lines in the DCD table, you
must update the value of the dcd_hdr and write_dcd_cmd labels according
to the number of items.

To further customize your U-Boot board project, use the first function that system boot calls on:
start_armboot in "lib_arm/board.c".
board_init() 

init_sequence[]
array of function pointers.

 

NAND MTD driver. These files are under the
<ltib_dir>/rpm/BUILD/linux/drivers/mtd/nand directory.

under Device Driver > Memory Technology Device (MTD) support >
NAND Device Support > MXC NAND Version 3 support.

The generic NAND driver nand_base.c provides all functions that are necessary to identify, read, write,
and erase NAND Flash. The hardware-dependent functions are provided by the hardware driver
mxc_nd.c/mxc_nd2.c depending on the NFC version. It mainly provides the hardware access information
and functions for the generic NAND driver

 

setenv bootargs_nand 'setenv bootargs ${bootargs} root=/dev/mtdblock4 rootfstype=jffs2 rw ip=dhcp'
setenv bootcmd_nand 'run bootargs_base bootargs_nand;nand read ${loadaddr} 0x1000000 0x300000;bootm'