TI-AM335X GPMC 7个config寄存器重点

最新推荐文章于 2025-01-25 11:30:20 发布

jangel_lee

最新推荐文章于 2025-01-25 11:30:20 发布

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本文详细介绍了GPMC（General Purpose Memory Controller）配置寄存器的功能及设置方法，包括时钟频率选择、时间延迟调整、地址数据复用配置、设备类型与大小设定等，并针对SRAM设备给出了具体的配置建议。

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每个Config寄存器有32位

Config1：

1-0 GPMCFCLKDIVIDER Divides the GPMC.FCLK clock

//用于设置时钟使用默认0

0 GPMC_CLK frequency = GPMC_FCLK frequency

1h GPMC_CLK frequency = GPMC_FCLK frequency/2

2h GPMC_CLK frequency = GPMC_FCLK frequency/3

3h GPMC_CLK frequency = GPMC_FCLK frequency/4

4 TIMEPARAGRANULARITY Signals timing latencies scalar factor (Rd/WRCycleTime, AccessTime,PageBurstAccessTime, CSOnTime, CSRd/WrOffTime, ADVOnTime,

//设置时间速度有关，没懂，默认0

ADVRd/WrOffTime, OEOnTime, OEOffTime, WEOnTime, WEOffTime,

Cycle2CycleDelay, BusTurnAround, TimeOutStartValue)

0 ×1 latencies

1 ×2 latencies

9-8 MUXADDDATA Enables the Address and data multiplexed protocol (Reset value is CS0MUXDEVICE input pin sampled at IC reset for CS[0] and 0 for CS[1-5])

//使用默认 0

0 Non-multiplexed attached device

1h AAD-multiplexed protocol device

2h Address and data multiplexed attached device

3h Reserved

11-10 DEVICETYPE Selects the attached device type

//默认0，我的是SRAM

0 NOR Flash like, asynchronous and synchronous devices
1h Reserved
2h NAND Flash like devices, stream mode
3h Reserved

13-12 DEVICESIZE Selects the device size attached (Reset value is BOOTDEVICESIZE input

//终于自己设置了，要操作的ram是16位的，当然以后操作别的ram就改为其它的

pin sampled at IC reset for CS[0] and 01 for CS[1-5])
0 8 bit
1h 16 bit
2h Reserved
3h Reserved

28 WRITEMULTIPLE Selects the write single or multiple access

//28 30设置读写为单个或复用？有点不肯定，但这里都设置为0

0 Single access
1 Multiple access (burst if synchronous, considered as single if asynchronous)

30 READMULTIPLE Selects the read single or multiple access

0 single access
1 multiple access (burst if synchonous, page if asynchronous)

config2-6:

//按照芯片手册757页时序图配置

config7:

5-0 BASEADDRESS 0-3Fh Chip-select base address.

//设置为0x10；A24设置为有效

CSi base address where i = 0 to 3 (16 Mbytes minimum granularity). Bits [5-0] corresponds

to A29, A28, A27, A26, A25, and A24.

11-8 MASKADDRESS Chip-select mask address. Values not listed must be avoided as they create holes in the chip-select address space.

//默认设置为0

0 Chip-select size of 256 Mbytes

8h Chip-select size of 128 Mbytes

Ch Chip-select size of 64 Mbytes

Eh Chip-select size of 32 Mbytes

Fh Chip-select size of 16 Mbytes