ARM Cortex-A Series Processors

1.ARM Cortex-A Series Processors

The ARM Cortex-A series of applications processors provide a range of solutions for devices undertaking complex compute tasks, such as hosting a rich Operating System (OS) platform, and supporting multiple software applications.

2.Cortex-A Series Characteristics

All ARMv7-A and ARMv8-A based processor cores featured in the current ARM Processor Portfolio support ARM’s multicore technologies.

Single to quad-core implementation for performance orientated applications Supports symmetric and asymmetric OS implementations
Coherency throughout the processor exported to system via Accelerator Coherency Port (ACP) The big.LITTLE compatible processors extend multi-core coherence beyond the 1-4 core clusters with AMBA® 4 ACE (AMBA Coherency Extension) and AMBA 5 CHI (Coherent Hub Interface).

A number of key points are common to the Cortex-A family of devices:

  • 32-bit RISC core, with 16 × 32-bit visible registers with mode-based
    register banking
  • Modified Harvard Architecture (separate, concurrent access to
    instructions and data)
  • Load/Store Architecture
  • Thumb-2 technology as standard
  • VFP and NEON options
  • Backward compatibility with code from previous ARM processors
  • 4GB of virtual address space and a minimum of 4GB of physical address space
  • Hardware translation table walking for virtual to physical address
    translation
  • Virtual page sizes of 4KB, 64KB, 1MB and 16MB. Cacheability
    attributes and access permissions can be set on a per-page basis
  • Big-endian and little-endian data access support
  • Unaligned access support for basic load/store instructions
  • Symmetric Multi-processing (SMP) support on MPCore™ variants, that is, multi-core versions of the Cortex-A series processors, with full data coherency at the L1 cache level. Automatic cache and TranslationLookaside Buffer (TLB) maintenance propagation provides high efficiency SMP operation

3.ARM Cortex-A Series Processors

The ARM Cortex-A series of applications processors provide a range of solutions for devices undertaking complex compute tasks, such as hosting a rich Operating System (OS) platform, and supporting multiple software applications.

  • Cortex-A73
  • Cortex-A72
  • Cortex-A57
  • Cortex-A53
  • Cortex-A35
  • Cortex-A32
  • Cortex-A17
  • Cortex-A15
  • Cortex-A9
  • Cortex-A8
  • Cortex-A7
  • Cortex-A5
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This Cortex-A Series Programmer’s Guide is protected by copyright and the practice or implementation of the information herein may be protected by one or more patents or pending applications. No part of this Cortex-A Series Programmer’s Guide may be reproduced in any form by any means without the express prior written permission of ARM. No license, express or implied, by estoppel or otherwise to any intellectual property rights is granted by this Cortex-A Series Programmer’s Guide. Your access to the information in this Cortex-A Series Programmer’s Guide is conditional upon your acceptance that you will not use or permit others to use the information for the purposes of determining whether implementations of the information herein infringe any third party patents. This Cortex-A Series Programmer’s Guide is provided “as is”. ARM makes no representations or warranties, either express or implied, included but not limited to, warranties of merchantability, fitness for a particular purpose, or non-infringement, that the content of this Cortex-A Series Programmer’s Guide is suitable for any particular purpose or that any practice or implementation of the contents of the Cortex-A Series Programmer’s Guide will not infringe any third party patents, copyrights, trade secrets, or other rights. This Cortex-A Series Programmer’s Guide may include technical inaccuracies or typographical errors. To the extent not prohibited by law, in no event will ARM be liable for any damages, including without limitation any direct loss, lost revenue, lost profits or data, special, indirect, consequential, incidental or punitive damages, however caused and regardless of the theory of liability, arising out of or related to any furnishing, practicing, modifying or any use of this Programmer’s Guide, even if ARM has been advised of the possibility of such damages. The information provided herein is subject to U.S. export control laws, including the U.S. Export Administration Act and its associated regulations, and may be subject to export or import regulations in other countries. You agree to comply fully with all laws and regulations of the United States and other countries (“Export Laws”) to assure that neither the information herein, nor any direct products thereof are; (i) exported, directly or indirectly, in violation of Export Laws, either to any countries that are subject to U.S. export restrictions or to any end user who has been prohibited from participating in the U.S. export transactions by any federal agency of the U.S. government; or (ii) intended to be used for any purpose prohibited by Export Laws, including, without limitation, nuclear, chemical, or biological weapons proliferation. Words and logos marked with ® or ™ are registered trademarks or trademarks of ARM Limited, except as otherwise stated below in this proprietary notice. Other brands and names mentioned herein may be the trademarks of their respective owners. Copyright © 2011, 2012 ARM Limited, 110 Fulbourn Road Cambridge, CB1 9NJ, England This document is Non-Confidential but any disclosure by you is subject to you providing notice to and the

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