6. 内核解压-cache off

__armv7_mmu_cache_off:
        /* 读取sctlr */
        mrc p15, 0, r0, c1, c0
#ifdef CONFIG_MMU
        /* 1. Data and unified caches enabled.
         * 2. MMU enabled.
         */
        bic r0, r0, #0x000d
#else
        /* 1. Data and unified caches enabled. */
        bic r0, r0, #0x000c
#endif
        /* 对于I-cache这里怎么没有关闭？ */
        mcr p15, 0, r0, c1, c0  @ turn MMU and cache off
        mov r12, lr
        /* 清理和无效cache 之前已经分析过了 */
        bl  __armv7_mmu_cache_flush
        mov r0, #0
#ifdef CONFIG_MMU
        /* TLBIALL, invalidate unified TLB */
        mcr p15, 0, r0, c8, c7, 0   @ invalidate whole TLB
#endif
        /* BPIALL, Invalidate all branch predictors */
        mcr p15, 0, r0, c7, c5, 6   @ invalidate BTC
        mcr p15, 0, r0, c7, c10, 4  @ DSB
        mcr p15, 0, r0, c7, c5, 4   @ ISB
        mov pc, r12

1. 关闭了d-cache和mmu
2. 清理和无效cache
3. 无效分支预测