Each processor has a separate IDT so that different processors can run different ISRs, if
appropriate. For example, in a multiprocessor system, each processor receives the clock interrupt,
but only one processor updates the system clock in response to this interrupt.
Interrupts are serviced in priority order, and a higher-priority interrupt preempts the servicing
of a lower-priority interrupt. When a high-priority interrupt occurs, the processor saves
the interrupted thread’s state and invokes the trap dispatchers associated with the interrupt.
The trap dispatcher raises the IRQL and calls the interrupt’s service routine. After the
service routine executes, the interrupt dispatcher lowers the processor’s IRQL to where it
was before the interrupt occurred and then loads the saved machine state.
each processor has an IRQL setting