为了移植yaffs2文件系统,必须有nand的支持,linux-3.4.2 s5pv210 没有发现对nand的支持。
参考2.6.35把nand的驱动移植过来。
1. 配置内核MTD
Device drivers-->Memory TechnologyDevice(MTD) support --->
Caching block device access to MTD devices 必须选上,否则yaffs出不来,这里就先配置上。
2. copy drivers/mtd/nand/s3c_nand.c(从2.6.35内核中复制过来)
自己要重新设置下分区信息
struct mtd_partition s3c_partition_info[] = {
{
.name = "bootloader",
.offset = (0), /* for bootloader */
.size = (SZ_1M),
},
{
.name = "params",
.offset = MTDPART_OFS_APPEND,
.size = (SZ_1M),
},
{
.name = "kernel",
.offset = MTDPART_OFS_APPEND,
.size = (SZ_8M),
},
{
.name = "rootfs",
.offset = MTDPART_OFS_APPEND,
.size = (0x1080000),
}
};
3. 其他文件配置
在plat/nand.h下,添加
struct s3c_nand_mtd_info {
uintchip_nr;
uintmtd_part_nr;
structmtd_partition *partition;
};
在mtd/makefile添加
mtd-$(CONFIG_MTD_PARTITIONS) += mtdpart.o
在arch/arm/mach-s5pv210/include/mach/map.h添加nand寄存器
/* NAND */
#define S5PV210_PA_NAND (0xB0E00000)
#define S5P_PA_NAND S5PV210_PA_NAND
#define S5PV210_SZ_NAND SZ_1M
#define S5P_SZ_NAND S5PV210_SZ_NAND
#define S5PV210_PA_CHIPID (0xE0000000)
#define S5P_PA_CHIPID S5PV210_PA_CHIPID
#define S5PV210_PA_SYSCON (0xE0100000)
#define S5P_PA_SYSCON S5PV210_PA_SYSCON
#define S5PV210_PA_GPIO (0xE0200000)
#define S5P_PA_GPIO S5PV210_PA_GPIO
在arch/arm/plat-samsung/devs.c添加:
#ifdef CONFIG_MTD_NAND
/* NAND Controller */
static struct resource s3c_nand_resource[]= {
[0]= {
.start = S5P_PA_NAND,
.end = S5P_PA_NAND + S5P_SZ_NAND - 1,
.flags = IORESOURCE_MEM,
}
};
struct platform_device s3c_device_nand = {
.name = "s5pv210-nand",
.id = -1,
.num_resources = ARRAY_SIZE(s3c_nand_resource),
.resource = s3c_nand_resource,
};
#endif
在mach-smdkv210.c中
static struct platform_device *smdkv210_devices[]__initdata
添加
#ifdef CONFIG_MTD_NAND
&s3c_device_nand,
#endif
在mach-s5pv210/clock.c中
static struct clk init_clocks_off[]
添加
{
.name = "nand",
.devname = "s5pv210-nand",
.parent = &clk_hclk_psys.clk,
.enable = s5pv210_clk_ip1_ctrl,
.ctrlbit = ((1 << 28) | (1 << 24)),
},
在plat/regs-nand.h最后添加
#if defined(CONFIG_ARCH_S5PV210)
#define S5P_NFREG(x) (x)
/* for s3c_nand.c */
#define S3C_NFCONF S5P_NFREG(0x00)
#define S3C_NFCONT S5P_NFREG(0x04)
#define S3C_NFCMMD S5P_NFREG(0x08)
#define S3C_NFADDR S5P_NFREG(0x0c)
#define S3C_NFDATA8 S5P_NFREG(0x10)
#define S3C_NFDATA S5P_NFREG(0x10)
#define S3C_NFMECCDATA0 S5P_NFREG(0x14)
#define S3C_NFMECCDATA1 S5P_NFREG(0x18)
#define S3C_NFSECCDATA S5P_NFREG(0x1c)
#define S3C_NFSBLK S5P_NFREG(0x20)
#define S3C_NFEBLK S5P_NFREG(0x24)
#define S3C_NFSTAT S5P_NFREG(0x28)
#define S3C_NFMECCERR0 S5P_NFREG(0x2c)
#define S3C_NFMECCERR1 S5P_NFREG(0x30)
#define S3C_NFMECC0 S5P_NFREG(0x34)
#define S3C_NFMECC1 S5P_NFREG(0x38)
#define S3C_NFSECC S5P_NFREG(0x3c)
#define S3C_NFMLCBITPT S5P_NFREG(0x40)
#define S3C_NF8ECCERR0 S5P_NFREG(0x44)
#define S3C_NF8ECCERR1 S5P_NFREG(0x48)
#define S3C_NF8ECCERR2 S5P_NFREG(0x4C)
#define S3C_NFM8ECC0 S5P_NFREG(0x50)
#define S3C_NFM8ECC1 S5P_NFREG(0x54)
#define S3C_NFM8ECC2 S5P_NFREG(0x58)
#define S3C_NFM8ECC3 S5P_NFREG(0x5C)
#define S3C_NFMLC8BITPT0 S5P_NFREG(0x60)
#define S3C_NFMLC8BITPT1 S5P_NFREG(0x64)
#define S3C_NFCONF_NANDBOOT (1<<31)
#define S3C_NFCONF_ECCCLKCON (1<<30)
#define S3C_NFCONF_ECC_MLC (1<<24)
#define S3C_NFCONF_ECC_1BIT (0<<23)
#define S3C_NFCONF_ECC_4BIT (2<<23)
#define S3C_NFCONF_ECC_8BIT (1<<23)
#define S3C_NFCONF_TACLS(x) ((x)<<12)
#define S3C_NFCONF_TWRPH0(x) ((x)<<8)
#define S3C_NFCONF_TWRPH1(x) ((x)<<4)
#define S3C_NFCONF_ADVFLASH (1<<3)
#define S3C_NFCONF_PAGESIZE (1<<2)
#define S3C_NFCONF_ADDRCYCLE (1<<1)
#define S3C_NFCONF_BUSWIDTH (1<<0)
#define S3C_NFCONT_ECC_ENC (1<<18)
#define S3C_NFCONT_LOCKTGHT (1<<17)
#define S3C_NFCONT_LOCKSOFT (1<<16)
#define S3C_NFCONT_MECCLOCK (1<<7)
#define S3C_NFCONT_SECCLOCK (1<<6)
#define S3C_NFCONT_INITMECC (1<<5)
#define S3C_NFCONT_INITSECC (1<<4)
#define S3C_NFCONT_nFCE1 (1<<2)
#define S3C_NFCONT_nFCE0 (1<<1)
#define S3C_NFCONT_INITECC (S3C_NFCONT_INITSECC | S3C_NFCONT_INITMECC)
#define S3C_NFSTAT_ECCENCDONE (1<<7)
#define S3C_NFSTAT_ECCDECDONE (1<<6)
#define S3C_NFSTAT_ILEGL_ACC (1<<5)
#define S3C_NFSTAT_RnB_CHANGE (1<<4)
#define S3C_NFSTAT_nFCE1 (1<<3)
#define S3C_NFSTAT_nFCE0 (1<<2)
#define S3C_NFSTAT_Res1 (1<<1)
#define S3C_NFSTAT_READY (1<<0)
#define S3C_NFSTAT_CLEAR ((1<<7) |(1<<6) |(1<<5)|(1<<4))
#define S3C_NFSTAT_BUSY (1<<0)
#define S3C_NFECCERR0_ECCBUSY (1<<31)
#endif
Konfig:添加
config MTD_NAND_S3C
tristate"NAND Flash support for S3C SoC"
dependson MTD_NAND && (ARCH_S5PC1XX || ARCH_S5PC11X || ARCH_S5PV2XX ||ARCH_S5PV210)
help
This enables the NAND flash controller on theS3C.
No board specfic support is done by thisdriver, each board
must advertise a platform_device for thedriver to attach.
config MTD_NAND_S3C_DEBUG
bool"S3C NAND driver debug"
dependson MTD_NAND_S3C
help
Enable debugging of the S3C NAND driver
config MTD_NAND_S3C_HWECC
bool"S3C NAND Hardware ECC"
dependson MTD_NAND_S3C
help
Enable the use of the S3C's internal ECCgenerator when
using NAND. Early versions of the chip havehad problems with
incorrect ECC generation, and if using these,the default of
software ECC is preferable.
If you lay down a device with the hardwareECC, then you will
currently not be able to switch to software,as there is no
implementation for ECC method used by the S3C
Makefile:添加
obj-$(CONFIG_MTD_NAND_S3C) += s3c_nand.o
3. 配置nand驱动
选择 Device Drivers--->MemoryTechnology Device(MTD) support--->
--->Nand Device Support --->NandFlash support for S3C SoC
![](https://img-my.csdn.net/uploads/201303/18/1363610298_3109.png)
4. 编译,最后打印出log如下:
[ 0.936525] S3C NAND Driver, (c) 2008 Samsung Electronics
[ 0.936702] S3C NAND Driver is using None ECC.
[ 0.940297] NAND device: Manufacturer ID: 0xec, Chip ID: 0xd3 (Samsung NAND 1GiB 3,3V 8-bit)
[ 0.948568] NAND_ECC_NONE selected by board driver. This is not recommended!
[ 0.955572] Creating 4 MTD partitions on "s5pv210-nand":
[ 0.960857] 0x000000000000-0x000000040000 : "bootloader"
[ 0.967204] 0x000000040000-0x000000060000 : "params"
[ 0.972000] 0x000000060000-0x000000860000 : "kernel"
[ 0.979828] 0x000000860000-0x0000018e0000 : "rootfs"
下次讲进行yaffs2的移植。