`timescale 1ns / 1ps
module Image_Processing(
input clk,
input rst_n,
input per_frame_vsync,
input per_frame_href,
input per_frame_clken,
input [7:0] per_img_red,
input [7:0] per_img_green,
input [7:0] per_img_blue,
output post_frame_vsync,
output post_frame_href,
output post_frame_clken,
/* output post_img_Bit */
output [7:0] post_img_Y,
output [7:0] post_img_Cb,
output [7:0] post_img_Cr
);
wire post0_frame_vsync;
wire post0_frame_href ;
wire post0_frame_clken;
wire post1_frame_vsync;
wire post1_frame_href ;
wire post1_frame_clken;
wire post2_frame_vsync;
wire post2_frame_href ;
wire post2_frame_clken;
wire post3_frame_vsync;
wire post3_frame_href ;
wire post3_frame_clken;
wire [7:0] post0_img_Y ;
wire [7:0] post0_img_Cb;
wire [7:0] post0_img_Cr;
wire [7:0] post1_img_Y;
wire post2_img_Bit;
wire post3_img_Bit;
RGB888_YCbCr444 RGB888_YCbCr444_inst(
//global clock
.clk (clk), //cmos video pixel clock
.rst_n (rst_n), //system reset
//Image data prepred to be processd
.per_frame_vsync (per_frame_vsync), //Prepared Image data vsync valid signal
.per_frame_href (per_frame_href), //Prepared Image data href vaild signal
.per_frame_clken (per_frame_clken), //Prepared Image data output/capture enable clock
.per_img_red (per_img_red), //Prepared Image red data input
.per_img_green (per_img_green), //Prepared Image green data input
.per_img_blue (per_img_blue), //Prepared Image blue data input
//Image data has been processd
.post_frame_vsync (post_frame_vsync), //Processed Image frame data valid signal
.post_frame_href (post_frame_href), //Processed Image hsync data valid signal
.post_frame_clken (post_frame_clken), //Processed Image data output/capture enable clock
.post_img_Y (post_img_Y), //Processed Image brightness output
.post_img_Cb (post_img_Cb), //Processed Image blue shading output
.post_img_Cr (post_img_Cr) //Processed Image red shading output
);
//-----------------------------------------//
//-----------------¾ùÖµÂ˲¨----------------//
/* mean_filter mean_filter_inst(
//global clock
.clk (clk),
.rst_n (rst_n),
//Image data prepred to be processd
.per_frame_vsync (post0_frame_vsync),
.per_frame_href (post0_frame_href),
.per_frame_clken (post0_frame_clken),
.per_img_Y (post0_img_Y),
//Image data has been processd
.post_frame_vsync (post_frame_vsync),
.post_frame_href (post_frame_href),
.post_frame_clken (post_frame_clken),
.post_img_Y (post_img_Y)
);
*/
//-----------------------------------------//
//--------------Sobel±ßÔµ¼ì²â--------------//
/* Sobel_Edge_Detector Sobel_Edge_Detector_inst(
//global clock
.clk (clk),
.rst_n (rst_n),
//Image data prepred to be processd
.per_frame_vsync (post1_frame_vsync),
.per_frame_href (post1_frame_href),
.per_frame_clken (post1_frame_clken),
.per_img_Y (post1_img_Y),
//Image data has been processd
.post_frame_vsync (post_frame_vsync),
.post_frame_href (post_frame_href),
.post_frame_clken (post_frame_clken),
.post_img_Bit (post_img_Bit),
//User interface
.Sobel_Threshold (80)
); */
//-----------------------------------------//
//-------------------¸¯Ê´------------------//
/* erosion erosion_inst(
//global clock
.clk (clk), //cmos video pixel clock
.rst_n (rst_n), //global reset
//Image data prepred to be processd
.per_frame_vsync (post2_frame_vsync), //Prepared Image data vsync valid signal
.per_frame_href (post2_frame_href), //Prepared Image data href vaild signal
.per_frame_clken (post2_frame_clken), //Prepared Image data output/capture enable clock
.per_img_Bit (post2_img_Bit), //Prepared Image brightness input
//Image data has been processd
.post_frame_vsync (post3_frame_vsync), //Processed Image data vsync valid signal
.post_frame_href (post3_frame_href), //Processed Image data href vaild signal
.post_frame_clken (post3_frame_clken), //Processed Image data output/capture enable clock
.post_img_Bit (post3_img_Bit) //Processed Image Bit flag outout(1: Value, 0:inValid)
);
//-----------------------------------------//
//-------------------ÅòÕÍ------------------//
dilation dilation_inst(
//global clock
.clk (clk), //cmos video pixel clock
.rst_n (rst_n), //global reset
//Image data prepred to be processd
.per_frame_vsync (post3_frame_vsync), //Prepared Image data vsync valid signal
.per_frame_href (post3_frame_href), //Prepared Image data href vaild signal
.per_frame_clken (post3_frame_clken), //Prepared Image data output/capture enable clock
.per_img_Bit (post3_img_Bit), //Prepared Image brightness input
//Image data has been processd
.post_frame_vsync (post_frame_vsync), //Processed Image data vsync valid signal
.post_frame_href (post_frame_href), //Processed Image data href vaild signal
.post_frame_clken (post_frame_clken), //Processed Image data output/capture enable clock
.post_img_Bit (post_img_Bit) //Processed Image Bit flag outout(1: Value, 0:inValid) */
/* ); */
endmodule
图像处理6:顶层文件
最新推荐文章于 2022-12-01 22:03:47 发布