1.修改QcomPkg/SocPkg/AgattiPkg/Settings/I2C/core/i2c_devcfg.c
// // CONFIGURATION START ============================================ // #define TOP_QUP_00_SDA TLMM_GPIO_CFG(0, 1, TLMM_GPIO_OUTPUT, TLMM_GPIO_PULL_UP, TLMM_GPIO_2MA) #define TOP_QUP_00_SCL TLMM_GPIO_CFG(1, 1, TLMM_GPIO_OUTPUT, TLMM_GPIO_PULL_UP, TLMM_GPIO_2MA) #define TOP_QUP_01_SDA TLMM_GPIO_CFG(4, 1, TLMM_GPIO_OUTPUT, TLMM_GPIO_PULL_UP, TLMM_GPIO_2MA) #define TOP_QUP_01_SCL TLMM_GPIO_CFG(5, 1, TLMM_GPIO_OUTPUT, TLMM_GPIO_PULL_UP, TLMM_GPIO_2MA) #define TOP_QUP_02_SDA TLMM_GPIO_CFG(6, 1, TLMM_GPIO_OUTPUT, TLMM_GPIO_PULL_UP, TLMM_GPIO_2MA) #define TOP_QUP_02_SCL TLMM_GPIO_CFG(7, 1, TLMM_GPIO_OUTPUT, TLMM_GPIO_PULL_UP, TLMM_GPIO_2MA) #define TOP_QUP_03_SDA TLMM_GPIO_CFG(8, 1, TLMM_GPIO_OUTPUT, TLMM_GPIO_PULL_UP, TLMM_GPIO_2MA) #define TOP_QUP_03_SCL TLMM_GPIO_CFG(9, 1, TLMM_GPIO_OUTPUT, TLMM_GPIO_PULL_UP, TLMM_GPIO_2MA) #define TOP_QUP_04_SDA TLMM_GPIO_CFG(96, 1, TLMM_GPIO_OUTPUT, TLMM_GPIO_PULL_UP, TLMM_GPIO_2MA) #define TOP_QUP_04_SCL TLMM_GPIO_CFG(97, 1, TLMM_GPIO_OUTPUT, TLMM_GPIO_PULL_UP, TLMM_GPIO_2MA) #define TOP_QUP_05_SDA TLMM_GPIO_CFG(14, 1, TLMM_GPIO_OUTPUT, TLMM_GPIO_PULL_UP, TLMM_GPIO_2MA) #define TOP_QUP_05_SCL TLMM_GPIO_CFG(15, 1, TLMM_GPIO_OUTPUT, TLMM_GPIO_PULL_UP, TLMM_GPIO_2MA)
@@ -3,41 +3,41 @@ @brief I2C Device Config data Copyright (c) 2019 - 2020 Qualcomm Technologies, Incorporated. All rights reserved. Qualcomm Technologies, Confidential and Proprietary. ===============================================================================*/ /*============================================================================= EDIT HISTORY when who what, where, why -------- --- ----------------------------------------------------------- 24/01/20 AG ported for Agatti 07/30/19 bng ported for Kamorta =============================================================================*/ #include <i2c_config.h> #include "gpi.h" // NOTE: QUPs are numbered starting from 0 as per the IO sheet #define ENABLE_QUP_01 //EEPROM - +#define ENABLE_QUP_05 #define QUPV3_0_CORE_BASE_ADDRESS 0x04A00000 #define QUPV3_0_CORE_COMMON_BASE_ADDRESS 0x04AC0000 #define TLMM_GPIO_CFG(gpio, func, dir, pull, drive) \ (((gpio) & 0x3FF) << 4 | \ ((func) & 0xF ) << 0 | \ ((dir) & 0x1 ) << 14 | \ ((pull) & 0x3 ) << 15 | \ ((drive)& 0xF ) << 17) #define TLMM_GPIO_INPUT 0x0 #define TLMM_GPIO_OUTPUT 0x1 #define TLMM_GPIO_PULL_UP 0x3 #define TLMM_GPIO_2MA 0x0 #define QUP_0 0 #define QUP_1 1 // @@ -230,37 +230,37 @@ plat_device_config i2c_device_config_05 = .se_clock = (uint8 **) (se_clocks_str_0 + 4), .clock_config = clk_cfg, }; #endif #ifdef ENABLE_QUP_05 plat_device_config i2c_device_config_06 = { .core_base_addr = (uint8 *) QUPV3_0_CORE_BASE_ADDRESS, .common_base_addr = (uint8 *) QUPV3_0_CORE_COMMON_BASE_ADDRESS, .core_offset = 0x00094000, .qupv3_instance = QUP_0, .core_index = 6, .core_irq = 0, .polled_mode = TRUE, .min_data_length_for_dma = 0, .gpi_index = 0, - .scl_encoding = TOP_QUP_06_SCL, - .sda_encoding = TOP_QUP_06_SDA, + .scl_encoding = TOP_QUP_05_SCL, + .sda_encoding = TOP_QUP_05_SDA, .tcsr_base_addr = (uint8 *) 0x00300000, .tcsr_reg_offset = 0x00000000, .tcsr_reg_value = 0x00000000, .common_clocks = (uint8 **) common_clocks_str_0, .se_clock = (uint8 **) (se_clocks_str_0 + 5), .clock_config = clk_cfg, }; #endif
通过SDA CLK GPIO 14/15确认ENABLE_QUP_05,i2c_device_config_06。
2.修改QcomPkg/SocPkg/AgattiPkg/Settings/I2C/core/i2c_devcfg.xml
@@ -31,20 +31,25 @@ when who what, where, why <!-- <device name="/dev/i2c3"> <props name="config" type="DALPROP_ATTR_TYPE_STRUCT_PTR"> i2c_device_config_03 </props> </device> <device name="/dev/i2c4"> <props name="config" type="DALPROP_ATTR_TYPE_STRUCT_PTR"> i2c_device_config_04 </props> </device> <device name="/dev/i2c5"> <props name="config" type="DALPROP_ATTR_TYPE_STRUCT_PTR"> i2c_device_config_05 </props> </device> + --> + <device name="/dev/i2c6"> + <props name="config" type="DALPROP_ATTR_TYPE_STRUCT_PTR"> i2c_device_config_06 </props> + </device> + <!-- <device name="/dev/i2c7"> <props name="config" type="DALPROP_ATTR_TYPE_STRUCT_PTR"> i2c_device_config_07 </props> </device> <device name="/dev/i2c8"> <props name="config" type="DALPROP_ATTR_TYPE_STRUCT_PTR"> i2c_device_config_08 </props> </device> <device name="/dev/i2c9"> <props name="config" type="DALPROP_ATTR_TYPE_STRUCT_PTR"> i2c_device_config_09 </props> </device> <device name="/dev/i2c10">
3. 修改QcomPkg/SocPkg/AgattiPkg/Library/MDPPlatformLib/MDPPlatformLib.c
@@ -32,20 +32,23 @@ extern "C" { #include "DDIChipInfo.h" #include "MDPTypes.h" #include "MDPPlatformLib.h" #include "MDPPlatformLibPanelConfig.h" #include "MDPSystem.h" #include "DisplayUtils.h" #include "npa.h" #include "pmapp_npa.h" #include "DDITlmm.h" #include "HALDSILib.h" +#include <i2c_config.h> +#include <i2c_api.h> +#include <Library/smb1351.h> /* ----------------------------------------------------------------------- ** Defines ** ----------------------------------------------------------------------- */ #define RB1_PANEL_SWITCH_GPIO 53 // RB1 panel switch gpio /* ----------------------------------------------------------------------- ** Local functions ** ----------------------------------------------------------------------- */ @@ -241,21 +244,23 @@ Function Definitions * * FUNCTION: PlatformClientInit() * * DESCRIPTION: * Initialize NPA client. * ***********************************************************************************************/ MDP_Status PlatformClientInit(MDP_Display_IDType eDisplayId, Panel_PowerCtrlParams *pPowerParams) { MDP_Status Status = MDP_STATUS_OK; - + //add to raise icl to support AC only bootup + smb1351_init(); + //add end NPAClientName aNPAClientName[MDP_DISPLAY_MAX] = { {PMIC_NPA_GROUP_ID_DISP_PRIM, "DisplayPrim"}, {PMIC_NPA_GROUP_ID_DISP_SEC, "DisplaySec"}, {PMIC_NPA_GROUP_ID_DISP_EXT_DP, "DisplayExt"}, }; if (eDisplayId >= MDP_DISPLAY_MAX ) { DEBUG ((EFI_D_ERROR, "DisplayDxe: Unsupported Display ID for power init.\n"));
4. 修改QcomPkg/SocPkg/AgattiPkg/Library/MDPPlatformLib/SMB1351.c
+static i2c_status smb1351_i2c_init(void) +{ + i2c_status istatus = I2C_SUCCESS; + + cfg.bus_frequency_khz = I2C_DEFAULT_BUS_FREQ; + cfg.slave_address = 0x6A; + cfg.mode = I2C; + cfg.slave_max_clock_stretch_us = 500; + cfg.core_configuration1 = 0; + cfg.core_configuration2 = 0; + + istatus = i2c_open(I2C_INSTANCE_006, &i2c_handle); + if (I2C_SUCCESS != istatus) + { + DEBUG((EFI_D_ERROR,"Failed to initialize I2C %d\n", istatus)); + } + + return istatus; +} + +int smb1351_i2c_deinit() +{ + i2c_close(i2c_handle); + + return I2C_SUCCESS; +} + + +/****************************************************************** + * + * smb1351 charger i2c read/write + * + ****************************************************************/ +i2c_status smb1351_charger_write_byte(UINT8 addr, UINT8 val) +{ + i2c_status istatus = I2C_SUCCESS; + UINT32 bytes_written = 0; + istatus = i2c_write(i2c_handle, &cfg, addr, 1, &val, 1, &bytes_written, 2500); + if (I2C_SUCCESS != istatus) { + DEBUG((EFI_D_ERROR, "Write Failed %d\n", + (uint32) istatus)); + return istatus; + } + return istatus; +} +i2c_status smb1351_charger_read_byte(UINT8 addr, UINT8 * val) +{ + i2c_status istatus = I2C_SUCCESS; + UINT32 bytes_read = 0; + + istatus = i2c_read(i2c_handle, &cfg, addr, 1, val, DATA_SIZE, &bytes_read, + 2500); + if (I2C_SUCCESS != istatus) { + DEBUG((EFI_D_ERROR, "read 0x%x Failed %d\n", addr, + (uint32) istatus)); + } + + return istatus; +} + +i2c_status smb1351_charger_update_bits(UINT8 reg, UINT8 mask, UINT8 data) +{ + i2c_status status = I2C_SUCCESS; + UINT8 reg_data = 0; + + status = smb1351_charger_read_byte(reg, ®_data); + + reg_data &= ~mask; + reg_data |= (data & mask); + status = smb1351_charger_write_byte(reg, reg_data); + + return status; +} +
5.必须确认TZ端也就是devcfg.mbn文件要改好。
当在内核中配置好 I2C 之后,还需要在 TZ 中把相应的 I2C 配置好。配置文件如下:TZ.XF.5.1/trustzone_images/core/settings/buses/qup_accesscontrol/qupv3/config/agatti/QUPAC_Access . c ,示例如下:const QUPv3_se_security_permissions_type qupv3_perms_default[] = { /*PeriphID, ProtocolID, Mode, NsOwner, bAllowFifo, bLoad, bModExcl */ {QUPV3_0_SE0, QUPV3_PROTOCOL_UART_4W, QUPV3_MODE_FIFO, AC_HLOS, TRUE, FALSE, FALSE }, // NFC eSE//Uart5 {QUPV3_0_SE1, QUPV3_PROTOCOL_I2C, QUPV3_MODE_FIFO, AC_HLOS, TRUE, TRUE, FALSE }, // SMB/NFC/EEPROM/PM8008 {QUPV3_0_SE2, QUPV3_PROTOCOL_I2C, QUPV3_MODE_GSI, AC_HLOS, FALSE, TRUE, FALSE }, // Legacy Touch {QUPV3_0_SE3, QUPV3_PROTOCOL_UART_4W, QUPV3_MODE_FIFO, AC_HLOS, TRUE, TRUE, FALSE }, // BT HCI {QUPV3_0_SE4, QUPV3_PROTOCOL_UART_2W, QUPV3_MODE_FIFO, AC_HLOS, TRUE, FALSE, FALSE }, // Debug UART +{QUPV3_0_SE5, QUPV3_PROTOCOL_I2C, QUPV3_MODE_FIFO, AC_HLOS, TRUE, TRUE, FALSE }, // Fingerprint };