高通8x12平台 mipi屏 调试 .

最新推荐文章于 2024-08-07 11:12:07 发布
最新推荐文章于 2024-08-07 11:12:07 发布
阅读量1.7k 收藏
点赞数

http://blog.csdn.net/u013786805/article/details/21630837

 

1.  一些描述

8x12平台和8x25平台的代码结构上还是有一些不同的，8x12平台的屏和TP都是通过 .dtsi文件管理的，QRD8X12_1935/bootable/bootloader/lk/dev/gcdb/display/include/

panel_hx8379a_wvga_video.h

[objc] view plain copy print ? 在CODE上查看代码片 派生到我的代码片
  1. /*--------------------------------------------------------------------------- 
  2.  * This file is autogenerated file using gcdb parser. Please do not edit it. 
  3.  * Update input XML file to add a new entry or update variable in this file 
  4.  * VERSION = "1.0" 
  5.  *---------------------------------------------------------------------------*/  
  6.   
  7. #ifndef _PANEL_HX8379A_WVGA_VIDEO_H_   
  8. #define _PANEL_HX8379A_WVGA_VIDEO_H_   
  9. /*---------------------------------------------------------------------------*/  
  10. /* HEADER files                                                              */  
  11. /*---------------------------------------------------------------------------*/  
  12. #include "panel.h"   
  13.   
  14. /*---------------------------------------------------------------------------*/  
  15. /* Panel configuration                                                       */  
  16. /*---------------------------------------------------------------------------*/  
  17. static struct panel_config hx8379a_wvga_video_panel_data = {  
  18.     "qcom,mdss_dsi_hx8379a_wvga_video", "dsi:0:", "qcom,mdss-dsi-panel",  
  19.     10, 0, "DISPLAY_1", 0, 0, 60, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0  
  20. };  
  21.   
  22. /*---------------------------------------------------------------------------*/  
  23. /* Panel resolution                                                          */  
  24. /*---------------------------------------------------------------------------*/  
  25. static struct panel_resolution hx8379a_wvga_video_panel_res = {  
  26.     480, 800, 100, 94, 40, 0, 6, 4, 6, 0, 0, 0, 0, 0, 0, 0, 0, 0  
  27. };  
  28.   
  29. /*---------------------------------------------------------------------------*/  
  30. /* Panel color information                                                   */  
  31. /*---------------------------------------------------------------------------*/  
  32. static struct color_info hx8379a_wvga_video_color = {  
  33.     24, 0, 0xff, 0, 0, 0  
  34. };  
  35.   
  36. /*---------------------------------------------------------------------------*/  
  37. /* Panel on/off command information                                          */  
  38. /*---------------------------------------------------------------------------*/  
  39. static char hx8379a_wvga_video_on_cmd0[] = {  
  40.     0x04, 0x00, 0x39, 0xC0,  
  41.     0xB9, 0xFF, 0x83, 0x79,  
  42. };  
  43.   
  44. static char hx8379a_wvga_video_on_cmd1[] = {  
  45.     0x03, 0x00, 0x39, 0xC0,  
  46.     0xBA, 0x51, 0x93, 0xFF,  
  47. };  
  48.   
  49. static char hx8379a_wvga_video_on_cmd2[] = {  
  50.     0x14, 0x00, 0x39, 0xC0,  
  51.     0xB1, 0x00, 0x50, 0x44,  
  52.     0xEA, 0x8D, 0x08, 0x11,  
  53.     0x11, 0x11, 0x27, 0x2F,  
  54.     0x9A, 0x1A, 0x42, 0x0B,  
  55.     0x6E, 0xF1, 0x00, 0xE6,  
  56. };  
  57.   
  58. static char hx8379a_wvga_video_on_cmd3[] = {  
  59.     0x0E, 0x00, 0x39, 0xC0,  
  60.     0xB2, 0x00, 0x00, 0x3C,  
  61.     0x08, 0x04, 0x19, 0x22,  
  62.     0x00, 0xFF, 0x08, 0x04,  
  63.     0x19, 0x20, 0xFF, 0xFF,  
  64. };  
  65.   
  66. static char hx8379a_wvga_video_on_cmd4[] = {  
  67.     0x20, 0x00, 0x39, 0xC0,  
  68.     0xB4, 0x80, 0x08, 0x00,  
  69.     0x32, 0x10, 0x03, 0x32,  
  70.     0x13, 0x70, 0x32, 0x10,  
  71.     0x08, 0x37, 0x01, 0x28,  
  72.     0x07, 0x37, 0x08, 0x35,  
  73.     0x08, 0x3D, 0x44, 0x08,  
  74.     0x00, 0x40, 0x08, 0x28,  
  75.     0x08, 0x30, 0x30, 0x04,  
  76. };  
  77.   
  78. static char hx8379a_wvga_video_on_cmd5[] = {  
  79.     0x30, 0x00, 0x39, 0xC0,  
  80.     0xD5, 0x00, 0x00, 0x0A,  
  81.     0x00, 0x01, 0x05, 0x00,  
  82.     0x03, 0x00, 0x88, 0x88,  
  83.     0x88, 0x88, 0x23, 0x01,  
  84.     0x67, 0x45, 0x02, 0x13,  
  85.     0x88, 0x88, 0x88, 0x88,  
  86.     0x88, 0x88, 0x88, 0x88,  
  87.     0x88, 0x88, 0x54, 0x76,  
  88.     0x10, 0x32, 0x31, 0x20,  
  89.     0x88, 0x88, 0x88, 0x88,  
  90.     0x88, 0x88, 0x00, 0x00,  
  91.     0x00, 0x00, 0x00, 0x00,  
  92. };  
  93.   
  94. static char hx8379a_wvga_video_on_cmd6[] = {  
  95.     0x24, 0x00, 0x39, 0xC0,  
  96.     0xE0, 0x79, 0x05, 0x0F,  
  97.     0x14, 0x23, 0x24, 0x3F,  
  98.     0x30, 0x46, 0x06, 0x10,  
  99.     0x13, 0x16, 0x17, 0x16,  
  100.     0x16, 0x13, 0x18, 0x05,  
  101.     0x0F, 0x14, 0x23, 0x24,  
  102.     0x3F, 0x30, 0x46, 0x06,  
  103.     0x10, 0x13, 0x16, 0x17,  
  104.     0x16, 0x16, 0x13, 0x18,  
  105. };  
  106.   
  107. static char hx8379a_wvga_video_on_cmd7[] = {  
  108.     0x80, 0x00, 0x39, 0xC0,  
  109.     0xC1, 0x01, 0x00, 0x07,  
  110.     0x10, 0x17, 0x1D, 0x2A,  
  111.     0x33, 0x3A, 0x43, 0x4A,  
  112.     0x52, 0x5B, 0x64, 0x6D,  
  113.     0x78, 0x7F, 0x88, 0x90,  
  114.     0x98, 0xA0, 0xA9, 0xB2,  
  115.     0xB9, 0xC1, 0xC9, 0xD1,  
  116.     0xD7, 0xDF, 0xE6, 0xED,  
  117.     0xF4, 0xFA, 0xFD, 0x00,  
  118.     0x00, 0x00, 0x00, 0x00,  
  119.     0x00, 0x00, 0x00, 0x00,  
  120.     0x00, 0x08, 0x10, 0x18,  
  121.     0x20, 0x28, 0x30, 0x38,  
  122.     0x40, 0x47, 0x4F, 0x58,  
  123.     0x60, 0x68, 0x70, 0x78,  
  124.     0x80, 0x88, 0x90, 0x98,  
  125.     0xA0, 0xA9, 0xB1, 0xB9,  
  126.     0xC1, 0xC9, 0xD1, 0xD8,  
  127.     0xE0, 0xE8, 0xF0, 0xF9,  
  128.     0xFE, 0x00, 0x00, 0x00,  
  129.     0x00, 0x00, 0x00, 0x00,  
  130.     0x00, 0x00, 0x00, 0x08,  
  131.     0x10, 0x18, 0x1E, 0x26,  
  132.     0x2E, 0x34, 0x3A, 0x41,  
  133.     0x49, 0x4F, 0x58, 0x5E,  
  134.     0x67, 0x6F, 0x77, 0x80,  
  135.     0x88, 0x8F, 0x97, 0x9F,  
  136.     0xA7, 0xAF, 0xB8, 0xBF,  
  137.     0xC7, 0xD1, 0xD8, 0xE3,  
  138.     0xEA, 0xF6, 0xFF, 0x00,  
  139.     0x00, 0x00, 0x00, 0x00,  
  140.     0x00, 0x00, 0x00, 0x00,  
  141. };  
  142.   
  143. static char hx8379a_wvga_video_on_cmd8[] = {  
  144.     0xcc, 0x02, 0x23, 0x80  
  145. };  
  146.   
  147. static char hx8379a_wvga_video_on_cmd9[] = {  
  148.     0x05, 0x00, 0x39, 0xC0,  
  149.     0xB6, 0x00, 0x9C, 0x00,  
  150.     0x9C, 0xFF, 0xFF, 0xFF,  
  151. };  
  152.   
  153. static char hx8379a_wvga_video_on_cmd10[] = {  
  154.     0x11, 0x00, 0x05, 0x80  
  155. };  
  156.   
  157. static char hx8379a_wvga_video_on_cmd11[] = {  
  158.     0x29, 0x00, 0x05, 0x80  
  159. };  
  160.   
  161. static struct mipi_dsi_cmd hx8379a_wvga_video_on_command[] = {  
  162.     {0x8, hx8379a_wvga_video_on_cmd0, 0x00},  
  163.     {0x8, hx8379a_wvga_video_on_cmd1, 0x00},  
  164.     {0x18, hx8379a_wvga_video_on_cmd2, 0x00},  
  165.     {0x14, hx8379a_wvga_video_on_cmd3, 0x00},  
  166.     {0x24, hx8379a_wvga_video_on_cmd4, 0x00},  
  167.     {0x34, hx8379a_wvga_video_on_cmd5, 0x00},  
  168.     {0x28, hx8379a_wvga_video_on_cmd6, 0x00},  
  169.     {0x84, hx8379a_wvga_video_on_cmd7, 0x00},  
  170.     {0x4, hx8379a_wvga_video_on_cmd8, 0x00},  
  171.     {0xc, hx8379a_wvga_video_on_cmd9, 0x00},  
  172.     {0x4, hx8379a_wvga_video_on_cmd10, 0x96},  
  173.     {0x4, hx8379a_wvga_video_on_cmd11, 0x78}  
  174. };  
  175.   
  176. #define HX8379A_WVGA_VIDEO_ON_COMMAND 12   
  177.   
  178.   
  179. static char hx8379a_wvga_videooff_cmd0[] = {  
  180.     0x28, 0x00, 0x05, 0x80  
  181. };  
  182.   
  183. static char hx8379a_wvga_videooff_cmd1[] = {  
  184.     0x10, 0x00, 0x05, 0x80  
  185. };  
  186.   
  187. static struct mipi_dsi_cmd hx8379a_wvga_video_off_command[] = {  
  188.     {0x4, hx8379a_wvga_videooff_cmd0, 0x32},  
  189.     {0x4, hx8379a_wvga_videooff_cmd1, 0x78}  
  190. };  
  191.   
  192. #define HX8379A_WVGA_VIDEO_OFF_COMMAND 2   
  193.   
  194.   
  195. static struct command_state hx8379a_wvga_video_state = {  
  196.     0, 0  
  197. };  
  198.   
  199. /*---------------------------------------------------------------------------*/  
  200. /* Command mode panel information                                            */  
  201. /*---------------------------------------------------------------------------*/  
  202. static struct commandpanel_info hx8379a_wvga_video_command_panel = {  
  203.     0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0  
  204. };  
  205.   
  206. /*---------------------------------------------------------------------------*/  
  207. /* Video mode panel information                                              */  
  208. /*---------------------------------------------------------------------------*/  
  209. static struct videopanel_info hx8379a_wvga_video_video_panel = {  
  210.     1, 0, 0, 0, 1, 1, 2, 0, 0x9  
  211. };  
  212.   
  213. /*---------------------------------------------------------------------------*/  
  214. /* Lane configuration                                                        */  
  215. /*---------------------------------------------------------------------------*/  
  216. static struct lane_configuration hx8379a_wvga_video_lane_config = {  
  217.     2, 1, 1, 1, 0, 0  
  218. };  
  219.   
  220. /*---------------------------------------------------------------------------*/  
  221. /* Panel timing                                                              */  
  222. /*---------------------------------------------------------------------------*/  
  223. static const uint32_t hx8379a_wvga_video_timings[] = {  
  224.     0x78, 0x1B, 0x11, 0x00, 0x3E, 0x43, 0x16, 0x1E, 0x1D, 0x03, 0x04, 0x00  
  225. };  
  226.   
  227. static struct panel_timing hx8379a_wvga_video_timing_info = {  
  228.     0, 4, 0x04, 0x1b  
  229. };  
  230.   
  231. /*---------------------------------------------------------------------------*/  
  232. /* Panel reset sequence                                                      */  
  233. /*---------------------------------------------------------------------------*/  
  234. static struct panel_reset_sequence hx8379a_wvga_video_reset_seq = {  
  235.     {2, 0, 2, }, {20, 2, 20, }, 2  
  236. };  
  237.   
  238. /*---------------------------------------------------------------------------*/  
  239. /* Backlight setting                                                         */  
  240. /*---------------------------------------------------------------------------*/  
  241. static struct backlight hx8379a_wvga_video_backlight = {  
  242.     0, 1, 255, 0, 1, 0  
  243. };  
  244.   
  245. #endif /*_PANEL_HX8379A_WVGA_VIDEO_H_*/  
/*---------------------------------------------------------------------------
 * This file is autogenerated file using gcdb parser. Please do not edit it.
 * Update input XML file to add a new entry or update variable in this file
 * VERSION = "1.0"
 *---------------------------------------------------------------------------*/

#ifndef _PANEL_HX8379A_WVGA_VIDEO_H_
#define _PANEL_HX8379A_WVGA_VIDEO_H_
/*---------------------------------------------------------------------------*/
/* HEADER files                                                              */
/*---------------------------------------------------------------------------*/
#include "panel.h"

/*---------------------------------------------------------------------------*/
/* Panel configuration                                                       */
/*---------------------------------------------------------------------------*/
static struct panel_config hx8379a_wvga_video_panel_data = {
	"qcom,mdss_dsi_hx8379a_wvga_video", "dsi:0:", "qcom,mdss-dsi-panel",
	10, 0, "DISPLAY_1", 0, 0, 60, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
};

/*---------------------------------------------------------------------------*/
/* Panel resolution                                                          */
/*---------------------------------------------------------------------------*/
static struct panel_resolution hx8379a_wvga_video_panel_res = {
	480, 800, 100, 94, 40, 0, 6, 4, 6, 0, 0, 0, 0, 0, 0, 0, 0, 0
};

/*---------------------------------------------------------------------------*/
/* Panel color information                                                   */
/*---------------------------------------------------------------------------*/
static struct color_info hx8379a_wvga_video_color = {
	24, 0, 0xff, 0, 0, 0
};

/*---------------------------------------------------------------------------*/
/* Panel on/off command information                                          */
/*---------------------------------------------------------------------------*/
static char hx8379a_wvga_video_on_cmd0[] = {
	0x04, 0x00, 0x39, 0xC0,
	0xB9, 0xFF, 0x83, 0x79,
};

static char hx8379a_wvga_video_on_cmd1[] = {
	0x03, 0x00, 0x39, 0xC0,
	0xBA, 0x51, 0x93, 0xFF,
};

static char hx8379a_wvga_video_on_cmd2[] = {
	0x14, 0x00, 0x39, 0xC0,
	0xB1, 0x00, 0x50, 0x44,
	0xEA, 0x8D, 0x08, 0x11,
	0x11, 0x11, 0x27, 0x2F,
	0x9A, 0x1A, 0x42, 0x0B,
	0x6E, 0xF1, 0x00, 0xE6,
};

static char hx8379a_wvga_video_on_cmd3[] = {
	0x0E, 0x00, 0x39, 0xC0,
	0xB2, 0x00, 0x00, 0x3C,
	0x08, 0x04, 0x19, 0x22,
	0x00, 0xFF, 0x08, 0x04,
	0x19, 0x20, 0xFF, 0xFF,
};

static char hx8379a_wvga_video_on_cmd4[] = {
	0x20, 0x00, 0x39, 0xC0,
	0xB4, 0x80, 0x08, 0x00,
	0x32, 0x10, 0x03, 0x32,
	0x13, 0x70, 0x32, 0x10,
	0x08, 0x37, 0x01, 0x28,
	0x07, 0x37, 0x08, 0x35,
	0x08, 0x3D, 0x44, 0x08,
	0x00, 0x40, 0x08, 0x28,
	0x08, 0x30, 0x30, 0x04,
};

static char hx8379a_wvga_video_on_cmd5[] = {
	0x30, 0x00, 0x39, 0xC0,
	0xD5, 0x00, 0x00, 0x0A,
	0x00, 0x01, 0x05, 0x00,
	0x03, 0x00, 0x88, 0x88,
	0x88, 0x88, 0x23, 0x01,
	0x67, 0x45, 0x02, 0x13,
	0x88, 0x88, 0x88, 0x88,
	0x88, 0x88, 0x88, 0x88,
	0x88, 0x88, 0x54, 0x76,
	0x10, 0x32, 0x31, 0x20,
	0x88, 0x88, 0x88, 0x88,
	0x88, 0x88, 0x00, 0x00,
	0x00, 0x00, 0x00, 0x00,
};

static char hx8379a_wvga_video_on_cmd6[] = {
	0x24, 0x00, 0x39, 0xC0,
	0xE0, 0x79, 0x05, 0x0F,
	0x14, 0x23, 0x24, 0x3F,
	0x30, 0x46, 0x06, 0x10,
	0x13, 0x16, 0x17, 0x16,
	0x16, 0x13, 0x18, 0x05,
	0x0F, 0x14, 0x23, 0x24,
	0x3F, 0x30, 0x46, 0x06,
	0x10, 0x13, 0x16, 0x17,
	0x16, 0x16, 0x13, 0x18,
};

static char hx8379a_wvga_video_on_cmd7[] = {
	0x80, 0x00, 0x39, 0xC0,
	0xC1, 0x01, 0x00, 0x07,
	0x10, 0x17, 0x1D, 0x2A,
	0x33, 0x3A, 0x43, 0x4A,
	0x52, 0x5B, 0x64, 0x6D,
	0x78, 0x7F, 0x88, 0x90,
	0x98, 0xA0, 0xA9, 0xB2,
	0xB9, 0xC1, 0xC9, 0xD1,
	0xD7, 0xDF, 0xE6, 0xED,
	0xF4, 0xFA, 0xFD, 0x00,
	0x00, 0x00, 0x00, 0x00,
	0x00, 0x00, 0x00, 0x00,
	0x00, 0x08, 0x10, 0x18,
	0x20, 0x28, 0x30, 0x38,
	0x40, 0x47, 0x4F, 0x58,
	0x60, 0x68, 0x70, 0x78,
	0x80, 0x88, 0x90, 0x98,
	0xA0, 0xA9, 0xB1, 0xB9,
	0xC1, 0xC9, 0xD1, 0xD8,
	0xE0, 0xE8, 0xF0, 0xF9,
	0xFE, 0x00, 0x00, 0x00,
	0x00, 0x00, 0x00, 0x00,
	0x00, 0x00, 0x00, 0x08,
	0x10, 0x18, 0x1E, 0x26,
	0x2E, 0x34, 0x3A, 0x41,
	0x49, 0x4F, 0x58, 0x5E,
	0x67, 0x6F, 0x77, 0x80,
	0x88, 0x8F, 0x97, 0x9F,
	0xA7, 0xAF, 0xB8, 0xBF,
	0xC7, 0xD1, 0xD8, 0xE3,
	0xEA, 0xF6, 0xFF, 0x00,
	0x00, 0x00, 0x00, 0x00,
	0x00, 0x00, 0x00, 0x00,
};

static char hx8379a_wvga_video_on_cmd8[] = {
	0xcc, 0x02, 0x23, 0x80
};

static char hx8379a_wvga_video_on_cmd9[] = {
	0x05, 0x00, 0x39, 0xC0,
	0xB6, 0x00, 0x9C, 0x00,
	0x9C, 0xFF, 0xFF, 0xFF,
};

static char hx8379a_wvga_video_on_cmd10[] = {
	0x11, 0x00, 0x05, 0x80
};

static char hx8379a_wvga_video_on_cmd11[] = {
	0x29, 0x00, 0x05, 0x80
};

static struct mipi_dsi_cmd hx8379a_wvga_video_on_command[] = {
	{0x8, hx8379a_wvga_video_on_cmd0, 0x00},
	{0x8, hx8379a_wvga_video_on_cmd1, 0x00},
	{0x18, hx8379a_wvga_video_on_cmd2, 0x00},
	{0x14, hx8379a_wvga_video_on_cmd3, 0x00},
	{0x24, hx8379a_wvga_video_on_cmd4, 0x00},
	{0x34, hx8379a_wvga_video_on_cmd5, 0x00},
	{0x28, hx8379a_wvga_video_on_cmd6, 0x00},
	{0x84, hx8379a_wvga_video_on_cmd7, 0x00},
	{0x4, hx8379a_wvga_video_on_cmd8, 0x00},
	{0xc, hx8379a_wvga_video_on_cmd9, 0x00},
	{0x4, hx8379a_wvga_video_on_cmd10, 0x96},
	{0x4, hx8379a_wvga_video_on_cmd11, 0x78}
};

#define HX8379A_WVGA_VIDEO_ON_COMMAND 12


static char hx8379a_wvga_videooff_cmd0[] = {
	0x28, 0x00, 0x05, 0x80
};

static char hx8379a_wvga_videooff_cmd1[] = {
	0x10, 0x00, 0x05, 0x80
};

static struct mipi_dsi_cmd hx8379a_wvga_video_off_command[] = {
	{0x4, hx8379a_wvga_videooff_cmd0, 0x32},
	{0x4, hx8379a_wvga_videooff_cmd1, 0x78}
};

#define HX8379A_WVGA_VIDEO_OFF_COMMAND 2


static struct command_state hx8379a_wvga_video_state = {
	0, 0
};

/*---------------------------------------------------------------------------*/
/* Command mode panel information                                            */
/*---------------------------------------------------------------------------*/
static struct commandpanel_info hx8379a_wvga_video_command_panel = {
	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
};

/*---------------------------------------------------------------------------*/
/* Video mode panel information                                              */
/*---------------------------------------------------------------------------*/
static struct videopanel_info hx8379a_wvga_video_video_panel = {
	1, 0, 0, 0, 1, 1, 2, 0, 0x9
};

/*---------------------------------------------------------------------------*/
/* Lane configuration                                                        */
/*---------------------------------------------------------------------------*/
static struct lane_configuration hx8379a_wvga_video_lane_config = {
	2, 1, 1, 1, 0, 0
};

/*---------------------------------------------------------------------------*/
/* Panel timing                                                              */
/*---------------------------------------------------------------------------*/
static const uint32_t hx8379a_wvga_video_timings[] = {
	0x78, 0x1B, 0x11, 0x00, 0x3E, 0x43, 0x16, 0x1E, 0x1D, 0x03, 0x04, 0x00
};

static struct panel_timing hx8379a_wvga_video_timing_info = {
	0, 4, 0x04, 0x1b
};

/*---------------------------------------------------------------------------*/
/* Panel reset sequence                                                      */
/*---------------------------------------------------------------------------*/
static struct panel_reset_sequence hx8379a_wvga_video_reset_seq = {
	{2, 0, 2, }, {20, 2, 20, }, 2
};

/*---------------------------------------------------------------------------*/
/* Backlight setting                                                         */
/*---------------------------------------------------------------------------*/
static struct backlight hx8379a_wvga_video_backlight = {
	0, 1, 255, 0, 1, 0
};

#endif /*_PANEL_HX8379A_WVGA_VIDEO_H_*/

参数的具体设置根据的屏而定，现在准备添加一块屏：

  1. 上面的 .h文件是第一个需要更改的地方，比较重要的几个参数：lane_config, video_timings, video_command的格式，这些地方如果出错可能导致屏不亮

2. 第二个需要修改的地方是QRD8X12_1935/bootable/bootloader/lk/target/msm8610/oem_panel.c,之前的8x25平台应该是没有这个文件的，这个文件会调用上面写好的 .h文件，按照里面的格式添加一块新屏，需要注意的地方是，看你的平台走的什么版本（QCT QRD）等，因为默认加载的屏也是不同的（可以通过打log看看是什么版本的）

3. 第三个需要更改的地方是 QRD8X12_1935/kernel/arch/arm/boot/dts/dsi-panel-hx8379a-wvga-video.dtsi  这个文件里面的参数跟上边的.h文件内参数是对应的

[objc] view plain copy print ? 在CODE上查看代码片 派生到我的代码片
  1. /*--------------------------------------------------------------------------- 
  2.  * This file is autogenerated file using gcdb parser. Please do not edit it. 
  3.  * Update input XML file to add a new entry or update variable in this file 
  4.  * VERSION = "1.0" 
  5.  *---------------------------------------------------------------------------*/  
  6. &mdss_mdp {  
  7.     dsi_hx8379a_wvga_vid: qcom,mdss_dsi_hx8379a_wvga_video {  
  8.         qcom,mdss-dsi-panel-name = "HX8379A wvga video mode dsi panel";  
  9.         qcom,mdss-dsi-panel-controller = <&mdss_dsi0>;  
  10.         qcom,mdss-dsi-panel-type = "dsi_video_mode";  
  11.         qcom,mdss-dsi-panel-destination = "display_1";  
  12.         qcom,mdss-dsi-panel-framerate = <60>;  
  13.         qcom,mdss-dsi-virtual-channel-id = <0>;  
  14.         qcom,mdss-dsi-stream = <0>;  
  15.         qcom,mdss-dsi-panel-width = <480>;  
  16.         qcom,mdss-dsi-panel-height = <800>;  
  17.         qcom,mdss-dsi-h-front-porch = <100>;  
  18.         qcom,mdss-dsi-h-back-porch = <94>;  
  19.         qcom,mdss-dsi-h-pulse-width = <40>;  
  20.         qcom,mdss-dsi-h-sync-skew = <0>;  
  21.         qcom,mdss-dsi-v-back-porch = <4>;  
  22.         qcom,mdss-dsi-v-front-porch = <6>;  
  23.         qcom,mdss-dsi-v-pulse-width = <6>;  
  24.         qcom,mdss-dsi-h-left-border = <0>;  
  25.         qcom,mdss-dsi-h-right-border = <0>;  
  26.         qcom,mdss-dsi-v-top-border = <0>;  
  27.         qcom,mdss-dsi-v-bottom-border = <0>;  
  28.         qcom,mdss-dsi-bpp = <24>;  
  29.         qcom,mdss-dsi-underflow-color = <0xff>;  
  30.         qcom,mdss-dsi-border-color = <0>;  
  31.         qcom,mdss-dsi-on-command = [  
  32.             39 01 00 00 00 00 04  
  33.                 B9 FF 83 79  
  34.             39 01 00 00 00 00 03  
  35.                 BA 51 93  
  36.             39 01 00 00 00 00 14  
  37.                 B1 00 50 44  
  38.                 EA 8D 08 11  
  39.                 11 11 27 2F  
  40.                 9A 1A 42 0B  
  41.                 6E F1 00 E6  
  42.             39 01 00 00 00 00 0E  
  43.                 B2 00 00 3C  
  44.                 08 04 19 22  
  45.                 00 FF 08 04  
  46.                 19 20  
  47.             39 01 00 00 00 00 20  
  48.                 B4 80 08 00  
  49.                 32 10 03 32  
  50.                 13 70 32 10  
  51.                 08 37 01 28  
  52.                 07 37 08 35  
  53.                 08 3D 44 08  
  54.                 00 40 08 28  
  55.                 08 30 30 04  
  56.             39 01 00 00 00 00 30  
  57.                 D5 00 00 0A  
  58.                 00 01 05 00  
  59.                 03 00 88 88  
  60.                 88 88 23 01  
  61.                 67 45 02 13  
  62.                 88 88 88 88  
  63.                 88 88 88 88  
  64.                 88 88 54 76  
  65.                 10 32 31 20  
  66.                 88 88 88 88  
  67.                 88 88 00 00  
  68.                 00 00 00 00  
  69.             39 01 00 00 00 00 24  
  70.                 E0 79 05 0F  
  71.                 14 23 24 3F  
  72.                 30 46 06 10  
  73.                 13 16 17 16  
  74.                 16 13 18 05  
  75.                 0F 14 23 24  
  76.                 3F 30 46 06  
  77.                 10 13 16 17  
  78.                 16 16 13 18  
  79.             39 01 00 00 00 00 80  
  80.                 C1 01 00 07  
  81.                 10 17 1D 2A  
  82.                 33 3A 43 4A  
  83.                 52 5B 64 6D  
  84.                 78 7F 88 90  
  85.                 98 A0 A9 B2  
  86.                 B9 C1 C9 D1  
  87.                 D7 DF E6 ED  
  88.                 F4 FA FD 00  
  89.                 00 00 00 00  
  90.                 00 00 00 00  
  91.                 00 08 10 18  
  92.                 20 28 30 38  
  93.                 40 47 4F 58  
  94.                 60 68 70 78  
  95.                 80 88 90 98  
  96.                 A0 A9 B1 B9  
  97.                 C1 C9 D1 D8  
  98.                 E0 E8 F0 F9  
  99.                 FE 00 00 00  
  100.                 00 00 00 00  
  101.                 00 00 00 08  
  102.                 10 18 1E 26  
  103.                 2E 34 3A 41  
  104.                 49 4F 58 5E  
  105.                 67 6F 77 80  
  106.                 88 8F 97 9F  
  107.                 A7 AF B8 BF  
  108.                 C7 D1 D8 E3  
  109.                 EA F6 FF 00  
  110.                 00 00 00 00  
  111.                 00 00 00 00  
  112.             23 01 00 00 00 00 02  
  113.                 cc 02  
  114.             39 01 00 00 00 00 05  
  115.                 B6 00 9C 00  
  116.                 9C  
  117.             05 01 00 00 96 00 02  
  118.                 11 00  
  119.             05 01 00 00 78 00 02  
  120.                 29 00  
  121.             ];  
  122.         qcom,mdss-dsi-off-command = [05 01 00 00 32 00 02 28 00  
  123.                     05 01 00 00 78 00 02 10 00];  
  124.         qcom,mdss-dsi-on-command-state = "dsi_lp_mode";  
  125.         qcom,mdss-dsi-off-command-state = "dsi_lp_mode";  
  126.         qcom,mdss-dsi-h-sync-pulse = <1>;  
  127.         qcom,mdss-dsi-traffic-mode = "burst_mode";  
  128.         qcom,mdss-dsi-lane-map = "lane_map_3012";  
  129.         qcom,mdss-dsi-bllp-eof-power-mode;  
  130.         qcom,mdss-dsi-bllp-power-mode;  
  131.         qcom,mdss-dsi-lane-0-state;  
  132.         qcom,mdss-dsi-lane-1-state;  
  133.         qcom,mdss-dsi-panel-timings = [78 1B 11 00 3E 43 16 1E 1D 03 04 00];  
  134.         qcom,mdss-dsi-t-clk-post = <0x04>;  
  135.         qcom,mdss-dsi-t-clk-pre = <0x1b>;  
  136.         qcom,mdss-dsi-bl-min-level = <1>;  
  137.         qcom,mdss-dsi-bl-max-level = <255>;  
  138.         qcom,mdss-dsi-dma-trigger = "trigger_sw";  
  139.         qcom,mdss-dsi-mdp-trigger = "none";  
  140.         qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled";  
  141.         qcom,mdss-dsi-reset-sequence = <1 20>, <0 2>, <1 20>;  
  142.   
  143.     };  
  144. };  
/*---------------------------------------------------------------------------
 * This file is autogenerated file using gcdb parser. Please do not edit it.
 * Update input XML file to add a new entry or update variable in this file
 * VERSION = "1.0"
 *---------------------------------------------------------------------------*/
&mdss_mdp {
	dsi_hx8379a_wvga_vid: qcom,mdss_dsi_hx8379a_wvga_video {
		qcom,mdss-dsi-panel-name = "HX8379A wvga video mode dsi panel";
		qcom,mdss-dsi-panel-controller = <&mdss_dsi0>;
		qcom,mdss-dsi-panel-type = "dsi_video_mode";
		qcom,mdss-dsi-panel-destination = "display_1";
		qcom,mdss-dsi-panel-framerate = <60>;
		qcom,mdss-dsi-virtual-channel-id = <0>;
		qcom,mdss-dsi-stream = <0>;
		qcom,mdss-dsi-panel-width = <480>;
		qcom,mdss-dsi-panel-height = <800>;
		qcom,mdss-dsi-h-front-porch = <100>;
		qcom,mdss-dsi-h-back-porch = <94>;
		qcom,mdss-dsi-h-pulse-width = <40>;
		qcom,mdss-dsi-h-sync-skew = <0>;
		qcom,mdss-dsi-v-back-porch = <4>;
		qcom,mdss-dsi-v-front-porch = <6>;
		qcom,mdss-dsi-v-pulse-width = <6>;
		qcom,mdss-dsi-h-left-border = <0>;
		qcom,mdss-dsi-h-right-border = <0>;
		qcom,mdss-dsi-v-top-border = <0>;
		qcom,mdss-dsi-v-bottom-border = <0>;
		qcom,mdss-dsi-bpp = <24>;
		qcom,mdss-dsi-underflow-color = <0xff>;
		qcom,mdss-dsi-border-color = <0>;
		qcom,mdss-dsi-on-command = [
			39 01 00 00 00 00 04
				B9 FF 83 79
			39 01 00 00 00 00 03
				BA 51 93
			39 01 00 00 00 00 14
				B1 00 50 44
				EA 8D 08 11
				11 11 27 2F
				9A 1A 42 0B
				6E F1 00 E6
			39 01 00 00 00 00 0E
				B2 00 00 3C
				08 04 19 22
				00 FF 08 04
				19 20
			39 01 00 00 00 00 20
				B4 80 08 00
				32 10 03 32
				13 70 32 10
				08 37 01 28
				07 37 08 35
				08 3D 44 08
				00 40 08 28
				08 30 30 04
			39 01 00 00 00 00 30
				D5 00 00 0A
				00 01 05 00
				03 00 88 88
				88 88 23 01
				67 45 02 13
				88 88 88 88
				88 88 88 88
				88 88 54 76
				10 32 31 20
				88 88 88 88
				88 88 00 00
				00 00 00 00
			39 01 00 00 00 00 24
				E0 79 05 0F
				14 23 24 3F
				30 46 06 10
				13 16 17 16
				16 13 18 05
				0F 14 23 24
				3F 30 46 06
				10 13 16 17
				16 16 13 18
			39 01 00 00 00 00 80
				C1 01 00 07
				10 17 1D 2A
				33 3A 43 4A
				52 5B 64 6D
				78 7F 88 90
				98 A0 A9 B2
				B9 C1 C9 D1
				D7 DF E6 ED
				F4 FA FD 00
				00 00 00 00
				00 00 00 00
				00 08 10 18
				20 28 30 38
				40 47 4F 58
				60 68 70 78
				80 88 90 98
				A0 A9 B1 B9
				C1 C9 D1 D8
				E0 E8 F0 F9
				FE 00 00 00
				00 00 00 00
				00 00 00 08
				10 18 1E 26
				2E 34 3A 41
				49 4F 58 5E
				67 6F 77 80
				88 8F 97 9F
				A7 AF B8 BF
				C7 D1 D8 E3
				EA F6 FF 00
				00 00 00 00
				00 00 00 00
			23 01 00 00 00 00 02
				cc 02
			39 01 00 00 00 00 05
				B6 00 9C 00
				9C
			05 01 00 00 96 00 02
				11 00
			05 01 00 00 78 00 02
				29 00
			];
		qcom,mdss-dsi-off-command = [05 01 00 00 32 00 02 28 00
					05 01 00 00 78 00 02 10 00];
		qcom,mdss-dsi-on-command-state = "dsi_lp_mode";
		qcom,mdss-dsi-off-command-state = "dsi_lp_mode";
		qcom,mdss-dsi-h-sync-pulse = <1>;
		qcom,mdss-dsi-traffic-mode = "burst_mode";
		qcom,mdss-dsi-lane-map = "lane_map_3012";
		qcom,mdss-dsi-bllp-eof-power-mode;
		qcom,mdss-dsi-bllp-power-mode;
		qcom,mdss-dsi-lane-0-state;
		qcom,mdss-dsi-lane-1-state;
		qcom,mdss-dsi-panel-timings = [78 1B 11 00 3E 43 16 1E 1D 03 04 00];
		qcom,mdss-dsi-t-clk-post = <0x04>;
		qcom,mdss-dsi-t-clk-pre = <0x1b>;
		qcom,mdss-dsi-bl-min-level = <1>;
		qcom,mdss-dsi-bl-max-level = <255>;
		qcom,mdss-dsi-dma-trigger = "trigger_sw";
		qcom,mdss-dsi-mdp-trigger = "none";
		qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled";
		qcom,mdss-dsi-reset-sequence = <1 20>, <0 2>, <1 20>;

	};
};

 

4. 第四个需要修改的地方是将kernel中屏的.dtsi文件include进msm8610-mdss-panel.dtsi中，否则编译过程中会提示错误。

5. 在例如msm8610-mtp.dtsi文件中加入屏的dsi-hx8379a-wvga-vid

          否则编译过程中也会报错。


还有一些其他问题待续。。。。。

orise厂的IC 9605a 开启CABC功能，添加寄存器如下：

29 01 00 00 00 00 02 
51 ff
29 01 00 00 00 00 02 
53 24 
29 01 00 00 00 00 02 
55 01

 

kynge136
关注
高通8x12平台 mipi屏 调试
u013786805的专栏
03-20 9163
8x12平台和8x25平台的代码结构上还是有一些不同的，8x12平台的屏和TP都是通过 .dtsi文件管理的，
A40I平台如何调试10.1寸MIPI屏？这份总结收好！
kjy2023的博客
03-13 1012
全志A40i如何调试10.1寸mipi屏，这个分享大家收藏好！
Android Qcom lcd display 学习（4）
u010783226的专栏
06-18 3288
lcd
MIPI接口调试经验总结
最新发布
weixin_43199439的博客
08-07 909
在调试MIPI（Mobile Industry Processor Interface）接口的过程中，理解其规范、协议及物理接口定义至关重要。以下是MIPI接口调试中的一些关键问题和建议。在调试MIPI（Mobile Industry Processor Interface）接口时，深入理解其规范、协议及物理接口定义至关重要。以下是MIPI接口调试中的关键问题、建议以及相关详细例子。
高通Android平台下关于display部分的几个关键问题
MyArrow的专栏
12-31 5344
显示部分的几个问题这几天通过实际测试澄清了一下，主要是下图中各个模块的使用状况以及HAL层几个模块的调用流程。以问题的方式描述如下： 0. SurfaceFlinger主要功能     SurfaceFlinger只是负责merge Surface的控制，如计算出两个Surface重叠的区域，至于Surface需要显示的内容，则通过Skia、OpenGL和pixflinger来计算。
高通android display subsystem
shichaog的专栏
03-10 7810
MDSS：Multimedia Display Sub-system Display driver包括： SurfaceFlinger，Hardware Composer（HWC），以及overlayFramebufferMIPI DSI驱动 系统架构 MDSS 1.0显示子系统 Soure Surface Processor（ViG， RGB，DMA-SSPA）---格式转
Qualcomm DragonBoard 410c Display之DSI浅析
LoongEmbedded的专栏
07-18 1721
https://blog.csdn.net/tamell5555/article/details/52129984 一. DSI简介   DSI全称是   Display  Serial   Interface,是mipi协议的一个规范。它定义了一个在平台端和panel之间的串行总线和通信协议，总线包括一条  Clock  lane和  1~4条  Date  lane。每条 lane有两条...
android高通平台regulator,Andorid：msm8909：MIPI转HDMI调试记录
weixin_42302384的博客
06-03 1221
写在前面SOC：Qualcomm msm8909Core-Board：SC20-CE QA/PJBase-Board：xxxLinux Kernel：xxxAndroid：7.1本次目的将核心板输出的MIPI显示信号通过LT8912B芯片转换成HDMI信号输出详细步骤LT8912B驱动的添加新增驱动文件：kernel\drivers\video\lt8912_dsi0.c/* Copyright ...
Qualcomm msm8916 MIPI to RGB 调试
素炒瓢儿白的CSDN博客
02-14 3300
简介 屏的接口种类非常多，常见的包括 RGB、HDMI、VGA、LVDS、EDP、MIPI等接口。 其中，在 Android 移动设备上，大多采用的是MIPI接口。 某些时候，由于某种需求，需要将 Android 设备上的 MIPI 数据显示到其他接口的屏上，此时，则需要利用相关转换芯片将 MIPI 接口的数据转换成其他接口的数据。 在 msm8916 上有过这样的需求：将 MIPI 数据转换成...
toshiba TC358764 mipi 转LVDS屏调试
u013786805的专栏
03-20 1万+
一. 首先要确认几个问题。 1. 这颗D2L转换芯片的控制方式是什么，写寄存器的方式是什么？这个问题从东芝FAE那里了解到，两种写入的方式都可以（通过长包发送或者I2C配置） The chip can be configured through the DSI link by sending write register commands through DSI Generic Long Wr
HX8369 驱动调试总结
xiaoaide01的专栏
09-28 8003
首先确定自己需要什么样的
LCD/HDMI OUT调试经验（6）------点亮HDMI屏幕
weixin_42847269的博客
05-07 2013
在调试display的经历中，除了一些手持类设备以外其他机器基本都会外接HDMI屏幕，显示原理之前也提过：由模块发出的MIPI信号经过9611或者9611uxc芯片输出HDMI信号最后在屏幕进行显示。这两款芯片的最主要差别是9611uxc最高可以支持到4K60fps 的输出画面而9611是4K30fps。和调试9211的大致步骤完全一样，9611和9611uxc的芯片也是分为添加驱动，上电和配置屏幕，只不过需要具体修改配置屏幕的一些参数。所以请先熟悉9211的调试再阅读本篇文章。 本文基于高通845平台，
SM7250(高通5G)平台LCD bringup
u010783226的专栏
12-15 5937
LCD
android初始化流程图,MSM8909+Android5.1.1启动流程---LCM初始化
weixin_35886741的博客
05-31 974
MSM8909+Android5.1.1启动流程---LCM初始化\bootable\bootloader\lk\app\aboot\aboot.caboot_init()--->target_display_init()--->gcdb_display_init()gcdb_display_init()函数的调用流程图1Mipi接口的显示屏初始化设置流程： 图2下面介绍这些函数1....
android lcd调试 高通平台lcd调试深入分析总结（mipi和rgb接口）
热门推荐
Focus on the Linux kernel
07-19 2万+
各位网友：最近发现我这篇文章转载的到处都是，有的则以原创存在，转载时请注明出处，还有文中错误的地方请指正！谢谢合作。 一：点亮lcd in kernel 其实点亮lcd很简单必须保证以后几个步骤正确： 1：确认Lcd信息所在文件被编译进去，并且lcd 和board name里面注册一质，倘若这部正确，那么log里面应该有对应分辨率的一段framebuffer同时调到相对应的power_on函
高通camera mipi不通的解决方法
ramiel_yang的专栏
03-30 5938
打开mipi中断的状态开关，也就是一个注册mipi中断的软件上的宏定义。 首先你要确定你的camera是几lane的，如果lane是对的，检查下模组，比如是2M的camera，是否真的使用了2lane，模组内部可能会断路使用一个lane。 其次你的平台配置如何，mipi的配置是否在stream on之前，中断状态是否有？ 再次，mipi的配置高通7x和8x是不一样的，走csi和csid的流程
漫谈android系统（4）bring up panel
The CnSkyline Blog
06-19 8093
LCDLCD 是指字面意思是液晶显示屏(Liquid Crystal Display), 而RAM: 随机存取存储器(Random-Access Memory）。控制IC是LCD的大脑。所谓的LCD RAM自然是指此大脑是否包含RAM.LCD的种类分类标准比多，按驱动方式可以分为：被动矩阵式、主动矩阵式两种: 被动矩阵式：被动矩阵式LCD又可分为TN-LCD(TwistedNematic-LCD，扭
高通移植mipi LCD的过程LK代码
weixin_30402343的博客
06-28 526
lk部分：（实现LCD兼容） 1. 函数定位 aboot_init()来到target_display_init()； 这就是高通原生lk LCD 兼容的关键所在。至于你需要兼容多少LCD 就在while（）设置了，具体代码就不跟下去了。 然后根据target中的不同文件来判断是否进入哪一个函数来处理： target_display_init() 函数里有很重要函数就是gcdb_display_i...
MTK平台MIPI LCM调试指南
"MTK平台MIPI LCM移植与调试指南" 本文主要介绍了MediaTek MT6573/75平台上MIPI LCM（Mobile Industry Processor Interface - Liquid Crystal Module）的相关知识，包括协议类型、硬件连接、移植步骤以及调试清单等...
评论
添加红包

请填写红包祝福语或标题

个

红包个数最小为10个

元

红包金额最低5元

当前余额3.43元 前往充值 >
需支付：10.00元
成就一亿技术人!
领取后你会自动成为博主和红包主的粉丝 规则
hope_wisdom
发出的红包
实付元
使用余额支付
点击重新获取
扫码支付
钱包余额 0

抵扣说明：

1.余额是钱包充值的虚拟货币，按照1:1的比例进行支付金额的抵扣。
2.余额无法直接购买下载，可以购买VIP、付费专栏及课程。

余额充值