STM8汇编 STM8S103F3汇编操作三轴电子指南针HMC5883（I2C接口）

HMC5883Init.l
  ld a, #60                 ; #60 = (0x1E << 1) is the write address for HMC5883L
  call I2CBegin
  ld a, #1                  ; place the configuration register B address in send-buffer.
  call I2CWrite             ; write register address
  ld a, #64                 ; ± 1.3 Ga 
  call I2CWrite             ; write config value
  call I2CEnd
  
  ld a, #60                 ; #60 = (0x1E << 1) is the write address for HMC5883L
  call I2CBegin
  ld a, #2                  ; place the mode register address in send-buffer.
  call I2CWrite             ; write register address
  ld a, #0                  ; place the command for Continuous operation Mode in send-buffer.
  call I2CWrite             ; write config value
  call I2CEnd
  
  callf Delay1ms
  ret

HMC5883Read.l
  ldw x, #ram_HMC5883_data_x
  ldw y, #3

ReadLoop.l
  ld a, #60                 ; #60 = (0x1E << 1) is the write address for HMC5883L
  call I2CBegin
  ld a, yl                  ; place register address in send-buffer.
  call I2CWrite             ; write register address
  call I2CEnd
  
  ld a, #61                 ; #61 = ((0x1E << 1) | 0x01) is the read address for HMC5883L
  call I2CBegin
  call I2CRead              ; read the value of magnetic components X(MSB)
  ld (x), a                 ; store the data in outputData buffer
  call I2CEnd
  
  incw x
  incw y
  cpw y, #8
  jrult ReadLoop  
  
  callf Delay100us
  
  ret
  
I2CInit.l
  bset CLK_PCKENR1, #0      ; I2C clock enabled
  bres I2C_CR1, #0          ; I2C disabled
  mov I2C_FREQR, #8         ; the FREQ field is used by the peripheral to generate data setup and hold times compliant
  mov I2C_OARH, #0
  mov I2C_OARL, #80         ; the address is not required in master mode
  mov I2C_CCRH, #0
  mov I2C_CCRL, #10         ; 100kHz = Fmaster / CCR * 2 = 8MHz / (40 * 2)
  mov I2C_TRISER, #9
  bset I2C_CR1, #0          ; I2C enabled
  ret
  
I2CBegin.l
  btjt I2C_SR3, #1, *       ; wait if bus is busy
  bset I2C_CR2, #2          ; no acknowledge returned
  bset I2C_CR2, #0          ; start generation
  btjf I2C_SR1, #0, *       ; SB(Start bit) = 1 when a Start condition generated.
  ld I2C_DR, a              ; write device I2C address and clear SB bit. the address must be real address << 1
  btjf I2C_SR1, #1, *       ; end of address transmission.
  ld a, I2C_SR1             ; ADDR bit is cleared by software reading SR1 register followed reading SR3
  ld a, I2C_SR3             ;
  ret

I2CEnd.l
  ld a, I2C_SR1             ; BTF Cleared by software reading the SR1
  ld a, I2C_DR              ; cleared by software reading the SR3
  bset I2C_CR2, #1          ; stop generation
  ret

I2CWrite.l
  btjf I2C_SR1, #7, *       ; TXE = 1 when DR is empty in transmission
  ld I2C_DR, a              ; write data
  btjf I2C_SR1, #2, *       ; BTF = 1 when byte transfer finished
  ret
  
I2CRead.l
  btjf I2C_SR1, #6, *       ; RXNE set when data register is not empty in receiver mode.
  ld a, I2C_DR              ; read data
  bres I2C_CR2, #2          ; no acknowledge returned
  ret

; use the callf to calling.
Delay1us.l                  ; 5(CALLF) + 1(PUSH) + 1(NOP) + 1(LD) + 66 + 1(POP) + 5(RETF) = 80CY = 1us(8MHz)
  push a                    ; 1 CY
  nop                       ; 1 CY
  ld a, #22                 ; 1 CY
  
Delay1usLoop.l              ; T = 22 CY * 3 = 66 CY
  dec a                     ; 1 CY
  jrne Delay1usLoop         ; 2 CY
  
  pop a                     ; 1 CY
  retf                      ; 5 CY