PCI-Express 1x

 

The PCI-Express bus supports 1x [2.5Gbps], 2x, 4x, 8x, 12x, 16x, and 32x bus widths [transmit / receive pairs].
The PCI-Express [PCIe] 1x signal names and pinout are listed in the table below.
The 1x wide PCI Express bus is used as the replacement for the PCI expansion slot on PC motherboards, replacing the older and slower PCI slot.
Pinout tables for the other PCI Express widths are listed below the table.

PCI-Express 1x PinOut

Pin	Side B Connector		Side A Connector
#	Name	Description	Name	Description
1	+12v	+12 volt power	PRSNT#1	Hot plug presence detect
2	+12v	+12 volt power	+12v	+12 volt power
3	RSVD	Reserved	+12v	+12 volt power
4	GND	Ground	GND	Ground
5	SMCLK	SMBus clock	JTAG2	TCK
6	SMDAT	SMBus data	JTAG3	TDI
7	GND	Ground	JTAG4	TDO
8	+3.3v	+3.3 volt power	JTAG5	TMS
9	JTAG1	+TRST#	+3.3v	+3.3 volt power
10	3.3Vaux	3.3v volt power	+3.3v	+3.3 volt power
11	WAKE#	Link Reactivation	PWRGD	Power Good
Mechanical Key
12	RSVD	Reserved	GND	Ground
13	GND	Ground	REFCLK+	Reference Clock Differential pair
14	HSOp(0)	Transmitter Lane 0, Differential pair	REFCLK-
15	HSOn(0)		GND	Ground
16	GND	Ground	HSIp(0)	Receiver Lane 0, Differential pair
17	PRSNT#2	Hotplug detect	HSIn(0)
18	GND	Ground	GND	Ground

PCI Express is the new serial bus addition to the PCI series of specifications. This is a serial bus which uses two low-voltage differential LVDS pairs, at 2.5Gb/s in each direction [one transmit, and one receive pair]. PCI Express uses8B/10B encoding [each 8 bit byte is translated into a 10 bit character in order to equalize the numbers of 1's and 0's sent, and the encoded signal contains an embedded clock]. PCI Express supports 1x [2.5Gbps], 2x, 4x, 8x, 12x, 16x, and 32x bus widths [transmit / receive pairs]. The PCI-Express [PCIe] 1x signal names and pinout are listed above.

The differential pins [Lanes] listed in the pin out table above are LVDS [Low Voltage Differential Signaling]. The Electrical layer of LVDS listed above is described on the LVDS bus page.
The function of the JTAG pins are described on the JTAG bus page. The function of the SMbus pins listed above are described on the SMbus page.