#define iPush(x, o1, o2, o3, c, n) \
{x, o1, o2, o3, c, #n, OPC_##n}
const iCode iCodeSet[] = {
iPush(1, OP_NONE, OP_NONE, OP_NONE, 12, NOP),
iPush(2, OP_CODE11, OP_NONE, OP_NONE, 24, AJMP),
iPush(3, OP_CODE16, OP_NONE, OP_NONE, 24, LJMP),
iPush(1, OP_ACC, OP_NONE, OP_NONE, 12, RR),
iPush(1, OP_ACC, OP_NONE, OP_NONE, 12, INC),
iPush(2, OP_RAM8, OP_NONE, OP_NONE, 12, INC),
iPush(1, OP_RAM_R0, OP_NONE, OP_NONE, 12, INC),
iPush(1, OP_RAM_R1, OP_NONE, OP_NONE, 12, INC),
iPush(1, OP_R0, OP_NONE, OP_NONE, 12, INC),
iPush(1, OP_R1, OP_NONE, OP_NONE, 12, INC),
iPush(1, OP_R2, OP_NONE, OP_NONE, 12, INC),
iPush(1, OP_R3, OP_NONE, OP_NONE, 12, INC),
iPush(1, OP_R4, OP_NONE, OP_NONE, 12, INC),
iPush(1, OP_R5, OP_NONE, OP_NONE, 12, INC),
iPush(1, OP_R6, OP_NONE, OP_NONE, 12, INC),
iPush(1, OP_R7, OP_NONE, OP_NONE, 12, INC),
iPush(3, OP_BIT, OP_CODE, OP_NONE, 24, JBC),
iPush(2, OP_CODE11, OP_NONE, OP_NONE, 24, ACALL),
iPush(3, OP_CODE16, OP_NONE, OP_NONE, 24, LCALL),
iPush(1, OP_ACC, OP_NONE, OP_NONE, 12, RRC),
iPush(1, OP_ACC, OP_NONE, OP_NONE, 12, DEC),
iPush(2, OP_RAM8, OP_NONE, OP_NONE, 12, DEC),
iPush(1, OP_RAM_R0, OP_NONE, OP_NONE, 12, DEC),
iPush(1, OP_RAM_R1, OP_NONE, OP_NONE, 12, DEC),
iPush(1, OP_R0, OP_NONE, OP_NONE, 12, DEC),
iPush(1, OP_R1, OP_NONE, OP_NONE, 12, DEC),
iPush(1, OP_R2, OP_NONE, OP_NONE, 12, DEC),
iPush(1, OP_R3, OP_NONE, OP_NONE, 12, DEC),
iPush(1, OP_R4, OP_NONE, OP_NONE, 12, DEC),
iPush(1, OP_R5, OP_NONE, OP_NONE, 12, DEC),
iPush(1, OP_R6, OP_NONE, OP_NONE, 12, DEC),
iPush(1, OP_R7, OP_NONE, OP_NONE, 12, DEC),
iPush(3, OP_BIT, OP_CODE, OP_NONE, 24, JB),
iPush(2, OP_CODE11, OP_NONE, OP_NONE, 24, AJMP),
iPush(1, OP_NONE, OP_NONE, OP_NONE, 24, RET),
iPush(1, OP_ACC, OP_NONE, OP_NONE, 12, RL),
iPush(2, OP_ACC, OP_IMM8, OP_NONE, 12, ADD),
iPush(2, OP_ACC, OP_RAM8, OP_NONE, 12, ADD),
iPush(1, OP_ACC, OP_RAM_R0, OP_NONE, 12, ADD),
iPush(1, OP_ACC, OP_RAM_R1, OP_NONE, 12, ADD),
iPush(1, OP_ACC, OP_R0, OP_NONE, 12, ADD),
iPush(1, OP_ACC, OP_R1, OP_NONE, 12, ADD),
iPush(1, OP_ACC, OP_R2, OP_NONE, 12, ADD),
iPush(1, OP_ACC, OP_R3, OP_NONE, 12, ADD),
iPush(1, OP_ACC, OP_R4, OP_NONE, 12, ADD),
iPush(1, OP_ACC, OP_R5, OP_NONE, 12, ADD),
iPush(1, OP_ACC, OP_R6, OP_NONE, 12, ADD),
iPush(1, OP_ACC, OP_R7, OP_NONE, 12, ADD),
iPush(3, OP_BIT, OP_CODE, OP_NONE, 24, JNB),
iPush(2, OP_CODE11, OP_NONE, OP_NONE, 24, ACALL),
iPush(1, OP_NONE, OP_NONE, OP_NONE, 24, RETI),
iPush(1, OP_ACC, OP_NONE, OP_NONE, 12, RLC),
iPush(2, OP_ACC, OP_IMM8, OP_NONE, 12, ADDC),
iPush(2, OP_ACC, OP_RAM8, OP_NONE, 12, ADDC),
iPush(1, OP_ACC, OP_RAM_R0, OP_NONE, 12, ADDC),
iPush(1, OP_ACC, OP_RAM_R1, OP_NONE, 12, ADDC),
iPush(1, OP_ACC, OP_R0, OP_NONE, 12, ADDC),
iPush(1, OP_ACC, OP_R1, OP_NONE, 12, ADDC),
iPush(1, OP_ACC, OP_R2, OP_NONE, 12, ADDC),
iPush(1, OP_ACC, OP_R3, OP_NONE, 12, ADDC),
iPush(1, OP_ACC, OP_R4, OP_NONE, 12, ADDC),
iPush(1, OP_ACC, OP_R5, OP_NONE, 12, ADDC),
iPush(1, OP_ACC, OP_R6, OP_NONE, 12, ADDC),
iPush(1, OP_ACC, OP_R7, OP_NONE, 12, ADDC),
iPush(2, OP_CODE, OP_NONE, OP_NONE, 24, JC),
iPush(2, OP_CODE11, OP_NONE, OP_NONE, 24, AJMP),
iPush(2, OP_RAM8, OP_ACC, OP_NONE, 12, ORL),
iPush(3, OP_RAM8, OP_IMM8, OP_NONE, 24, ORL),
iPush(2, OP_ACC, OP_IMM8, OP_NONE, 12, ORL),
iPush(2, OP_ACC, OP_RAM8, OP_NONE, 12, ORL),
iPush(1, OP_ACC, OP_RAM_R0, OP_NONE, 12, ORL),
iPush(1, OP_ACC, OP_RAM_R1, OP_NONE, 12, ORL),
iPush(1, OP_ACC, OP_R0, OP_NONE, 12, ORL),
iPush(1, OP_ACC, OP_R1, OP_NONE, 12, ORL),
iPush(1, OP_ACC, OP_R2, OP_NONE, 12, ORL),
iPush(1, OP_ACC, OP_R3, OP_NONE, 12, ORL),
iPush(1, OP_ACC, OP_R4, OP_NONE, 12, ORL),
iPush(1, OP_ACC, OP_R5, OP_NONE, 12, ORL),
iPush(1, OP_ACC, OP_R6, OP_NONE, 12, ORL),
iPush(1, OP_ACC, OP_R7, OP_NONE, 12, ORL),
iPush(2, OP_CODE, OP_NONE, OP_NONE, 24, JNC),
iPush(2, OP_CODE11, OP_NONE, OP_NONE, 24, ACALL),
iPush(2, OP_RAM8, OP_ACC, OP_NONE, 12, ANL),
iPush(3, OP_RAM8, OP_IMM8, OP_NONE, 24, ANL),
iPush(2, OP_ACC, OP_IMM8, OP_NONE, 12, ANL),
iPush(2, OP_ACC, OP_RAM8, OP_NONE, 12, ANL),
iPush(1, OP_ACC, OP_RAM_R0, OP_NONE, 12, ANL),
iPush(1, OP_ACC, OP_RAM_R1, OP_NONE, 12, ANL),
iPush(1, OP_ACC, OP_R0, OP_NONE, 12, ANL),
iPush(1, OP_ACC, OP_R1, OP_NONE, 12, ANL),
iPush(1, OP_ACC, OP_R2, OP_NONE, 12, ANL),
iPush(1, OP_ACC, OP_R3, OP_NONE, 12, ANL),
iPush(1, OP_ACC, OP_R4, OP_NONE, 12, ANL),
iPush(1, OP_ACC, OP_R5, OP_NONE, 12, ANL),
iPush(1, OP_ACC, OP_R6, OP_NONE, 12, ANL),
iPush(1, OP_ACC, OP_R7, OP_NONE, 12, ANL),
iPush(2, OP_CODE, OP_NONE, OP_NONE, 24, JZ),
iPush(2, OP_CODE11, OP_NONE, OP_NONE, 24, AJMP),
iPush(2, OP_RAM8, OP_ACC, OP_NONE, 12, XRL),
iPush(3, OP_RAM8, OP_IMM8, OP_NONE, 24, XRL),
iPush(2, OP_ACC, OP_IMM8, OP_NONE, 12, XRL),
iPush(2, OP_ACC, OP_RAM8, OP_NONE, 12, XRL),
iPush(1, OP_ACC, OP_RAM_R0, OP_NONE, 12, XRL),
iPush(1, OP_ACC, OP_RAM_R1, OP_NONE, 12, XRL),
iPush(1, OP_ACC, OP_R0, OP_NONE, 12, XRL),
iPush(1, OP_ACC, OP_R1, OP_NONE, 12, XRL),
iPush(1, OP_ACC, OP_R2, OP_NONE, 12, XRL),
iPush(1, OP_ACC, OP_R3, OP_NONE, 12, XRL),
iPush(1, OP_ACC, OP_R4, OP_NONE, 12, XRL),
iPush(1, OP_ACC, OP_R5, OP_NONE, 12, XRL),
iPush(1, OP_ACC, OP_R6, OP_NONE, 12, XRL),
iPush(1, OP_ACC, OP_R7, OP_NONE, 12, XRL),
iPush(2, OP_CODE, OP_NONE, OP_NONE, 24, JNZ),
iPush(2, OP_CODE11, OP_NONE, OP_NONE, 24, ACALL),
iPush(2, OP_FC, OP_BIT, OP_NONE, 24, ORL),
iPush(1, OP_NONE, OP_NONE, OP_NONE, 24, JMP),
iPush(2, OP_ACC, OP_IMM8, OP_NONE, 12, MOV),
iPush(3, OP_RAM8, OP_IMM8, OP_NONE, 24, MOV),
iPush(2, OP_RAM_R0, OP_IMM8, OP_NONE, 12, MOV),
iPush(2, OP_RAM_R1, OP_IMM8, OP_NONE, 12, MOV),
iPush(2, OP_R0, OP_IMM8, OP_NONE, 12, MOV),
iPush(2, OP_R1, OP_IMM8, OP_NONE, 12, MOV),
iPush(2, OP_R2, OP_IMM8, OP_NONE, 12, MOV),
iPush(2, OP_R3, OP_IMM8, OP_NONE, 12, MOV),
iPush(2, OP_R4, OP_IMM8, OP_NONE, 12, MOV),
iPush(2, OP_R5, OP_IMM8, OP_NONE, 12, MOV),
iPush(2, OP_R6, OP_IMM8, OP_NONE, 12, MOV),
iPush(2, OP_R7, OP_IMM8, OP_NONE, 12, MOV),
iPush(2, OP_CODE, OP_NONE, OP_NONE, 24, SJMP),
iPush(2, OP_CODE11, OP_NONE, OP_NONE, 24, AJMP),
iPush(2, OP_FC, OP_BIT, OP_NONE, 24, ANL),
iPush(1, OP_ACC, OP_RAM_ACC, OP_PC, 24, MOVC),
iPush(1, OP_ACC, OP_B, OP_NONE, 48, DIV),
iPush(3, OP_RAM8, OP_RAM8, OP_NONE, 24, MOV),
iPush(2, OP_RAM8, OP_RAM_R0, OP_NONE, 24, MOV),
iPush(2, OP_RAM8, OP_RAM_R1, OP_NONE, 24, MOV),
iPush(2, OP_RAM8, OP_R0, OP_NONE, 24, MOV),
iPush(2, OP_RAM8, OP_R1, OP_NONE, 24, MOV),
iPush(2, OP_RAM8, OP_R2, OP_NONE, 24, MOV),
iPush(2, OP_RAM8, OP_R3, OP_NONE, 24, MOV),
iPush(2, OP_RAM8, OP_R4, OP_NONE, 24, MOV),
iPush(2, OP_RAM8, OP_R5, OP_NONE, 24, MOV),
iPush(2, OP_RAM8, OP_R6, OP_NONE, 24, MOV),
iPush(2, OP_RAM8, OP_R7, OP_NONE, 24, MOV),
iPush(3, OP_DPTR, OP_IMM16, OP_NONE, 24, MOV),
iPush(2, OP_CODE11, OP_NONE, OP_NONE, 24, ACALL),
iPush(2, OP_BIT, OP_FC, OP_NONE, 24, MOV),
iPush(1, OP_ACC, OP_RAM_ACC, OP_DPTR, 24, MOVC),
iPush(2, OP_ACC, OP_IMM8, OP_NONE, 12, SUBB),
iPush(2, OP_ACC, OP_RAM8, OP_NONE, 12, SUBB),
iPush(1, OP_ACC, OP_RAM_R0, OP_NONE, 12, SUBB),
iPush(1, OP_ACC, OP_RAM_R1, OP_NONE, 12, SUBB),
iPush(1, OP_ACC, OP_R0, OP_NONE, 12, SUBB),
iPush(1, OP_ACC, OP_R1, OP_NONE, 12, SUBB),
iPush(1, OP_ACC, OP_R2, OP_NONE, 12, SUBB),
iPush(1, OP_ACC, OP_R3, OP_NONE, 12, SUBB),
iPush(1, OP_ACC, OP_R4, OP_NONE, 12, SUBB),
iPush(1, OP_ACC, OP_R5, OP_NONE, 12, SUBB),
iPush(1, OP_ACC, OP_R6, OP_NONE, 12, SUBB),
iPush(1, OP_ACC, OP_R7, OP_NONE, 12, SUBB),
iPush(2, OP_FC, OP_BIT, OP_NONE, 24, ORL),
iPush(2, OP_CODE11, OP_NONE, OP_NONE, 24, AJMP),
iPush(2, OP_FC, OP_BIT, OP_NONE, 12, MOV),
iPush(1, OP_DPTR, OP_NONE, OP_NONE, 24, INC),
iPush(1, OP_ACC, OP_B, OP_NONE, 48, MUL),
iPush(0, 0, 0, 0, 0, NOP),
iPush(2, OP_RAM_R0, OP_RAM8, OP_NONE, 24, MOV),
iPush(2, OP_RAM_R1, OP_RAM8, OP_NONE, 24, MOV),
iPush(2, OP_R0, OP_RAM8, OP_NONE, 24, MOV),
iPush(2, OP_R1, OP_RAM8, OP_NONE, 24, MOV),
iPush(2, OP_R2, OP_RAM8, OP_NONE, 24, MOV),
iPush(2, OP_R3, OP_RAM8, OP_NONE, 24, MOV),
iPush(2, OP_R4, OP_RAM8, OP_NONE, 24, MOV),
iPush(2, OP_R5, OP_RAM8, OP_NONE, 24, MOV),
iPush(2, OP_R6, OP_RAM8, OP_NONE, 24, MOV),
iPush(2, OP_R7, OP_RAM8, OP_NONE, 24, MOV),
iPush(2, OP_FC, OP_BIT, OP_NONE, 24, ANL),
iPush(2, OP_CODE11, OP_NONE, OP_NONE, 24, ACALL),
iPush(2, OP_BIT, OP_NONE, OP_NONE, 12, CPL),
iPush(1, OP_FC, OP_NONE, OP_NONE, 12, CPL),
iPush(3, OP_ACC, OP_IMM8, OP_CODE, 24, CJNE),
iPush(3, OP_ACC, OP_RAM8, OP_CODE, 24, CJNE),
iPush(3, OP_RAM_R0, OP_IMM8, OP_CODE, 24, CJNE),
iPush(3, OP_RAM_R1, OP_IMM8, OP_CODE, 24, CJNE),
iPush(3, OP_R0, OP_IMM8, OP_CODE, 24, CJNE),
iPush(3, OP_R1, OP_IMM8, OP_CODE, 24, CJNE),
iPush(3, OP_R2, OP_IMM8, OP_CODE, 24, CJNE),
iPush(3, OP_R3, OP_IMM8, OP_CODE, 24, CJNE),
iPush(3, OP_R4, OP_IMM8, OP_CODE, 24, CJNE),
iPush(3, OP_R5, OP_IMM8, OP_CODE, 24, CJNE),
iPush(3, OP_R6, OP_IMM8, OP_CODE, 24, CJNE),
iPush(3, OP_R7, OP_IMM8, OP_CODE, 24, CJNE),
iPush(2, OP_RAM8, OP_NONE, OP_NONE, 24, PUSH),
iPush(2, OP_CODE11, OP_NONE, OP_NONE, 24, AJMP),
iPush(2, OP_BIT, OP_NONE, OP_NONE, 12, CLR),
iPush(1, OP_FC, OP_NONE, OP_NONE, 12, CLR),
iPush(1, OP_ACC, OP_NONE, OP_NONE, 12, SWAP),
iPush(2, OP_ACC, OP_RAM8, OP_NONE, 12, XCH),
iPush(1, OP_ACC, OP_RAM_R0, OP_NONE, 12, XCH),
iPush(1, OP_ACC, OP_RAM_R1, OP_NONE, 12, XCH),
iPush(1, OP_ACC, OP_R0, OP_NONE, 12, XCH),
iPush(1, OP_ACC, OP_R1, OP_NONE, 12, XCH),
iPush(1, OP_ACC, OP_R2, OP_NONE, 12, XCH),
iPush(1, OP_ACC, OP_R3, OP_NONE, 12, XCH),
iPush(1, OP_ACC, OP_R4, OP_NONE, 12, XCH),
iPush(1, OP_ACC, OP_R5, OP_NONE, 12, XCH),
iPush(1, OP_ACC, OP_R6, OP_NONE, 12, XCH),
iPush(1, OP_ACC, OP_R7, OP_NONE, 12, XCH),
iPush(2, OP_RAM8, OP_NONE, OP_NONE, 24, POP),
iPush(2, OP_CODE11, OP_NONE, OP_NONE, 24, ACALL),
iPush(2, OP_BIT, OP_NONE, OP_NONE, 12, SETB),
iPush(1, OP_FC, OP_NONE, OP_NONE, 12, SETB),
iPush(1, OP_ACC, OP_NONE, OP_NONE, 12, DA),
iPush(3, OP_RAM8, OP_CODE, OP_NONE, 24, DJNZ),
iPush(1, OP_ACC, OP_RAM_R0, OP_NONE, 12, XCHD),
iPush(1, OP_ACC, OP_RAM_R1, OP_NONE, 12, XCHD),
iPush(2, OP_R0, OP_CODE, OP_NONE, 24, DJNZ),
iPush(2, OP_R1, OP_CODE, OP_NONE, 24, DJNZ),
iPush(2, OP_R2, OP_CODE, OP_NONE, 24, DJNZ),
iPush(2, OP_R3, OP_CODE, OP_NONE, 24, DJNZ),
iPush(2, OP_R4, OP_CODE, OP_NONE, 24, DJNZ),
iPush(2, OP_R5, OP_CODE, OP_NONE, 24, DJNZ),
iPush(2, OP_R6, OP_CODE, OP_NONE, 24, DJNZ),
iPush(2, OP_R7, OP_CODE, OP_NONE, 24, DJNZ),
iPush(1, OP_ACC, OP_RAM_DPTR,OP_NONE, 24, MOVX),
iPush(2, OP_CODE11, OP_NONE, OP_NONE, 24, AJMP),
iPush(1, OP_ACC, OP_RAM_R0, OP_NONE, 24, MOVX),
iPush(1, OP_ACC, OP_RAM_R1, OP_NONE, 24, MOVX),
iPush(1, OP_ACC, OP_NONE, OP_NONE, 12, CLR),
iPush(2, OP_ACC, OP_RAM8, OP_NONE, 12, MOV),
iPush(1, OP_ACC, OP_RAM_R0, OP_NONE, 12, MOV),
iPush(1, OP_ACC, OP_RAM_R1, OP_NONE, 12, MOV),
iPush(1, OP_ACC, OP_R0, OP_NONE, 12, MOV),
iPush(1, OP_ACC, OP_R1, OP_NONE, 12, MOV),
iPush(1, OP_ACC, OP_R2, OP_NONE, 12, MOV),
iPush(1, OP_ACC, OP_R3, OP_NONE, 12, MOV),
iPush(1, OP_ACC, OP_R4, OP_NONE, 12, MOV),
iPush(1, OP_ACC, OP_R5, OP_NONE, 12, MOV),
iPush(1, OP_ACC, OP_R6, OP_NONE, 12, MOV),
iPush(1, OP_ACC, OP_R7, OP_NONE, 12, MOV),
iPush(1, OP_RAM_DPTR,OP_ACC, OP_NONE, 24, MOVX),
iPush(2, OP_CODE11, OP_NONE, OP_NONE, 24, ACALL),
iPush(1, OP_RAM_R0, OP_ACC, OP_NONE, 24, MOVX),
iPush(1, OP_RAM_R1, OP_ACC, OP_NONE, 24, MOVX),
iPush(1, OP_ACC, OP_NONE, OP_NONE, 12, CPL),
iPush(2, OP_RAM8, OP_ACC, OP_NONE, 12, MOV),
iPush(1, OP_RAM_R0, OP_ACC, OP_NONE, 12, MOV),
iPush(1, OP_RAM_R1, OP_ACC, OP_NONE, 12, MOV),
iPush(1, OP_R0, OP_ACC, OP_NONE, 12, MOV),
iPush(1, OP_R1, OP_ACC, OP_NONE, 12, MOV),
iPush(1, OP_R2, OP_ACC, OP_NONE, 12, MOV),
iPush(1, OP_R3, OP_ACC, OP_NONE, 12, MOV),
iPush(1, OP_R4, OP_ACC, OP_NONE, 12, MOV),
iPush(1, OP_R5, OP_ACC, OP_NONE, 12, MOV),
iPush(1, OP_R6, OP_ACC, OP_NONE, 12, MOV),
iPush(1, OP_R7, OP_ACC, OP_NONE, 12, MOV)
};
TINYC写个8052虚拟机(2) Intel MCS-805x指令表.
最新推荐文章于 2019-08-29 14:53:44 发布