这里写目录标题
一、前言
rk3399有两个VOP，每个VOP均可接不同的显示接口，比如eDP、MIPI(DSI)、HDMI、DP。不过两个VOP支持的最大输出有所区别。针对不同的显示接口，需要在dts中配置不同的显示通路。本文详细列出屏显示接口的相关DTS的配置节点，同时讲解针对于不同的屏接口，需要配置的dts节点内容。
二、平台支持的显示接口
三、两个VOP支持的最大输出分辨率
四、VOPL的dts配置
vopl: vop@ff8f0000 {
compatible = "rockchip,rk3399-vop-lit";
reg = <0x0 0xff8f0000 0x0 0x600>,
<0x0 0xff8f1c00 0x0 0x200>,
<0x0 0xff8f2000 0x0 0x400>;
reg-names = "regs", "cabc_lut", "gamma_lut";
interrupts = <0 119 4 0>;
clocks = <&cru 219>, <&cru 181>, <&cru 475>, <&cru 183>;
clock-names = "aclk_vop", "dclk_vop", "hclk_vop", "dclk_source";
iommus = <&vopl_mmu>;
power-domains = <&power 18>;
resets = <&cru 275>, <&cru 279>, <&cru 281>;
reset-names = "axi", "ahb", "dclk";
status = "disabled";
vopl_out: port {
#address-cells = <1>;
#size-cells = <0>;
vopl_out_dsi: endpoint@0 {
reg = <0>;
remote-endpoint = <&dsi_in_vopl>;
};
vopl_out_edp: endpoint@1 {
reg = <1>;
remote-endpoint = <&edp_in_vopl>;
};
vopl_out_hdmi: endpoint@2 {
reg = <2>;
remote-endpoint = <&hdmi_in_vopl>;
};
vopl_out_dp: endpoint@3 {
reg = <3>;
remote-endpoint = <&dp_in_vopl>;
};
vopl_out_dsi1: endpoint@4 {
reg = <4>;
remote-endpoint = <&dsi1_in_vopl>;
};
};
};
vopl_mmu: iommu@ff8f3f00 {
compatible = "rockchip,iommu";
reg = <0x0 0xff8f3f00 0x0 0x100>;
interrupts = <0 119 4 0>;
interrupt-names = "vopl_mmu";
clocks = <&cru 219>, <&cru 475>;
clock-names = "aclk", "hclk";
power-domains = <&power 18>;
#iommu-cells = <0>;
status = "disabled";
};
五、VOPB的dts配置
vopb: vop@ff900000 {
compatible = "rockchip,rk3399-vop-big";
reg = <0x0 0xff900000 0x0 0x600>,
<0x0 0xff901c00 0x0 0x200>,
<0x0 0xff902000 0x0 0x1000>;
reg-names = "regs", "cabc_lut", "gamma_lut";
interrupts = <0 118 4 0>;
clocks = <&cru 217>, <&cru 180>, <&cru 473>, <&cru 182>;
clock-names = "aclk_vop", "dclk_vop", "hclk_vop", "dclk_source";
resets = <&cru 274>, <&cru 278>, <&cru 280>;
reset-names = "axi", "ahb", "dclk";
power-domains = <&power 17>;
iommus = <&vopb_mmu>;
status = "disabled";
vopb_out: port {
#address-cells = <1>;
#size-cells = <0>;
vopb_out_edp: endpoint@0 {
reg = <0>;
remote-endpoint = <&edp_in_vopb>;
};
vopb_out_dsi: endpoint@1 {
reg = <1>;
remote-endpoint = <&dsi_in_vopb>;
};
vopb_out_hdmi: endpoint@2 {
reg = <2>;
remote-endpoint = <&hdmi_in_vopb>;
};
vopb_out_dp: endpoint@3 {
reg = <3>;
remote-endpoint = <&dp_in_vopb>;
};
vopb_out_dsi1: endpoint@4 {
reg = <4>;
remote-endpoint = <&dsi1_in_vopb>;
};
};
};
vopb_mmu: iommu@ff903f00 {
compatible = "rockchip,iommu";
reg = <0x0 0xff903f00 0x0 0x100>;
interrupts = <0 118 4 0>;
interrupt-names = "vopb_mmu";
clocks = <&cru 217>, <&cru 473>;
clock-names = "aclk", "hclk";
power-domains = <&power 17>;
#iommu-cells = <0>;
status = "disabled";
};
六、display_subsystem的配置
display_subsystem: display-subsystem {
u-boot,dm-pre-reloc;
compatible = "rockchip,display-subsystem";
ports = <&vopl_out>, <&vopb_out>;
clocks = <&cru 7>, <&cru 4>;
clock-names = "hdmi-tmds-pll", "default-vop-pll";
devfreq = <&dmc>;
status = "disabled";
};
&display_subsystem {
status = "disabled";
ports = <&vopb_out>, <&vopl_out>;
logo-memory-region = <&drm_logo>;
route {
route_hdmi: route-hdmi {
status = "disabled";
logo,uboot = "logo.bmp";
logo,kernel = "logo_kernel.bmp";
logo,mode = "center";
charge_logo,mode = "center";
connect = <&vopb_out_hdmi>;
};
route_dsi: route-dsi {
status = "disabled";
logo,uboot = "logo.bmp";
logo,kernel = "logo_kernel.bmp";
logo,mode = "center";
charge_logo,mode = "center";
connect = <&vopl_out_dsi>;
};
route_dsi1: route-dsi1 {
status = "disabled";
logo,uboot = "logo.bmp";
logo,kernel = "logo_kernel.bmp";
logo,mode = "center";
charge_logo,mode = "center";
connect = <&vopl_out_dsi1>;
};
route_edp: route-edp {
status = "disabled";
logo,uboot = "logo.bmp";
logo,kernel = "logo_kernel.bmp";
logo,mode = "center";
charge_logo,mode = "center";
connect = <&vopl_out_edp>;
};
};
};
七、backlight 背光配置
backlight: backlight {
status = "disabled";
compatible = "pwm-backlight";
pwms = <&pwm0 0 25000 0>;
brightness-levels = <
0 1 2 3 4 5 6 7
8 9 10 11 12 13 14 15
16 17 18 19 20 21 22 23
24 25 26 27 28 29 30 31
32 33 34 35 36 37 38 39
40 41 42 43 44 45 46 47
48 49 50 51 52 53 54 55
56 57 58 59 60 61 62 63
64 65 66 67 68 69 70 71
72 73 74 75 76 77 78 79
80 81 82 83 84 85 86 87
88 89 90 91 92 93 94 95
96 97 98 99 100 101 102 103
104 105 106 107 108 109 110 111
112 113 114 115 116 117 118 119
120 121 122 123 124 125 126 127
128 129 130 131 132 133 134 135
136 137 138 139 140 141 142 143
144 145 146 147 148 149 150 151
152 153 154 155 156 157 158 159
160 161 162 163 164 165 166 167
168 169 170 171 172 173 174 175
176 177 178 179 180 181 182 183
184 185 186 187 188 189 190 191
192 193 194 195 196 197 198 199
200 201 202 203 204 205 206 207
208 209 210 211 212 213 214 215
216 217 218 219 220 221 222 223
224 225 226 227 228 229 230 231
232 233 234 235 236 237 238 239
240 241 242 243 244 245 246 247
248 249 250 251 252 253 254 255>;
default-brightness-level = <200>;
};
pwm0: pwm@ff420000 {
compatible = "rockchip,rk3399-pwm", "rockchip,rk3288-pwm";
reg = <0x0 0xff420000 0x0 0x10>;
#pwm-cells = <3>;
pinctrl-names = "active";
pinctrl-0 = <&pwm0_pin>;
clocks = <&pmucru PCLK_RKPWM_PMU>;
clock-names = "pwm";
status = "disabled";
};
pinctrl: pinctrl {
...
pwm0 {
pwm0_pin: pwm0-pin {
rockchip,pins =
<4 18 1 &pcfg_pull_none>;
};
pwm0_pin_pull_down: pwm0-pin-pull-down {
rockchip,pins =
<4 18 1 &pcfg_pull_down>;
};
vop0_pwm_pin: vop0-pwm-pin {
rockchip,pins =
<4 18 2 &pcfg_pull_none>;
};
vop1_pwm_pin: vop1-pwm-pin {
rockchip,pins =
<4 18 3 &pcfg_pull_none>;
};
};
...
};
八、针对eDP接口的配置 以firefly为例
8.1 原生配置
edp: edp@ff970000 {
compatible = "rockchip,rk3399-edp";
reg = <0x0 0xff970000 0x0 0x8000>;
interrupts = <0 10 4 0>;
clocks = <&cru 362>, <&cru 364>;
clock-names = "dp", "pclk";
power-domains = <&power 25>;
resets = <&cru 285>;
reset-names = "dp";
rockchip,grf = <&grf>;
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
edp_in: port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
edp_in_vopb: endpoint@0 {
reg = <0>;
remote-endpoint = <&vopb_out_edp>;
};
edp_in_vopl: endpoint@1 {
reg = <1>;
remote-endpoint = <&vopl_out_edp>;
};
};
};
};
edp {
edp_hpd: edp-hpd {
rockchip,pins =
<4 23 2 &pcfg_pull_none>;
};
};
edp_panel: edp-panel {
status = "disabled";
ports {
panel_in_edp: endpoint {
remote-endpoint = <&edp_out_panel>;
};
};
};
&route_edp {
status = "disabled";
};
&edp {
status = "disabled";
force-hpd;
ports {
edp_out: port@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
edp_out_panel: endpoint@0 {
reg = <0>;
remote-endpoint = <&panel_in_edp>;
};
};
};
};
8.2 启用eDP屏接口配置
// 启用 display_subsystem
&display_subsystem {
status = "okay";
};
// 启用edp
&edp {
status = "okay";
};
// 配置使能edp屏接口供电
vcc_lcd: vcc-lcd {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio1 1 GPIO_ACTIVE_HIGH>;
regulator-always-on;
regulator-boot-on;
regulator-name = "vcc_lcd";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
startup-delay-us = <20000>;
vin-supply = <&vcc_3v0>;
};
// 启用edp_panel并配置
&edp_panel {
compatible = "sharp,lcd-f402", "panel-simple";
backlight = <&backlight>;
power-supply = <&vcc_lcd>;
reset-gpios = <&gpio4 29 1>;
status = "okay";
// 如果显示屏有特定配置需求，可添加timing
display-timings {
native-mode = <&timing0>;
// 屏幕屏参
timing0: timing0 {
clock-frequency = <148500000>;
hactive = <1920>;
vactive = <1080>;
hfront-porch = <200>;
hsync-len = <48>;
hback-porch = <32>;
vfront-porch = <3>;
vsync-len = <6>;
vback-porch = <36>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
};
};
// rk3399-firefly-core.dtsi 中有配置backlight节点，见第七节，如无配置该节点自行添加
// 使用时只需启用
&backlight {
status = "okay";
};
// backlights使用了pwm0,启用
&pwm0 {
status = "okay";
};
// 启用route_edp
&route_edp {
status = "okay";
logo,mode = "center";
};
// 以下配置edp通过vopl通道
&edp_in_vopl {
status = "okay";
};
&edp_in_vopb {
status = "disabled";
};
// 启用vopl
&vopl {
status = "okay";
};
// 启用vopl_mmu
&vopl_mmu {
status = "okay";
};
// 也可配置vopb通道
&edp_in_vopb {
status = "okay";
};
&edp_in_vopl {
status = "disabled";
};
// 启用vopb
&vopb {
status = "okay";
};
// 启用vopb_mmu
&vopb_mmu {
status = "okay";
};
九、针对MIPI接口屏的配置 以firefly为例
backlight_dsi: backlight-dsi {
status = "disabled";
compatible = "pwm-backlight";
pwms = <&pwm1 0 25000 0>;
brightness-levels = <
0 1 2 3 4 5 6 7
8 9 10 11 12 13 14 15
16 17 18 19 20 21 22 23
24 25 26 27 28 29 30 31
32 33 34 35 36 37 38 39
40 41 42 43 44 45 46 47
48 49 50 51 52 53 54 55
56 57 58 59 60 61 62 63
64 65 66 67 68 69 70 71
72 73 74 75 76 77 78 79
80 81 82 83 84 85 86 87
88 89 90 91 92 93 94 95
96 97 98 99 100 101 102 103
104 105 106 107 108 109 110 111
112 113 114 115 116 117 118 119
120 121 122 123 124 125 126 127
128 129 130 131 132 133 134 135
136 137 138 139 140 141 142 143
144 145 146 147 148 149 150 151
152 153 154 155 156 157 158 159
160 161 162 163 164 165 166 167
168 169 170 171 172 173 174 175
176 177 178 179 180 181 182 183
184 185 186 187 188 189 190 191
192 193 194 195 196 197 198 199
200 201 202 203 204 205 206 207
208 209 210 211 212 213 214 215
216 217 218 219 220 221 222 223
224 225 226 227 228 229 230 231
232 233 234 235 236 237 238 239
240 241 242 243 244 245 246 247
248 249 250 251 252 253 254 255>;
default-brightness-level = <200>;
};
// dsi
&pwm1{
status = "okay";
};
&backlight_dsi {
status = "okay";
};
&dsi {
status = "okay";
rockchip,lane-rate = <500>;
panel@0 {
compatible = "simple-panel-dsi";
reg = <0>;
backlight = <&backlight_dsi>;
power-supply = <&vcc_lcd>;
reset-gpios = <&gpio1 RK_PA1 GPIO_ACTIVE_LOW>;
dsi,flags = <(MIPI_DSI_MODE_VIDEO_BURST | MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_LPM )>;
dsi,format = <MIPI_DSI_FMT_RGB888>;
bus-format = <MEDIA_BUS_FMT_RGB666_1X18>;
dsi,lanes = <4>;
prepare-delay-ms = <120>;
reset-delay-ms = <120>;
init-delay-ms = <120>;
enable-delay-ms = <120>;
unprepare-delay-ms = <120>;
disable-delay-ms = <120>;
size,width = <120>;
size,height = <170>;
status = "okay";
width-mm = <135>;
height-mm = <217>;
panel-init-sequence = [
15 00 02 E0 00
15 00 02 E1 93
15 00 02 E2 65
15 00 02 E3 F8
15 00 02 E0 04
15 00 02 2D 03
15 00 02 E0 00
15 00 02 80 03
15 00 02 E0 01
15 00 02 00 00
15 00 02 E0 01
15 00 02 4B 04
15 00 02 00 00
15 00 02 01 66
15 00 02 17 00
15 00 02 18 AF
15 00 02 19 01
15 00 02 1A 00
15 00 02 1B AF
15 00 02 1C 01
15 00 02 1F 3E
15 00 02 20 28
15 00 02 21 28
15 00 02 22 7E
15 00 02 35 05
15 00 02 37 09
15 00 02 38 04
15 00 02 39 00
15 00 02 3A 01
15 00 02 3C 76
15 00 02 3D FF
15 00 02 3E FF
15 00 02 3F 7F
15 00 02 40 06
15 00 02 41 A0
15 00 02 42 81
15 00 02 43 08
15 00 02 44 0B
15 00 02 45 28
15 00 02 55 0F
15 00 02 56 01
15 00 02 57 69
15 00 02 58 0A
15 00 02 59 0A
15 00 02 5A 29
15 00 02 5B 15
15 00 02 5D 7C
15 00 02 5E 66
15 00 02 5F 57
15 00 02 60 4A
15 00 02 61 46
15 00 02 62 36
15 00 02 63 3A
15 00 02 64 23
15 00 02 65 3A
15 00 02 66 38
15 00 02 67 38
15 00 02 68 55
15 00 02 69 43
15 00 02 6A 4A
15 00 02 6B 3B
15 00 02 6C 36
15 00 02 6D 28
15 00 02 6E 15
15 00 02 6F 00
15 00 02 70 7C
15 00 02 71 66
15 00 02 72 57
15 00 02 73 4A
15 00 02 74 46
15 00 02 75 36
15 00 02 76 3A
15 00 02 77 23
15 00 02 78 3A
15 00 02 79 38
15 00 02 7A 38
15 00 02 7B 55
15 00 02 7C 43
15 00 02 7D 4A
15 00 02 7E 3B
15 00 02 7F 36
15 00 02 80 28
15 00 02 81 15
15 00 02 82 00
15 00 02 E0 02
15 00 02 00 1E
15 00 02 01 1E
15 00 02 02 41
15 00 02 03 41
15 00 02 04 43
15 00 02 05 43
15 00 02 06 1F
15 00 02 07 1F
15 00 02 08 35
15 00 02 09 1F
15 00 02 0A 15
15 00 02 0B 15
15 00 02 0C 1F
15 00 02 0D 47
15 00 02 0E 47
15 00 02 0F 45
15 00 02 10 45
15 00 02 11 4B
15 00 02 12 4B
15 00 02 13 49
15 00 02 14 49
15 00 02 15 1F
15 00 02 16 1E
15 00 02 17 1E
15 00 02 18 40
15 00 02 19 40
15 00 02 1A 42
15 00 02 1B 42
15 00 02 1C 1F
15 00 02 1D 1F
15 00 02 1E 35
15 00 02 1F 1F
15 00 02 20 15
15 00 02 21 15
15 00 02 22 1F
15 00 02 23 46
15 00 02 24 46
15 00 02 25 44
15 00 02 26 44
15 00 02 27 4A
15 00 02 28 4A
15 00 02 29 48
15 00 02 2A 48
15 00 02 2B 1F
15 00 02 2C 1F
15 00 02 2D 1F
15 00 02 2E 42
15 00 02 2F 42
15 00 02 30 40
15 00 02 31 40
15 00 02 32 1E
15 00 02 33 1E
15 00 02 34 1F
15 00 02 35 1F
15 00 02 36 1E
15 00 02 37 1E
15 00 02 38 1F
15 00 02 39 48
15 00 02 3A 48
15 00 02 3B 4A
15 00 02 3C 4A
15 00 02 3D 44
15 00 02 3E 44
15 00 02 3F 46
15 00 02 40 46
15 00 02 41 1F
15 00 02 42 1F
15 00 02 43 1F
15 00 02 44 43
15 00 02 45 43
15 00 02 46 41
15 00 02 47 41
15 00 02 48 1E
15 00 02 49 1E
15 00 02 4A 1E
15 00 02 4B 1F
15 00 02 4C 1E
15 00 02 4D 1E
15 00 02 4E 1F
15 00 02 4F 49
15 00 02 50 49
15 00 02 51 4B
15 00 02 52 4B
15 00 02 53 45
15 00 02 54 45
15 00 02 55 47
15 00 02 56 47
15 00 02 57 1F
15 00 02 58 40
15 00 02 59 00
15 00 02 5A 00
15 00 02 5B 30
15 00 02 5C 03
15 00 02 5D 30
15 00 02 5E 01
15 00 02 5F 02
15 00 02 60 30
15 00 02 61 01
15 00 02 62 02
15 00 02 63 14
15 00 02 64 6A
15 00 02 65 05
15 00 02 66 12
15 00 02 67 73
15 00 02 68 05
15 00 02 69 14
15 00 02 6A 6A
15 00 02 6B 08
15 00 02 6C 00
15 00 02 6D 00
15 00 02 6E 00
15 00 02 6F 88
15 00 02 70 00
15 00 02 71 00
15 00 02 72 06
15 00 02 73 7B
15 00 02 74 00
15 00 02 75 07
15 00 02 76 00
15 00 02 77 DD
15 00 02 78 17
15 00 02 79 0E
15 00 02 7A 03
15 00 02 7B 00
15 00 02 7C 00
15 00 02 7D 14
15 00 02 7E 6A
15 00 02 E0 04
15 00 02 2B 2B
15 00 02 2E 44
15 00 02 09 11
15 00 02 2D 03
15 00 02 0E 48
15 00 02 E0 00
15 00 02 E6 02
15 00 02 E7 02
05 78 01 11
05 05 01 29
15 00 02 35 00
];
panel-exit-sequence = [
05 05 01 28
05 78 01 10
];
display-timings {
native-mode = <&timing0>;
timing0: timing0 {
clock-frequency = <70000000>;//<80000000>;
hactive = <800>;//<768>;
vactive = <1280>;
hsync-len = <10>; //20, 50,10
hback-porch = <10>; //50, 56,10
hfront-porch = <180>;//50, 30,180
vsync-len = <4>;//4
vback-porch = <4>;//4
vfront-porch = <8>;//8
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
};
};
};
&route_dsi{
status = "okay";
logo,mode = "center";
};
&dsi_in_vopl {
status = "disabled";
};
&dsi_in_vopb {
status = "okay";
};
十、edp和mipi屏支持 firefly为例
/*
* Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
/dts-v1/;
#include "rk3399-firefly-port.dtsi"
#include <dt-bindings/display/media-bus-format.h>
/ {
model = "Firefly-RK3399 Board EDP LP079QX1 (Linux Opensource)";
compatible = "rockchip,rk3399-firefly", "rockchip,rk3399";
test-power {
status = "okay";
};
vcc_lcd: vcc-lcd {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio1 4 GPIO_ACTIVE_HIGH>;
regulator-always-on;
regulator-boot-on;
regulator-name = "vcc_lcd";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
startup-delay-us = <20000>;
vin-supply = <&vcc_3v0>;
};
vcc_lcd_bl: vcc-lcd-bl {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio1 1 GPIO_ACTIVE_HIGH>;
regulator-always-on;
regulator-boot-on;
regulator-name = "vcc_lcd_bl";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
startup-delay-us = <20000>;
vin-supply = <&vcc_3v0>;
};
backlight_edp: backlight-edp {
status = "disabled";
compatible = "pwm-backlight";
pwms = <&pwm0 0 25000 0>;
brightness-levels = <
0 1 2 3 4 5 6 7
8 9 10 11 12 13 14 15
16 17 18 19 20 21 22 23
24 25 26 27 28 29 30 31
32 33 34 35 36 37 38 39
40 41 42 43 44 45 46 47
48 49 50 51 52 53 54 55
56 57 58 59 60 61 62 63
64 65 66 67 68 69 70 71
72 73 74 75 76 77 78 79
80 81 82 83 84 85 86 87
88 89 90 91 92 93 94 95
96 97 98 99 100 101 102 103
104 105 106 107 108 109 110 111
112 113 114 115 116 117 118 119
120 121 122 123 124 125 126 127
128 129 130 131 132 133 134 135
136 137 138 139 140 141 142 143
144 145 146 147 148 149 150 151
152 153 154 155 156 157 158 159
160 161 162 163 164 165 166 167
168 169 170 171 172 173 174 175
176 177 178 179 180 181 182 183
184 185 186 187 188 189 190 191
192 193 194 195 196 197 198 199
200 201 202 203 204 205 206 207
208 209 210 211 212 213 214 215
216 217 218 219 220 221 222 223
224 225 226 227 228 229 230 231
232 233 234 235 236 237 238 239
240 241 242 243 244 245 246 247
248 249 250 251 252 253 254 255>;
default-brightness-level = <200>;
};
backlight_dsi: backlight-dsi {
status = "disabled";
compatible = "pwm-backlight";
pwms = <&pwm1 0 25000 0>;
brightness-levels = <
0 1 2 3 4 5 6 7
8 9 10 11 12 13 14 15
16 17 18 19 20 21 22 23
24 25 26 27 28 29 30 31
32 33 34 35 36 37 38 39
40 41 42 43 44 45 46 47
48 49 50 51 52 53 54 55
56 57 58 59 60 61 62 63
64 65 66 67 68 69 70 71
72 73 74 75 76 77 78 79
80 81 82 83 84 85 86 87
88 89 90 91 92 93 94 95
96 97 98 99 100 101 102 103
104 105 106 107 108 109 110 111
112 113 114 115 116 117 118 119
120 121 122 123 124 125 126 127
128 129 130 131 132 133 134 135
136 137 138 139 140 141 142 143
144 145 146 147 148 149 150 151
152 153 154 155 156 157 158 159
160 161 162 163 164 165 166 167
168 169 170 171 172 173 174 175
176 177 178 179 180 181 182 183
184 185 186 187 188 189 190 191
192 193 194 195 196 197 198 199
200 201 202 203 204 205 206 207
208 209 210 211 212 213 214 215
216 217 218 219 220 221 222 223
224 225 226 227 228 229 230 231
232 233 234 235 236 237 238 239
240 241 242 243 244 245 246 247
248 249 250 251 252 253 254 255>;
default-brightness-level = <200>;
};
};
&gmac {
tx_delay = <0x28>;
rx_delay = <0x1B>;
};
&pcie0 {
status = "okay";
// vpcie3v3-supply = <&vcc3v3_pcie>;
};
&i2c4 {
status = "okay";
gsl3680: gsl3680@41 {
compatible = "gslX680";
reg = <0x41>;
screen_max_x = <1536>;
screen_max_y = <2048>;
touch-gpio = <&gpio1 20 IRQ_TYPE_LEVEL_LOW>;
reset-gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
};
mpu6050: mpu@68 {
compatible = "invensense,mpu6050";
reg = <0x68>;
irq-gpio = <&gpio1 4 IRQ_TYPE_LEVEL_LOW>;
mpu-debug = <1>;
mpu-int_config = <0x10>;
mpu-level_shifter = <0>;
mpu-orientation = <0 1 0 1 0 0 0 0 1>;
orientation-x= <1>;
orientation-y= <1>;
orientation-z= <1>;
};
};
&uart4 {
status = "okay";
};
&i2c4 {
status = "okay";
};
// edp
&pwm0{
status = "okay";
};
&backlight_edp {
status = "okay";
};
&edp_panel {
compatible = "sharp,lcd-f402", "panel-simple";
backlight = <&backlight_edp>;
power-supply = <&vcc_lcd>;
reset-gpios = <&gpio4 29 GPIO_ACTIVE_LOW>;
status = "okay";
};
&edp {
status = "okay";
};
&route_edp {
status = "okay";
logo,mode = "center";
};
&edp_in_vopl {
status = "okay";
};
&edp_in_vopb {
status = "disabled";
};
// dp
&dp_in_vopb {
status = "disabled";
};
&dp_in_vopl {
status = "disabled";
};
// hdmi
&hdmi_dp_sound {
status = "disabled";
};
&hdmi {
status = "disabled";
};
&hdmi_in_vopb {
status = "disabled";
};
&hdmi_in_vopl {
status = "disabled";
};
&route_hdmi {
status = "disabled";
logo,mode = "center";
};
// dsi
&pwm1{
status = "okay";
};
&backlight_dsi {
status = "okay";
};
&dsi {
status = "okay";
rockchip,lane-rate = <500>;
panel@0 {
compatible = "simple-panel-dsi";
reg = <0>;
backlight = <&backlight_dsi>;
power-supply = <&vcc_lcd>;
// 假的复位脚
reset-gpios = <&gpio0 RK_PB4 GPIO_ACTIVE_LOW>;
dsi,flags = <(MIPI_DSI_MODE_VIDEO_BURST | MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_LPM )>;
dsi,format = <MIPI_DSI_FMT_RGB888>;
bus-format = <MEDIA_BUS_FMT_RGB666_1X18>;
dsi,lanes = <4>;
prepare-delay-ms = <120>;
reset-delay-ms = <120>;
init-delay-ms = <120>;
enable-delay-ms = <120>;
unprepare-delay-ms = <120>;
disable-delay-ms = <120>;
size,width = <120>;
size,height = <170>;
status = "okay";
width-mm = <135>;
height-mm = <217>;
panel-init-sequence = [
15 00 02 E0 00
15 00 02 E1 93
15 00 02 E2 65
15 00 02 E3 F8
15 00 02 E0 04
15 00 02 2D 03
15 00 02 E0 00
15 00 02 80 03
15 00 02 E0 01
15 00 02 00 00
15 00 02 E0 01
15 00 02 4B 04
15 00 02 00 00
15 00 02 01 66
15 00 02 17 00
15 00 02 18 AF
15 00 02 19 01
15 00 02 1A 00
15 00 02 1B AF
15 00 02 1C 01
15 00 02 1F 3E
15 00 02 20 28
15 00 02 21 28
15 00 02 22 7E
15 00 02 35 05
15 00 02 37 09
15 00 02 38 04
15 00 02 39 00
15 00 02 3A 01
15 00 02 3C 76
15 00 02 3D FF
15 00 02 3E FF
15 00 02 3F 7F
15 00 02 40 06
15 00 02 41 A0
15 00 02 42 81
15 00 02 43 08
15 00 02 44 0B
15 00 02 45 28
15 00 02 55 0F
15 00 02 56 01
15 00 02 57 69
15 00 02 58 0A
15 00 02 59 0A
15 00 02 5A 29
15 00 02 5B 15
15 00 02 5D 7C
15 00 02 5E 66
15 00 02 5F 57
15 00 02 60 4A
15 00 02 61 46
15 00 02 62 36
15 00 02 63 3A
15 00 02 64 23
15 00 02 65 3A
15 00 02 66 38
15 00 02 67 38
15 00 02 68 55
15 00 02 69 43
15 00 02 6A 4A
15 00 02 6B 3B
15 00 02 6C 36
15 00 02 6D 28
15 00 02 6E 15
15 00 02 6F 00
15 00 02 70 7C
15 00 02 71 66
15 00 02 72 57
15 00 02 73 4A
15 00 02 74 46
15 00 02 75 36
15 00 02 76 3A
15 00 02 77 23
15 00 02 78 3A
15 00 02 79 38
15 00 02 7A 38
15 00 02 7B 55
15 00 02 7C 43
15 00 02 7D 4A
15 00 02 7E 3B
15 00 02 7F 36
15 00 02 80 28
15 00 02 81 15
15 00 02 82 00
15 00 02 E0 02
15 00 02 00 1E
15 00 02 01 1E
15 00 02 02 41
15 00 02 03 41
15 00 02 04 43
15 00 02 05 43
15 00 02 06 1F
15 00 02 07 1F
15 00 02 08 35
15 00 02 09 1F
15 00 02 0A 15
15 00 02 0B 15
15 00 02 0C 1F
15 00 02 0D 47
15 00 02 0E 47
15 00 02 0F 45
15 00 02 10 45
15 00 02 11 4B
15 00 02 12 4B
15 00 02 13 49
15 00 02 14 49
15 00 02 15 1F
15 00 02 16 1E
15 00 02 17 1E
15 00 02 18 40
15 00 02 19 40
15 00 02 1A 42
15 00 02 1B 42
15 00 02 1C 1F
15 00 02 1D 1F
15 00 02 1E 35
15 00 02 1F 1F
15 00 02 20 15
15 00 02 21 15
15 00 02 22 1F
15 00 02 23 46
15 00 02 24 46
15 00 02 25 44
15 00 02 26 44
15 00 02 27 4A
15 00 02 28 4A
15 00 02 29 48
15 00 02 2A 48
15 00 02 2B 1F
15 00 02 2C 1F
15 00 02 2D 1F
15 00 02 2E 42
15 00 02 2F 42
15 00 02 30 40
15 00 02 31 40
15 00 02 32 1E
15 00 02 33 1E
15 00 02 34 1F
15 00 02 35 1F
15 00 02 36 1E
15 00 02 37 1E
15 00 02 38 1F
15 00 02 39 48
15 00 02 3A 48
15 00 02 3B 4A
15 00 02 3C 4A
15 00 02 3D 44
15 00 02 3E 44
15 00 02 3F 46
15 00 02 40 46
15 00 02 41 1F
15 00 02 42 1F
15 00 02 43 1F
15 00 02 44 43
15 00 02 45 43
15 00 02 46 41
15 00 02 47 41
15 00 02 48 1E
15 00 02 49 1E
15 00 02 4A 1E
15 00 02 4B 1F
15 00 02 4C 1E
15 00 02 4D 1E
15 00 02 4E 1F
15 00 02 4F 49
15 00 02 50 49
15 00 02 51 4B
15 00 02 52 4B
15 00 02 53 45
15 00 02 54 45
15 00 02 55 47
15 00 02 56 47
15 00 02 57 1F
15 00 02 58 40
15 00 02 59 00
15 00 02 5A 00
15 00 02 5B 30
15 00 02 5C 03
15 00 02 5D 30
15 00 02 5E 01
15 00 02 5F 02
15 00 02 60 30
15 00 02 61 01
15 00 02 62 02
15 00 02 63 14
15 00 02 64 6A
15 00 02 65 05
15 00 02 66 12
15 00 02 67 73
15 00 02 68 05
15 00 02 69 14
15 00 02 6A 6A
15 00 02 6B 08
15 00 02 6C 00
15 00 02 6D 00
15 00 02 6E 00
15 00 02 6F 88
15 00 02 70 00
15 00 02 71 00
15 00 02 72 06
15 00 02 73 7B
15 00 02 74 00
15 00 02 75 07
15 00 02 76 00
15 00 02 77 DD
15 00 02 78 17
15 00 02 79 0E
15 00 02 7A 03
15 00 02 7B 00
15 00 02 7C 00
15 00 02 7D 14
15 00 02 7E 6A
15 00 02 E0 04
15 00 02 2B 2B
15 00 02 2E 44
15 00 02 09 11
15 00 02 2D 03
15 00 02 0E 48
15 00 02 E0 00
15 00 02 E6 02
15 00 02 E7 02
05 78 01 11
05 05 01 29
15 00 02 35 00
];
panel-exit-sequence = [
05 05 01 28
05 78 01 10
];
display-timings {
native-mode = <&timing0>;
timing0: timing0 {
clock-frequency = <70000000>;//<80000000>;
hactive = <800>;//<768>;
vactive = <1280>;
hsync-len = <10>; //20, 50,10
hback-porch = <10>; //50, 56,10
hfront-porch = <180>;//50, 30,180
vsync-len = <4>;//4
vback-porch = <4>;//4
vfront-porch = <8>;//8
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
};
};
};
&route_dsi{
status = "okay";
logo,mode = "center";
};
&dsi_in_vopl {
status = "disabled";
};
&dsi_in_vopb {
status = "okay";
};
&wdt {
status = "disabled";
};
十一、问题总结
11.1 硬件原理图
11.2 根据硬件配置dts
firefly上edp接口和mipi接口在硬件上，背光脚、使能脚、复位脚是一样的。实际上复位脚一样基本上就决定了这两屏不能同时启用。会导致以下错误。
[ 4.836747] rockchip-drm display-subsystem: failed to bind ff960000.dsi (ops 0xffffff8008fb0f58): -517
[ 4.837843] rockchip-drm display-subsystem: master bind failed: -517
一般需要使用两屏接口都用的情况下，硬件上都会使用不同的复位脚。这里用firefly做实验可以使用别的未使用的引脚假装为复位脚，以实现两屏接口同时启用。
&edp_panel {
.....
reset-gpios = <&gpio4 29 GPIO_ACTIVE_LOW>;
.....
};
&dsi {
.....
// 假的复位引脚
reset-gpios = <&gpio0 RK_PB4 GPIO_ACTIVE_LOW>;
.....
};
同样的它们的背光灯引脚一样，如果将引脚配置给backlight节点的话也会导致同样的错误。这里实验，不把背光脚配置在backlight节点，而是使用一路“regulator-fixed”电源直接使背光使能。
vcc_lcd_bl: vcc-lcd-bl {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio1 1 GPIO_ACTIVE_HIGH>;
regulator-always-on;
regulator-boot-on;
regulator-name = "vcc_lcd_bl";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
startup-delay-us = <20000>;
vin-supply = <&vcc_3v0>;
};
//实际上类似于下面配置背光脚
&backlight {
pwms = <&pwm1 0 25000 0>;
enable-gpios = <&gpio1 RK_PA1 GPIO_ACTIVE_HIGH>;
pinctrl-0 = <&bl_ctl>;
status = "okay";
};
使能脚一样，也通过一路“regulator-fixed”电源直接使能。实际上这样做是有问题的，关系到屏上电时序，后面会单独讲一讲。
vcc_lcd: vcc-lcd {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio1 4 GPIO_ACTIVE_HIGH>;
regulator-always-on;
regulator-boot-on;
regulator-name = "vcc_lcd";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
startup-delay-us = <20000>;
vin-supply = <&vcc_3v0>;
};
11.3 调试
1、使用xrandr查看当前屏接口状态
2、查看vop和屏接口对应关系
cat /sys/kernel/debug/dri/0/summary
VOP [ff900000.vop]: ACTIVE
Connector: DSI
overlay_mode[0] bus_format[1009] output_mode[0] color_space[0]
Display mode: 800x1280p54
clk[70000] real_clk[70000] type[0] flag[a]
H: 800 980 990 1000
V: 1280 1288 1292 1296
win0-0: ACTIVE
format: XR24 little-endian (0x34325258) SDR[0] color_space[0]
csc: y2r[0] r2r[0] r2y[0] csc mode[0]
zpos: 0
src: pos[0x0] rect[800x1280]
dst: pos[0x0] rect[800x1280]
buf[0]: addr: 0x0000000000c00000 pitch: 6144 offset: 0
win1-0: DISABLED
win2-0: DISABLED
win2-1: DISABLED
win2-2: DISABLED
win2-3: DISABLED
win3-0: ACTIVE
format: AR24 little-endian (0x34325241) SDR[0] color_space[0]
csc: y2r[0] r2r[0] r2y[0] csc mode[0]
zpos: 3
src: pos[0x0] rect[36x64]
dst: pos[764x1020] rect[36x64]
buf[0]: addr: 0x0000000001800000 pitch: 256 offset: 0
win3-1: DISABLED
win3-2: DISABLED
win3-3: DISABLED
post: sdr2hdr[0] hdr2sdr[0]
pre : sdr2hdr[0]
post CSC: r2y[0] y2r[0] CSC mode[1]
VOP [ff8f0000.vop]: ACTIVE
Connector: eDP
overlay_mode[0] bus_format[1009] output_mode[0] color_space[0]
Display mode: 1536x2048p61
clk[205000] real_clk[205000] type[0] flag[a]
H: 1536 1548 1596 1612
V: 2048 2056 2064 2068
win0-0: DISABLED
win2-0: ACTIVE
format: XR24 little-endian (0x34325258) SDR[0] color_space[0]
csc: y2r[0] r2r[0] r2y[0] csc mode[0]
zpos: 0
src: pos[0x0] rect[1536x2048]
dst: pos[0x0] rect[1536x2048]
buf[0]: addr: 0x0000000000c00000 pitch: 6144 offset: 0
win2-1: DISABLED
win2-2: DISABLED
win2-3: DISABLED
post: sdr2hdr[0] hdr2sdr[0]
pre : sdr2hdr[0]
post CSC: r2y[0] y2r[0] CSC mode[1]
3、查看GPIO口状态（电源使能）
cat /sys/kernel/debug/gpio
GPIOs 0-31, platform/pinctrl, gpio0:
gpio-2 ( |vcc3v3_3g ) out hi
gpio-4 ( |bt_default_wake_host) in lo
gpio-5 ( |GPIO Key Power ) in hi
gpio-9 ( |bt_default_reset ) out lo
gpio-10 ( |reset ) out hi
gpio-13 ( |? ) out lo
gpio-28 ( |reset ) out lo
GPIOs 32-63, platform/pinctrl, gpio1:
gpio-32 ( |vcc5v0_host ) out hi
gpio-33 ( |vcc_lcd_bl ) out hi
gpio-34 ( |int-n ) in hi
gpio-35 ( |vbus-5v ) out lo
gpio-36 ( |vcc_lcd ) out hi
gpio-45 ( |pmic-hold-gpio ) out hi
gpio-46 ( |vsel ) out lo
gpio-49 ( |vcc3v3_pcie ) out hi
gpio-50 ( |vsel ) out lo
gpio-56 ( |pmic-stby-gpio ) out hi
GPIOs 64-95, platform/pinctrl, gpio2:
gpio-83 ( |bt_default_rts ) in hi
gpio-90 ( |bt_default_wake ) in lo
gpio-91 ( |? ) out hi
GPIOs 96-127, platform/pinctrl, gpio3:
gpio-111 ( |mdio-reset ) out hi
GPIOs 128-159, platform/pinctrl, gpio4:
gpio-149 ( |hp-con-gpio ) out lo
gpio-157 ( |reset ) out hi
gpio-158 ( |vcc_sd ) out lo
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