求最小公倍数

求两个数的最大公约数和最小公倍数

两个数互相减，知道两者相等即最大公约数，两数相乘/最大公约数即最小公倍数

对于状态变换，但是变量的值保持不变，可以不进行赋值

但是result状态vld_out为1，idle不能保持为1

`timescale 1ns/1ns

module lcm#(
parameter DATA_W = 8)
(
input [DATA_W-1:0] A,
input [DATA_W-1:0] B,
input 			vld_in,
input			rst_n,
input 			clk,
output	wire	[DATA_W*2-1:0] 	lcm_out,
output	wire 	[DATA_W-1:0]	mcd_out,
output	reg					vld_out
);
    reg [DATA_W-1:0] buf1,buf2;
    reg [DATA_W*2-1:0] mult;
    parameter idle=  2'd0;
    parameter jian=  2'd1;
    parameter result=2'd2;
    reg [DATA_W-1:0]mcd;
    reg [1:0]c_state,n_state;
    always@(posedge clk or negedge rst_n)begin
        if(!rst_n)
            c_state<=idle;
        else
            c_state<=n_state;
    end
    always@(posedge clk or negedge rst_n)begin
        if(!rst_n)begin
            n_state<=idle;
            buf1    <=0;
            buf2    <=0;
            mcd     <=0;
            vld_out <=0;
            mult    <=0;
        end
        else begin
            case(c_state)
                idle:begin
                    vld_out<=0;  //result状态vld_out为1，idle不能保持
                    if(vld_in)begin
                        n_state<=jian;
                        buf1    <=A;
                        buf2    <=B;
                        mult    <=A*B;
                    end
                    else begin
                        n_state<=idle;
                    end
                end
                jian:begin
                    if(buf1>buf2)begin
                       buf1<=buf1-buf2;
                       buf2<=buf2;
                       n_state<=jian;
                    end
                    else if(buf1<buf2)begin
                       buf2<=buf2-buf1;
                       buf1<=buf1;
                       n_state<=jian;
                    end
                    else 
                        n_state<=result;
                end
                result:begin
                    mcd<=buf1;
                    n_state<=idle;
                    vld_out<=1;
                end
                default:begin
                    n_state<=idle;
                    vld_out<=0;
                end
            endcase
        end
    end
    assign lcm_out=mult/mcd;
    assign mcd_out=mcd;                        
                        
                            
endmodule