L2VPX知识要点

为什么需要实现 L2 VPX
(1) 相对于 QoS 和网络的融合
(2) L3 VPX不足
IP 的唯一支持
PE 的硬件要求
客户对路由的控制(安全性问题)

Technology and VPX Diversity


融合网络,Complete Integration


L2 VPX体系结构:

Control-Plane:维护 PE-PE 之间的伪线,AToM 的伪线是由一对 LSP 组成
Data-Plane:完成本地封装与伪线封装的转换

同种介质接入的是 Like-to-Like
不同种介质接入的是 Any-to-Any

运行 LDP 环境,MPLS 的网络技术是 AToM(Any Transport over MPLS)
运行纯粹 IP 网络的网络技术是 L2TPv3(Layer 2 Tunnel Protocol)

NSP / PEP的工作过程:
NSP 用来识别伪线类型是 L2L(like-to-like) & A2A(any-to-any)
如果是Like-to-Like,客户过来的数据帧要去除
如果是Any-to-Any,客户过来的数据帧要去除伪线配置中所规定的信息之外的数据封装进伪线(不会探测客户信息)


MTU 在 L2 VPX中的问题(主要原因二层数据帧不能分片)
EoMPLS 标签开销:

核心 MTU >= 边缘MTU + 传输首部 + AToM 首部及控制字大小 + 标签大小
边缘 MTU 是 PE 面向 CE 接口所配置的 MTU
传输首部:端口模式是 14 Byte / VLAN 模式是 18 Byte

最大传输标准以太帧大小 = 1500 - 4 - 4 - 14(二层信息)
最大传输 dot1Q 以太帧大小 = 1500 - 4 - 4 - 18(比标准以太帧多 4 byte 的 VLAN 信息)

WAN Protocol over MPLS
HDLCoMPLS
PPPoMPLS
FRoMPLS
ATMoMPLS

ethernet over mpls=EoMPLS

统称AToM

Abstract This standard describes VITA 46.0 Advanced Module Format for VMEbus systems, an evolutionary step forward for the provision of high-speed interconnects in harsh-environment applications. Foreword VME has been the de-facto bus standard for Commercial off the Shelf ( COTS ) Circuit Card Assemblies since the 1980’s. VME boards have proven to be remarkably capable of evolving to support newer technologies with innovations such as VME Subsystem Bus, PCI Mezzanine Cards (PMC’s) and VME320. However, advances in technologies, appearing particularly in interconnects, have demonstrated the need for an advance in system development. This advance needs to accommodate high speed interconnect, particularly serial interconnects, and higher power delivery in concert with better heat removal. This draft standard addresses these needs in the context of IEEE 1101 form factor modules. Other specifications may address alternate outlines, such as VITA-48 (Draft). Because electronics miniaturization is driving the plug-in module I/O count, most system interconnects will need:  Multi-gigabit differential technology  Core computing cluster switched fabrics  Serial RapidIO, PCI Express, Advanced Switching Interconnect  Sufficient ports to enable distributed switching or centralized switching The plethora of high-speed interfaces available for tomorrow’s plug-in modules:  Network interfaces (Fibre Channel, 10 GbE XAUI, Infiniband…,)  Digital video (TMDS, PanelLink, OpenLDI…)  Mass storage interface (Fibre Channel, Serial ATA…,)  FPGA-based inter-board connections (e.g. Xilinx RocketIO)  Custom sensor interfaces VITA 46 provides an evolutionary roadmap for VME users:  To leverage the broad spectrum of high-speed interconnect technologies  Backward compatibility with VME bus electrical, software and selected mechanicals  Enables heterogeneous architectures which preserve existing investments in COTS-based systems  Addresses both 3U and 6U form factors with commonality  Harsh environment fit ‘designed-in’ up front in the standard  Rugged air or conduction-cooled form factors  High value placed on rear-panel I/O  High-speed connector survivability/compliance
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