在这里插入代/*
* ads1248.h
*
* Function prototypes and device definitions for the ADS1248
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*///******************************************************************************// ADS1248 Function File for Demo Functions//// Description: SPI master talks to SPI slave (ADS1248) using 4-wire mode. LaunchPad// is used for this example.// ACLK = n/a, MCLK = SMCLK = DCO ~24MHz, BRCLK = SMCLK/7//////// MSP430F5529// -----------------// | P1.3|<- Data Interrupt (DRDY)// | |// START <-|P6.0 P6.2|-> Device Select (CS)// | |// RESET <-|P6.1 P3.0|-> Data Out (UCB0SIMO -> DIN)// | |// <-|P1.6 P3.1|<- Data In (DOUT -> UCB0SOMI)// | |// Serial Clock Out (UCB0CLK - SCLK) <-|P3.2 P2.7|->// | |// I2C SCL (UCB1SCL) <-|P4.2 P8.1|->// | |// I2C SDA (UCB1SDA)<>-|P4.1 P2.6|->// | |// | P3.7|->// | |//////******************************************************************************#ifndefADS1248_H_#defineADS1248_H_#ifdefined(__MSP430F5529__)/* Definition of GPIO Port Bits Used for Communication */// P6.2#defineADS1248_CS0x04// P3.0#defineADS1248_DIN0x01// P3.1#defineADS1248_DOUT0x02// P1.3#defineADS1248_DRDY0x08// P3.2#defineADS1248_SCLK0x04// P6.0#defineADS1248_START0x01// P6.1#defineADS1248_RESET0x02#elifdefined(PART_TM4C1294NCPDT)/// The clock rate of the internal XTAL...#defineDEVICE_ICLK16384000/// 2 MHz#defineSPI_SPEED2000000/// The TIVA has a 4 to 16 bit word size, to handle 32 bit words the TIVA needs to assemble/// two groups of words together. 32 bits comprises of 2x16 words.#defineSPI_WORD_SIZE8/// This defines the clock polarity and phase. See the datasheet for more info.#defineSPI_MOTO_MODESSI_FRF_MOTO_MODE_1#defineSPI_BASESSI3_BASE#defineSYSCTL_SSISYSCTL_PERIPH_SSI3#defineADS1248_SCLKGPIO_PQ0_SSI3CLK#defineADS1248_DOUTGPIO_PQ3_SSI3XDAT1#defineADS1248_DINGPIO_PQ2_SSI3XDAT0#defineSPI_MODESSI_MODE_MASTER// Chip select feedthrough GPIO - we hand feed chip select so overages may be pumped out.#defineNCS_PORTGPIO_PORTK_BASE#defineADS1248_CSGPIO_PIN_0#defineSPI_GPIO_PORTGPIO_PORTQ_BASE#defineSPI_GPIO_PINS(GPIO_PIN_0 | GPIO_PIN_2 | GPIO_PIN_3)// GPIO definitions.#defineDRDY_PORTGPIO_PORTM_BASE#defineDRDY_PINGPIO_PIN_1#definenDRDY_REG(((((volatileuint32_t*)0x40063008))[0]))// PB#defineSTART_PORTGPIO_PORTB_BASE#defineADS1248_STARTGPIO_PIN_4#defineRESET_PORTGPIO_PORTB_BASE#defineADS1248_RESETGPIO_PIN_5#endif/* Error Return Values */#defineADS1248_NO_ERROR0#defineADS1248_ERROR-1/* Command Definitions */// System Control#defineADS1248_CMD_WAKEUP0x00#defineADS1248_CMD_SLEEP0x03#defineADS1248_CMD_SYNC0x05#defineADS1248_CMD_RESET0x07#defineADS1248_CMD_NOP0xFF// Data Read#defineADS1248_CMD_RDATA0x13#defineADS1248_CMD_RDATAC0x15#defineADS1248_CMD_SDATAC0x17// Read Register#defineADS1248_CMD_RREG0x20// Write Register#defineADS1248_CMD_WREG0x40// Calibration#defineADS1248_CMD_SYSOCAL0x60#defineADS1248_CMD_SYSGCAL0x61#defineADS1248_CMD_SELFOCAL0x62/* ADS1248 Register Definitions */#defineADS1248_0_MUX00x00#defineADS1248_1_VBIAS0x01#defineADS1248_2_MUX10x02#defineADS1248_3_SYS00x03#defineADS1248_4_OFC00x04#defineADS1248_5_OFC10x05#defineADS1248_6_OFC20x06#defineADS1248_7_FSC00x07#defineADS1248_8_FSC10x08#defineADS1248_9_FSC20x09#defineADS1248_10_IDAC00x0A#defineADS1248_11_IDAC10x0B#defineADS1248_12_GPIOCFG0x0C#defineADS1248_13_GPIODIR0x0D#defineADS1248_14_GPIODAT0x0E/* ADS1248 Register 0 (MUX0) Definition */// Bit 7 | Bit 6 | Bit 5 | Bit 4 | Bit 3 | Bit 2 | Bit 1 | Bit 0//--------------------------------------------------------------------------------------------// BCS[1:0] | MUX_SP[2:0] | MUX_SN[2:0]//// Define BCS (burnout current source)#defineADS1248_BCS_OFF0x00#defineADS1248_BCS_500nA0x40#defineADS1248_BCS_2uA0x80#defineADS1248_BCS_10uA0xC0// Define Positive MUX Input Channels#defineADS1248_AINP00x00#defineADS1248_AINP10x08#defineADS1248_AINP20x10#defineADS1248_AINP30x18#defineADS1248_AINP40x20#defineADS1248_AINP50x28#defineADS1248_AINP60x30#defineADS1248_AINP70x38// Define Negative Mux Input Channels#defineADS1248_AINN00x00#defineADS1248_AINN10x01#defineADS1248_AINN20x02#defineADS1248_AINN30x03#defineADS1248_AINN40x04#defineADS1248_AINN50x05#defineADS1248_AINN60x06#defineADS1248_AINN70x07/* ADS1248 Register 1 (VBIAS) Definition */// Bit 7 | Bit 6 | Bit 5 | Bit 4 | Bit 3 | Bit 2 | Bit 1 | Bit 0//--------------------------------------------------------------------------------------------// VBIAS[7:0]//#defineADS1248_VBIAS_OFF0x00#defineADS1248_VBIAS00x01#defineADS1248_VBIAS10x02#defineADS1248_VBIAS20x04#defineADS1248_VBIAS30x08#defineADS1248_VBIAS40x10#defineADS1248_VBIAS50x20#defineADS1248_VBIAS60x40#defineADS1248_VBIAS70x80/* ADS1248 Register 2 (MUX1) Definition */// Bit 7 | Bit 6 | Bit 5 | Bit 4 | Bit 3 | Bit 2 | Bit 1 | Bit 0//--------------------------------------------------------------------------------------------// CLKSTAT | VREFCON[1:0] | REFSELT[1:0] | MUXCAL[2:0]//// Define Internal Reference#defineADS1248_INT_VREF_OFF0x00#defineADS1248_INT_VREF_ON0x20#defineADS1248_INT_VREF_CONV0x40// Define Reference Select#defineADS1248_REF00x00#defineADS1248_REF10x08#defineADS1248_INT0x10#defineADS1248_INT_REF00x18// Define System Monitor#defineADS1248_MEAS_NORM0x00#defineADS1248_MEAS_OFFSET0x01#defineADS1248_MEAS_GAIN0x02#defineADS1248_MEAS_TEMP0x03#defineADS1248_MEAS_REF10x04#defineADS1248_MEAS_REF00x05#defineADS1248_MEAS_AVDD0x06#defineADS1248_MEAS_DVDD0x07/* ADS1248 Register 3 (SYS0) Definition */// Bit 7 | Bit 6 | Bit 5 | Bit 4 | Bit 3 | Bit 2 | Bit 1 | Bit 0//--------------------------------------------------------------------------------------------// 0 | PGA[2:0] | DOR[3:0]//// Define Gain#defineADS1248_GAIN_10x00#defineADS1248_GAIN_20x10#defineADS1248_GAIN_40x20#defineADS1248_GAIN_80x30#defineADS1248_GAIN_160x40#defineADS1248_GAIN_320x50#defineADS1248_GAIN_640x60#defineADS1248_GAIN_1280x70//Define data rate#defineADS1248_DR_50x00#defineADS1248_DR_100x01#defineADS1248_DR_200x02#defineADS1248_DR_400x03#defineADS1248_DR_800x04#defineADS1248_DR_1600x05#defineADS1248_DR_3200x06#defineADS1248_DR_6400x07#defineADS1248_DR_10000x08#defineADS1248_DR_20000x09/* ADS1248 Register 4 (OFC0) Definition */// Bit 7 | Bit 6 | Bit 5 | Bit 4 | Bit 3 | Bit 2 | Bit 1 | Bit 0//--------------------------------------------------------------------------------------------// OFC0[7:0]///* ADS1248 Register 5 (OFC1) Definition */// Bit 7 | Bit 6 | Bit 5 | Bit 4 | Bit 3 | Bit 2 | Bit 1 | Bit 0//--------------------------------------------------------------------------------------------// OFC1[7:0]///* ADS1248 Register 6 (OFC2) Definition */// Bit 7 | Bit 6 | Bit 5 | Bit 4 | Bit 3 | Bit 2 | Bit 1 | Bit 0//--------------------------------------------------------------------------------------------// OFC2[7:0]///* ADS1248 Register 7 (FSC0) Definition */// Bit 7 | Bit 6 | Bit 5 | Bit 4 | Bit 3 | Bit 2 | Bit 1 | Bit 0//--------------------------------------------------------------------------------------------// FSC0[7:0]///* ADS1248 Register 8 (FSC1) Definition */// Bit 7 | Bit 6 | Bit 5 | Bit 4 | Bit 3 | Bit 2 | Bit 1 | Bit 0//--------------------------------------------------------------------------------------------// FSC1[7:0]///* ADS1248 Register 9 (FSC2) Definition */// Bit 7 | Bit 6 | Bit 5 | Bit 4 | Bit 3 | Bit 2 | Bit 1 | Bit 0//--------------------------------------------------------------------------------------------// FSC2[7:0]///* ADS1248 Register A (IDAC0) Definition */// Bit 7 | Bit 6 | Bit 5 | Bit 4 | Bit 3 | Bit 2 | Bit 1 | Bit 0//--------------------------------------------------------------------------------------------// ID[3:0] | DRDY_MODE | IMAG[2:0]//// Define DRDY mode on DOUT#defineADS1248_DRDY_OFF0x00#defineADS1248_DRDY_ON0x08//Define IDAC Magnitude#defineADS1248_IDAC_OFF0x00#defineADS1248_IDAC_500x01#defineADS1248_IDAC_1000x02#defineADS1248_IDAC_2500x03#defineADS1248_IDAC_5000x04#defineADS1248_IDAC_7500x05#defineADS1248_IDAC_10000x06#defineADS1248_IDAC_15000x07/* ADS1248 Register B (IDAC1) Definition */// Bit 7 | Bit 6 | Bit 5 | Bit 4 | Bit 3 | Bit 2 | Bit 1 | Bit 0//--------------------------------------------------------------------------------------------// I1DIR[3:0] | I2DIR[3:0]//// Define IDAC1 Output#defineADS1248_IDAC1_A00x00#defineADS1248_IDAC1_A10x10#defineADS1248_IDAC1_A20x20#defineADS1248_IDAC1_A30x30#defineADS1248_IDAC1_A40x40#defineADS1248_IDAC1_A50x50#defineADS1248_IDAC1_A60x60#defineADS1248_IDAC1_A70x70#defineADS1248_IDAC1_EXT10x80#defineADS1248_IDAC1_EXT20x90#defineADS1248_IDAC1_OFF0xF0// Define IDAC2 Output#defineADS1248_IDAC2_A00x00#defineADS1248_IDAC2_A10x01#defineADS1248_IDAC2_A20x02#defineADS1248_IDAC2_A30x03#defineADS1248_IDAC2_A40x04#defineADS1248_IDAC2_A50x05#defineADS1248_IDAC2_A60x06#defineADS1248_IDAC2_A70x07#defineADS1248_IDAC2_EXT10x08#defineADS1248_IDAC2_EXT20x09#defineADS1248_IDAC2_OFF0x0F/* ADS1248 Register C (GPIOCFG) Definition */// Bit 7 | Bit 6 | Bit 5 | Bit 4 | Bit 3 | Bit 2 | Bit 1 | Bit 0//--------------------------------------------------------------------------------------------// IOCFG[7:0]//// Define GPIO (0-Analog; 1-GPIO)#defineADS1248_GPIO_00x01#defineADS1248_GPIO_10x02#defineADS1248_GPIO_20x04#defineADS1248_GPIO_30x08#defineADS1248_GPIO_40x10#defineADS1248_GPIO_50x20#defineADS1248_GPIO_60x40#defineADS1248_GPIO_70x80/* ADS1248 Register D (GPIODIR) Definition */// Bit 7 | Bit 6 | Bit 5 | Bit 4 | Bit 3 | Bit 2 | Bit 1 | Bit 0//--------------------------------------------------------------------------------------------// IODIR[7:0]//// Define GPIO Direction (0-Output; 1-Input)#defineADS1248_IO_00x01#defineADS1248_IO_10x02#defineADS1248_IO_20x04#defineADS1248_IO_30x08#defineADS1248_IO_40x10#defineADS1248_IO_50x20#defineADS1248_IO_60x40#defineADS1248_IO_70x80/* ADS1248 Register E (GPIODAT) Definition */// Bit 7 | Bit 6 | Bit 5 | Bit 4 | Bit 3 | Bit 2 | Bit 1 | Bit 0//--------------------------------------------------------------------------------------------// IOIDAT[7:0]//#defineADS1248_OUT_00x01#defineADS1248_OUT_10x02#defineADS1248_OUT_20x04#defineADS1248_OUT_30x08#defineADS1248_OUT_40x10#defineADS1248_OUT_50x20#defineADS1248_OUT_60x40#defineADS1248_OUT_70x80/* Low Level ADS1248 Device Functions */voidInitConfig(void);// Device initialization, setting a default starting conditionintADS1248WaitForDataReady(int Timeout);// DRDY polling, with a maximum polling wait time if needed for break from loop; Timeout=0 is no timeoutvoidADS1248AssertCS(int fAssert);// Assert/deassert CS (0=low, 1=high)voidADS1248SendByte(unsignedchar cData );// Send byte to the ADS1248unsignedcharADS1248ReceiveByte(void);// Receive byte from the ADS1248/* ADS1248 Higher Level Functions */// Commands as given in datasheetvoidADS1248SendWakeup(void);// Send device Wakeup CommandvoidADS1248SendSleep(void);// Set device to SleepvoidADS1248SendSync(void);// Sync devicevoidADS1248SendResetCommand(void);// Send a device Reset CommandlongADS1248ReadData(void);// Read the data results by commandvoidADS1248ReadRegister(int StartAddress,int NumReg,unsigned* pData);// Read the register(s) (NumReg is the total number of registers read)voidADS1248WriteRegister(int StartAddress,int NumReg,unsigned* pData);// Write the register(s) (NumReg is the total number of registers written)voidADS1248WriteSequence(int StartAddress,int NumReg,unsigned* pData);// Write the register(s) (NumReg is the total number of registers written)voidADS1248SendRDATAC(void);// Read data continuous modevoidADS1248SendSDATAC(void);// Stop read data continuous modevoidADS1248SendSYSOCAL(void);// System offset calibrationvoidADS1248SendSYSGCAL(void);// System gain calibrationvoidADS1248SendSELFOCAL(void);// Self offset calibration/* Register Set Value Commands */// Relate to MUX0intADS1248SetBurnOutSource(int BurnOut);intADS1248SetChannel(int pMux,int vMux);// pMux (0=AINP. 1=AINN); vMux (value of mux channel selection)// Relate to VBIASintADS1248SetBias(unsignedchar vBias);// Relate to MUX1intADS1248SetIntRef(int sRef);intADS1248SetVoltageReference(int VoltageRef);intADS1248SetSystemMonitor(int Monitor);// Relate to SYS0intADS1248SetGain(int Gain);intADS1248SetDataRate(int DataRate);// Relate to OFC (3 registers)intADS1248SetOFC(long RegOffset);// Relate to FSC (3 registers)intADS1248SetFSC(long RegGain);// Relate to IDAC0intADS1248SetDRDYMode(int DRDYMode);intADS1248SetCurrentDACOutput(int CurrentOutput);// Relate to IDAC1intADS1248SetIDACRouting(int IDACroute,int IDACdir);// IDACRoute (0 = I1DIR, 1 = I2DIR)// Relate to GPIOCFGintADS1248SetGPIOConfig(unsignedchar cdata);// Relate to GPIODIRintADS1248SetGPIODir(unsignedchar cdata);// Relate to GPIODATintADS1248SetGPIO(unsignedchar cdata);/* Register Get Value Commands */// Relate to MUX0intADS1248GetBurnOutSource(void);intADS1248GetChannel(int cMux);// Relate to VBIASunsignedcharADS1248GetBias(void);//Relate to MUX1intADS1248GetCLKSTAT(void);intADS1248GetIntRef(void);intADS1248GetVoltageReference(void);intADS1248GetSystemMonitor(void);// Relate to SYS0intADS1248GetGain(void);intADS1248GetDataRate(void);// Relate to OFC (3 registers)longADS1248GetOFC(void);// Relate to FSC (3 registers)longADS1248GetFSC(void);// Relate to IDAC0intADS1248GetID(void);intADS1248GetDRDYMode(void);intADS1248GetCurrentDACOutput(void);// Relate to IDAC1intADS1248GetIDACRouting(int WhichOne);// IDACRoute (0 = I1DIR, 1 = I2DIR)// Relate to GPIOCFGunsignedcharADS1248GetGPIOConfig(void);// Relate to GPIODIRunsignedcharADS1248GetGPIODir(void);// Relate to GPIODATunsignedcharADS1248GetGPIO(void);/* Miscellaneous Commands */longADS1248RDATACRead(void);// reads data directly based on RDATAC mode (writes NOP) and 32 SCLKs/* Hardware Control Functions for Device Pin Control */// Possible Need for Reset, Start (power down) (0-low, 1-high, 2-pulse)intADS1248SetStart(int nStart);intADS1248SetReset(int nReset);voidInitSPI(void);voidInitDevice(void);#endif/* ADS1248_H_ */
码片
在这里/*
* ads1248.c
*
* ADS1248 device functions
*
* Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com/
*
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*///******************************************************************************// ADS1248 Function File for Demo Functions//// Description: SPI master talks to SPI slave (ADS1248) using 4-wire mode. LaunchPad// is used for this example.// ACLK = n/a, MCLK = SMCLK = DCO ~24MHz, BRCLK = SMCLK/7//////// MSP430F5529// -----------------// | P1.3|<- Data Interrupt (DRDY)// | |// START <-|P6.0 P6.2|-> Device Select (CS)// | |// RESET <-|P6.1 P3.0|-> Data Out (UCB0SIMO -> DIN)// | |// <-|P1.6 P3.1|<- Data In (DOUT -> UCB0SOMI)// | |// Serial Clock Out (UCB0CLK - SCLK) <-|P3.2 P2.7|->// | |// I2C SCL (UCB1SCL) <-|P4.2 P8.1|->// | |// I2C SDA (UCB1SDA)<>-|P4.1 P2.6|->// | |// | P3.7|->// | |//////******************************************************************************/*
* ======== Standard MSP430 includes ========
*/#include<msp430.h>#include"ads1248.h"voidInitSPI(void){#ifdefined(__MSP430F5529__)
UCB0CTL1 |= UCSWRST;// Hold peripheral in reset
UCB0CTL0 = UCMST + UCSYNC + UCMSB;// SPI master, synchronous
UCB0CTL1 = UCSSEL_2 + UCSWRST;// Use SMCLK for bit rate clock and keep in reset
UCB0BR0 =14;// SMCLK/12 = SCLK (2MHz)
UCB0CTL1 &=~UCSWRST;// Release peripheral for use#elifdefined(PART_TM4C1294NCPDT)externuint32_t sysfreq;uint32_t dataRx;SysCtlPeripheralEnable(SYSCTL_SSI);#ifdefDIFFERENT_CS_PORTGPIOPinTypeGPIOOutput(NCS_PORT, ADS1248_CS);//nCS_DIS;#endifGPIOPinConfigure(ADS1248_SCLK);GPIOPinConfigure(ADS1248_DOUT);GPIOPinConfigure(ADS1248_DIN);GPIOPinTypeSSI(SPI_GPIO_PORT, SPI_GPIO_PINS );SSIConfigSetExpClk(SPI_BASE, sysfreq, SPI_MOTO_MODE, SPI_MODE, SPI_SPEED, SPI_WORD_SIZE);SSIEnable(SPI_BASE);// should happen AFTER SPI init.SSIAdvModeSet(SPI_BASE, SSI_ADV_MODE_READ_WRITE);SSIAdvFrameHoldEnable(SPI_BASE);// clear out any 'junk' that may be in the SPI RX fifo.while(SSIDataGetNonBlocking(SPI_BASE,&dataRx));#endif}voidInitDevice(void){#ifdefined(__MSP430F5529__)
P3SEL |= ADS1248_DIN + ADS1248_DOUT + ADS1248_SCLK;
P1SEL &=~(ADS1248_DRDY);// define initial states
P6OUT |= ADS1248_START;
P6OUT |= ADS1248_CS;
P6OUT |= ADS1248_RESET;// define inputs
P1DIR &=~(ADS1248_DRDY);// DRDY is an input to the micro
P1IES |= ADS1248_DRDY;// and should be used as an interrupt to retrieve data// define outputs
P6DIR |= ADS1248_START;
P6DIR |= ADS1248_CS;
P6DIR |= ADS1248_RESET;#elifdefined(PART_TM4C1294NCPDT)GPIOPinTypeGPIOOutput(START_PORT, ADS1248_START);// startGPIOPinWrite(START_PORT, ADS1248_START,0);GPIOPinTypeGPIOOutput(RESET_PORT, ADS1248_RESET);// resetGPIOPinTypeGPIOInput(DRDY_PORT, ADS1248_DRDY);// DRDYGPIOIntTypeSet(DRDY_PORT, ADS1248_DRDY, GPIO_FALLING_EDGE);// GPIO_HIGH_LEVEL ?GPIOPinWrite(RESET_PORT,ADS1248_RESET, ADS1248_RESET);#endif}/*
* ADS1248 Initial Configuration
*/voidInitConfig(void){//establish some startup register settingsunsigned regArray[4];// Send SDATAC commandADS1248SendSDATAC();ADS1248WaitForDataReady(0);ADS1248SendSDATAC();//write the desired default register settings for the first 4 registers NOTE: values shown are the POR values as per datasheet
regArray[0]=0x01;
regArray[1]=0x00;
regArray[2]=0x00;
regArray[3]=0x00;ADS1248WriteSequence(ADS1248_0_MUX0,4, regArray);return;}/*
* DRDY Polling Function
* Timeout = 0 is wait until DRDY goes low no matter how long it takes, otherwise wait the specified number of cycles
*/intADS1248WaitForDataReady(int Timeout){/* This function shows a method for polling DRDY instead of using as interrupt function
* -- Note: this method is not used in the demo, but if we the method was switched to polling from the interrupt method,
* the desired port is PORT2 on the MSP430 as this demo is configured.
*/#ifdefined(__MSP430F5529__)if(Timeout >0){// wait for /DRDY = 1 to make sure it is high before we look for the transition lowwhile(!(P1IN & ADS1248_DRDY)&&(Timeout-->=0));// wait for /DRDY = 0while((P1IN & ADS1248_DRDY)&&(Timeout-->=0));if(Timeout <0)return ADS1248_ERROR;//ADS1248_TIMEOUT_WARNING;}else{// wait for /DRDY = 1while(!(P1IN & ADS1248_DRDY));// wait for /DRDY = 0while((P1IN & ADS1248_DRDY));}#elifdefined(PART_TM4C1294NCPDT)/* wait for nDRDY_REG to deassert as a known valid data */if(Timeout >0){// wait for /DRDY = 1 to make sure it is high before we look for the transition lowwhile(!(nDRDY_REG)&&(Timeout-->=0));// wait for /DRDY = 0while((nDRDY_REG)&&(Timeout-->=0));if(Timeout <0)return ADS1248_ERROR;//ADS1248_TIMEOUT_WARNING;}else{// wait for /DRDY = 1while(!(nDRDY_REG));// wait for /DRDY = 0while(nDRDY_REG);}#endifreturn ADS1248_NO_ERROR;}/*
* Primary Low Level Functions
*/voidADS1248AssertCS(int fAssert){#ifdefined(__MSP430F5529__)// This example is using PORT6 for GPIO CS control, ADS1248_CS is defined in ads1248.hif(fAssert){// fAssert=0 is CS low, fAssert=1 is CS high_delay_cycles(50);// Must delay minimum of 7 tosc periods from last falling SCLK to rising CS
P6OUT |=(ADS1248_CS);}else
P6OUT &=~(ADS1248_CS);#elifdefined(PART_TM4C1294NCPDT)if(fAssert){// fAssert=0 is CS low, fAssert=1 is CS highSysCtrlDelay(100);// Must delay minimum of 7 tosc periods from last falling SCLK to rising CSGPIOPinWrite(NCS_PORT, ADS1248_CS,0xFF);}elseGPIOPinWrite(NCS_PORT, ADS1248_CS,0);#endif}voidADS1248SendByte(unsignedchar Byte){char dummy;#ifdefined(__MSP430F5529__)
dummy = UCB0RXBUF;while(!(UCB0IFG&UCTXIFG));// Make sure nothing is already in the TX buffer
UCB0TXBUF = Byte;// Send the passed Byte out the SPI buswhile(!(UCB0IFG&UCRXIFG));// Before returning wait until transmission is complete and clear the RX buffer
dummy = UCB0RXBUF;#elifdefined(PART_TM4C1294NCPDT)HWREG(SPI_BASE + SSI_O_DR)= Byte;// set up data for the next xmitwhile(!(HWREG(SPI_BASE + SSI_O_SR)& SSI_SR_RNE));// wait for data to appear
dummy =HWREG(SPI_BASE+SSI_O_DR);// grab that data#endif}unsignedcharADS1248ReceiveByte(void){unsignedchar Result =0;#ifdefined(__MSP430F5529__)while(!(UCB0IFG&UCTXIFG));// Make sure nothing is currently transmitting
UCB0TXBUF = ADS1248_CMD_NOP;// Send out NOP to initiate SCLKwhile(!(UCB0IFG&UCRXIFG));// Wait until all data is transmitted (received)
Result = UCB0RXBUF;// Capture the receive buffer and return the Result#elifdefined(PART_TM4C1294NCPDT)// MUST MUST MUST purge junk from fifo!!!!while(SSIDataGetNonBlocking(SPI_BASE,&junk));HWREG(SPI_BASE + SSI_O_DR)= ADS1248_CMD_NOP;// Send out NOP to initiate SCLKwhile(!(HWREG(SPI_BASE + SSI_O_SR)& SSI_SR_RNE));// wait for data to appear
Result =HWREG(SPI_BASE+SSI_O_DR);// grab that data#endifreturn Result;}/*
* ADS1248 Higher Level Functions and Commands
*/voidADS1248SendWakeup(void){// assert CS to start transferADS1248AssertCS(0);// send the command byteADS1248SendByte(ADS1248_CMD_WAKEUP);// de-assert CSADS1248AssertCS(1);return;}voidADS1248SendSleep(void){// assert CS to start transferADS1248AssertCS(0);// send the command byteADS1248SendByte(ADS1248_CMD_SLEEP);/*
* CS must remain low for the device to remain asleep by command...otherwise bring START low by pin control
*/return;}voidADS1248SendSync(void){// assert CS to start transferADS1248AssertCS(0);// send the command byteADS1248SendByte(ADS1248_CMD_SYNC);// de-assert CSADS1248AssertCS(1);return;}voidADS1248SendResetCommand(void){// assert CS to start transferADS1248AssertCS(0);// send the command byteADS1248SendByte(ADS1248_CMD_RESET);// de-assert CSADS1248AssertCS(1);return;}longADS1248ReadData(void){long Data;// assert CS to start transferADS1248AssertCS(0);// send the command byteADS1248SendByte(ADS1248_CMD_RDATA);// get the conversion result#ifdefADS1148
Data =ADS1248ReceiveByte();
Data =(Data <<8)|ADS1248ReceiveByte();// sign extend data if the MSB is high (16 to 32 bit sign extension)if(Data &0x8000)
Data |=0xffff0000;#else
Data =ADS1248ReceiveByte();
Data =(Data <<8)|ADS1248ReceiveByte();
Data =(Data <<8)|ADS1248ReceiveByte();// sign extend data if the MSB is high (24 to 32 bit sign extension)if(Data &0x800000)
Data |=0xff000000;#endif// de-assert CSADS1248AssertCS(1);return Data;}voidADS1248ReadRegister(int StartAddress,int NumRegs,unsigned* pData){int i;// assert CS to start transferADS1248AssertCS(0);// send the command byteADS1248SendByte(ADS1248_CMD_RREG |(StartAddress &0x0f));ADS1248SendByte((NumRegs-1)&0x0f);// get the register contentfor(i=0; i< NumRegs; i++){*pData++=ADS1248ReceiveByte();}// de-assert CSADS1248AssertCS(1);return;}voidADS1248WriteRegister(int StartAddress,int NumRegs,unsigned* pData){int i;// set the CS lowADS1248AssertCS(0);// send the command byteADS1248SendByte(ADS1248_CMD_WREG |(StartAddress &0x0f));ADS1248SendByte((NumRegs-1)&0x0f);// send the data bytesfor(i=0; i < NumRegs; i++){ADS1248SendByte(*pData++);}// set the CS back highADS1248AssertCS(1);}voidADS1248WriteSequence(int StartAddress,int NumRegs,unsigned* pData){int i;char dummy;// set the CS lowADS1248AssertCS(0);#ifdefined(__MSP430F5529__)// send the command byte
dummy = UCB0RXBUF;while(!(UCB0IFG&UCTXIFG));// Make sure nothing is already in the TX buffer
UCB0TXBUF = ADS1248_CMD_WREG |(StartAddress &0x0f);while(!(UCB0IFG&UCRXIFG));
dummy = UCB0RXBUF;
UCB0TXBUF =(NumRegs-1)&0x0f;while(!(UCB0IFG&UCRXIFG));
dummy = UCB0RXBUF;// send the data bytesfor(i=0; i < NumRegs; i++){
UCB0TXBUF =*pData++;while(!(UCB0IFG&UCRXIFG));
dummy = UCB0RXBUF;}#elifdefined(PART_TM4C1294NCPDT)HWREG(SPI_BASE + SSI_O_DR)= ADS1248_CMD_WREG |(StartAddress &0x0f);// set up data for the next xmitwhile(!(HWREG(SPI_BASE + SSI_O_SR)& SSI_SR_RNE));// wait for data to appear
dummy =HWREG(SPI_BASE+SSI_O_DR);// grab that dataHWREG(SPI_BASE + SSI_O_DR)=(NumRegs-1)&0x0f;// set up data for the next xmitwhile(!(HWREG(SPI_BASE + SSI_O_SR)& SSI_SR_RNE));// wait for data to appear
dummy =HWREG(SPI_BASE+SSI_O_DR);// grab that data// send the data bytesfor(i=0; i < NumRegs; i++){HWREG(SPI_BASE + SSI_O_DR)=*pData++;while(!(HWREG(SPI_BASE + SSI_O_SR)& SSI_SR_RNE));// wait for data to appear
dummy =HWREG(SPI_BASE+SSI_O_DR);// grab that data}#endif// set the CS back highADS1248AssertCS(1);}voidADS1248SendRDATAC(void){// assert CS to start transferADS1248AssertCS(0);// send the command byteADS1248SendByte(ADS1248_CMD_RDATAC);// de-assert CSADS1248AssertCS(1);return;}voidADS1248SendSDATAC(void){// assert CS to start transferADS1248AssertCS(0);// send the command byteADS1248SendByte(ADS1248_CMD_SDATAC);// de-assert CSADS1248AssertCS(1);return;}voidADS1248SendSYSOCAL(void){// assert CS to start transferADS1248AssertCS(0);// send the command byteADS1248SendByte(ADS1248_CMD_SYSOCAL);// de-assert CSADS1248AssertCS(1);return;}voidADS1248SendSYSGCAL(void){// assert CS to start transferADS1248AssertCS(0);// send the command byteADS1248SendByte(ADS1248_CMD_SYSGCAL);// de-assert CSADS1248AssertCS(1);return;}voidADS1248SendSELFOCAL(void){// assert CS to start transferADS1248AssertCS(0);// send the command byteADS1248SendByte(ADS1248_CMD_SELFOCAL);// de-assert CSADS1248AssertCS(1);return;}/*
* Register Set Value Commands
*
* These commands need to strip out old settings (AND) and add (OR) the new contents to the register
*/intADS1248SetBurnOutSource(int BurnOut){unsigned Temp;int dError = ADS1248_NO_ERROR;ADS1248ReadRegister(ADS1248_0_MUX0,0x01,&Temp);
Temp &=0x3f;switch(BurnOut){case0:
Temp |= ADS1248_BCS_OFF;break;case1:
Temp |= ADS1248_BCS_500nA;break;case2:
Temp |= ADS1248_BCS_2uA;break;case3:
Temp |= ADS1248_BCS_10uA;break;default:
dError = ADS1248_ERROR;
Temp |= ADS1248_BCS_OFF;}// write the register value containing the new value back to the ADSADS1248WriteRegister(ADS1248_0_MUX0,0x01,&Temp);return dError;}intADS1248SetChannel(int vMux,int pMux){unsigned Temp;int dError = ADS1248_NO_ERROR;ADS1248ReadRegister(ADS1248_0_MUX0,0x01,&Temp);if(pMux==1){
Temp &=0xf8;switch(vMux){case0:
Temp |= ADS1248_AINN0;break;case1:
Temp |= ADS1248_AINN1;break;case2:
Temp |= ADS1248_AINN2;break;case3:
Temp |= ADS1248_AINN3;break;case4:
Temp |= ADS1248_AINN4;break;case5:
Temp |= ADS1248_AINN5;break;case6:
Temp |= ADS1248_AINN6;break;case7:
Temp |= ADS1248_AINN7;break;default:
Temp |= ADS1248_AINN0;
dError = ADS1248_ERROR;}}else{
Temp &=0xc7;switch(vMux){case0:
Temp |= ADS1248_AINP0;break;case1:
Temp |= ADS1248_AINP1;break;case2:
Temp |= ADS1248_AINP2;break;case3:
Temp |= ADS1248_AINP3;break;case4:
Temp |= ADS1248_AINP4;break;case5:
Temp |= ADS1248_AINP5;break;case6:
Temp |= ADS1248_AINP6;break;case7:
Temp |= ADS1248_AINP7;break;default:
Temp |= ADS1248_AINP0;
dError = ADS1248_ERROR;}}// write the register value containing the new value back to the ADSADS1248WriteRegister(ADS1248_0_MUX0,0x01,&Temp);return dError;}intADS1248SetBias(unsignedchar vBias){unsigned Temp;
Temp = ADS1248_VBIAS_OFF;if(vBias &0x80)
Temp |= ADS1248_VBIAS7;if(vBias &0x40)
Temp |= ADS1248_VBIAS6;if(vBias &0x20)
Temp |= ADS1248_VBIAS5;if(vBias &0x10)
Temp |= ADS1248_VBIAS4;if(vBias &0x08)
Temp |= ADS1248_VBIAS3;if(vBias &0x04)
Temp |= ADS1248_VBIAS2;if(vBias &0x02)
Temp |= ADS1248_VBIAS1;if(vBias &0x01)
Temp |= ADS1248_VBIAS0;// write the register value containing the new value back to the ADSADS1248WriteRegister(ADS1248_1_VBIAS,0x01,&Temp);return ADS1248_NO_ERROR;}// Relate to Mux1intADS1248SetIntRef(int sRef){unsigned Temp;int dError = ADS1248_NO_ERROR;ADS1248ReadRegister(ADS1248_2_MUX1,0x01,&Temp);
Temp &=0x1f;switch(sRef){case0:
Temp |= ADS1248_INT_VREF_OFF;break;case1:
Temp |= ADS1248_INT_VREF_ON;break;case2:case3:
Temp |= ADS1248_INT_VREF_CONV;break;default:
Temp |= ADS1248_INT_VREF_OFF;
dError = ADS1248_ERROR;}// write the register value containing the new value back to the ADSADS1248WriteRegister(ADS1248_2_MUX1,0x01,&Temp);return dError;}intADS1248SetVoltageReference(int VoltageRef){unsigned Temp;int dError = ADS1248_NO_ERROR;ADS1248ReadRegister(ADS1248_2_MUX1,0x01,&Temp);
Temp &=0xe7;switch(VoltageRef){case0:
Temp |= ADS1248_REF0;break;case1:
Temp |= ADS1248_REF1;break;case2:
Temp |= ADS1248_INT;break;case3:
Temp |= ADS1248_INT_REF0;break;default:
Temp |= ADS1248_REF0;
dError = ADS1248_ERROR;}// write the register value containing the new value back to the ADSADS1248WriteRegister(ADS1248_2_MUX1,0x01,&Temp);return dError;}intADS1248SetSystemMonitor(int Monitor){unsigned Temp;int dError = ADS1248_NO_ERROR;ADS1248ReadRegister(ADS1248_2_MUX1,0x01,&Temp);
Temp &=0x78;switch(Monitor){case0:
Temp |= ADS1248_MEAS_NORM;break;case1:
Temp |= ADS1248_MEAS_OFFSET;break;case2:
Temp |= ADS1248_MEAS_GAIN;break;case3:
Temp |= ADS1248_MEAS_TEMP;break;case4:
Temp |= ADS1248_MEAS_REF1;break;case5:
Temp |= ADS1248_MEAS_REF0;break;case6:
Temp |= ADS1248_MEAS_AVDD;break;case7:
Temp |= ADS1248_MEAS_DVDD;break;default:
Temp |= ADS1248_MEAS_NORM;
dError = ADS1248_ERROR;}// write the register value containing the new value back to the ADSADS1248WriteRegister(ADS1248_2_MUX1,0x01,&Temp);return dError;}// Relate to SYS0intADS1248SetGain(int Gain){unsigned Temp;int dError = ADS1248_NO_ERROR;ADS1248ReadRegister(ADS1248_3_SYS0,0x01,&Temp);
Temp &=0x0f;switch(Gain){case0:
Temp |= ADS1248_GAIN_1;break;case1:
Temp |= ADS1248_GAIN_2;break;case2:
Temp |= ADS1248_GAIN_4;break;case3:
Temp |= ADS1248_GAIN_8;break;case4:
Temp |= ADS1248_GAIN_16;break;case5:
Temp |= ADS1248_GAIN_32;break;case6:
Temp |= ADS1248_GAIN_64;break;case7:
Temp |= ADS1248_GAIN_128;break;default:
Temp |= ADS1248_GAIN_1;
dError = ADS1248_ERROR;}// write the register value containing the new value back to the ADSADS1248WriteRegister(ADS1248_3_SYS0,0x01,&Temp);return dError;}intADS1248SetDataRate(int DataRate){unsigned Temp;int dError = ADS1248_NO_ERROR;ADS1248ReadRegister(ADS1248_3_SYS0,0x01,&Temp);
Temp &=0x70;switch(DataRate){case0:
Temp |= ADS1248_DR_5;break;case1:
Temp |= ADS1248_DR_10;break;case2:
Temp |= ADS1248_DR_20;break;case3:
Temp |= ADS1248_DR_40;break;case4:
Temp |= ADS1248_DR_80;break;case5:
Temp |= ADS1248_DR_160;break;case6:
Temp |= ADS1248_DR_320;break;case7:
Temp |= ADS1248_DR_640;break;case8:
Temp |= ADS1248_DR_1000;break;case9:case10:case11:case12:case13:case14:case15:
Temp |= ADS1248_DR_2000;break;default:
Temp |= ADS1248_DR_5;
dError = ADS1248_ERROR;}// write the register value containing the new value back to the ADSADS1248WriteRegister(ADS1248_3_SYS0,0x01,&Temp);return dError;}// Relate to OFC (3 registers)intADS1248SetOFC(long RegOffset){// find the pointer to the variable so we can write the value as bytesunsigned*cptr=(unsigned*)(&RegOffset);int i;for(i=0; i<3; i++){// write the register value containing the new value back to the ADSADS1248WriteRegister((ADS1248_4_OFC0 + i),0x01,&cptr[i]);}return ADS1248_NO_ERROR;}// Relate to FSC (3 registers)intADS1248SetFSC(long RegGain){// find the pointer to the variable so we can write the value as bytesunsigned*cptr=(unsigned*)(&RegGain);int i;for(i=0; i<3; i++){// write the register value containing the new value back to the ADSADS1248WriteRegister((ADS1248_7_FSC0 + i),0x01,&cptr[i]);}return ADS1248_NO_ERROR;}// Relate to IDAC0intADS1248SetDRDYMode(int DRDYMode){unsigned Temp;int dError = ADS1248_NO_ERROR;ADS1248ReadRegister(ADS1248_10_IDAC0,0x01,&Temp);
Temp &=0xf7;switch(DRDYMode){case0:
Temp |= ADS1248_DRDY_OFF;break;case1:
Temp |= ADS1248_DRDY_ON;break;default:
Temp |= ADS1248_DRDY_OFF;
dError = ADS1248_ERROR;}// write the register value containing the new value back to the ADSADS1248WriteRegister(ADS1248_10_IDAC0,0x01,&Temp);return dError;}intADS1248SetCurrentDACOutput(int CurrentOutput){unsigned Temp;int dError = ADS1248_NO_ERROR;ADS1248ReadRegister(ADS1248_10_IDAC0,0x01,&Temp);
Temp &=0xf8;switch(CurrentOutput){case0:
Temp |= ADS1248_IDAC_OFF;break;case1:
Temp |= ADS1248_IDAC_50;break;case2:
Temp |= ADS1248_IDAC_100;break;case3:
Temp |= ADS1248_IDAC_250;break;case4:
Temp |= ADS1248_IDAC_500;break;case5:
Temp |= ADS1248_IDAC_750;break;case6:
Temp |= ADS1248_IDAC_1000;break;case7:
Temp |= ADS1248_IDAC_1500;break;default:
Temp |= ADS1248_IDAC_OFF;
dError = ADS1248_ERROR;}// write the register value containing the new value back to the ADSADS1248WriteRegister(ADS1248_10_IDAC0,0x01,&Temp);return dError;}// Relate to IDAC1intADS1248SetIDACRouting(int IDACroute,int IDACdir)// IDACdir (0 = I1DIR, 1 = I2DIR){unsigned Temp;int dError = ADS1248_NO_ERROR;ADS1248ReadRegister(ADS1248_11_IDAC1,0x01,&Temp);if(IDACdir>0){
Temp &=0xf0;switch(IDACroute){case0:
Temp |= ADS1248_IDAC2_A0;break;case1:
Temp |= ADS1248_IDAC2_A1;break;case2:
Temp |= ADS1248_IDAC2_A2;break;case3:
Temp |= ADS1248_IDAC2_A3;break;case4:
Temp |= ADS1248_IDAC2_A4;break;case5:
Temp |= ADS1248_IDAC2_A5;break;case6:
Temp |= ADS1248_IDAC2_A6;break;case7:
Temp |= ADS1248_IDAC2_A7;break;case8:
Temp |= ADS1248_IDAC2_EXT1;break;case9:
Temp |= ADS1248_IDAC2_EXT2;break;case10:
Temp |= ADS1248_IDAC2_EXT1;break;case11:
Temp |= ADS1248_IDAC2_EXT2;break;case12:case13:case14:case15:
Temp |= ADS1248_IDAC2_OFF;break;default:
Temp |= ADS1248_IDAC2_OFF;
dError = ADS1248_ERROR;}}else{
Temp &=0x0f;switch(IDACroute){case0:
Temp |= ADS1248_IDAC1_A0;break;case1:
Temp |= ADS1248_IDAC1_A1;break;case2:
Temp |= ADS1248_IDAC1_A2;break;case3:
Temp |= ADS1248_IDAC1_A3;break;case4:
Temp |= ADS1248_IDAC1_A4;break;case5:
Temp |= ADS1248_IDAC1_A5;break;case6:
Temp |= ADS1248_IDAC1_A6;break;case7:
Temp |= ADS1248_IDAC1_A7;break;case8:
Temp |= ADS1248_IDAC1_EXT1;break;case9:
Temp |= ADS1248_IDAC1_EXT2;break;case10:
Temp |= ADS1248_IDAC1_EXT1;break;case11:
Temp |= ADS1248_IDAC1_EXT2;break;case12:case13:case14:case15:
Temp |= ADS1248_IDAC1_OFF;break;default:
Temp |= ADS1248_IDAC1_OFF;
dError = ADS1248_ERROR;}}// write the register value containing the new value back to the ADSADS1248WriteRegister(ADS1248_11_IDAC1,0x01,&Temp);return dError;}// Relate to GPIOCFGintADS1248SetGPIOConfig(unsignedchar cdata){unsigned Temp;
Temp =0x00;if(cdata &0x80)
Temp |= ADS1248_GPIO_7;if(cdata &0x40)
Temp |= ADS1248_GPIO_6;if(cdata &0x20)
Temp |= ADS1248_GPIO_5;if(cdata &0x10)
Temp |= ADS1248_GPIO_4;if(cdata &0x08)
Temp |= ADS1248_GPIO_3;if(cdata &0x04)
Temp |= ADS1248_GPIO_2;if(cdata &0x02)
Temp |= ADS1248_GPIO_1;if(cdata &0x01)
Temp |= ADS1248_GPIO_0;// write the register value containing the new value back to the ADSADS1248WriteRegister(ADS1248_12_GPIOCFG,0x01,&Temp);return ADS1248_NO_ERROR;}// Relate to GPIODIRintADS1248SetGPIODir(unsignedchar cdata){unsigned Temp;
Temp =0x00;if(cdata &0x80)
Temp |= ADS1248_IO_7;if(cdata &0x40)
Temp |= ADS1248_IO_6;if(cdata &0x20)
Temp |= ADS1248_IO_5;if(cdata &0x10)
Temp |= ADS1248_IO_4;if(cdata &0x08)
Temp |= ADS1248_IO_3;if(cdata &0x04)
Temp |= ADS1248_IO_2;if(cdata &0x02)
Temp |= ADS1248_IO_1;if(cdata &0x01)
Temp |= ADS1248_IO_0;// write the register value containing the new value back to the ADSADS1248WriteRegister(ADS1248_13_GPIODIR,0x01,&Temp);return ADS1248_NO_ERROR;}// Relate to GPIODATintADS1248SetGPIO(unsignedchar cdata){unsigned Temp;
Temp =0x00;if(cdata &0x80)
Temp |= ADS1248_OUT_7;if(cdata &0x40)
Temp |= ADS1248_OUT_6;if(cdata &0x20)
Temp |= ADS1248_OUT_5;if(cdata &0x10)
Temp |= ADS1248_OUT_4;if(cdata &0x08)
Temp |= ADS1248_OUT_3;if(cdata &0x04)
Temp |= ADS1248_OUT_2;if(cdata &0x02)
Temp |= ADS1248_OUT_1;if(cdata &0x01)
Temp |= ADS1248_OUT_0;// write the register value containing the new value back to the ADSADS1248WriteRegister(ADS1248_14_GPIODAT,0x01,&Temp);return ADS1248_NO_ERROR;}/* Register Get Value Commands */// Relate to MUX0intADS1248GetBurnOutSource(void){unsigned Temp;ADS1248ReadRegister(ADS1248_0_MUX0,0x01,&Temp);return((Temp >>6)&0x03);}intADS1248GetChannel(int cMux)// cMux = 0, AINP; cMux = 1, AINN{unsigned Temp;ADS1248ReadRegister(ADS1248_0_MUX0,0x01,&Temp);if(cMux==0)return((Temp >>3)&0x07);elsereturn(Temp &0x07);}// Relate to VBIASunsignedcharADS1248GetBias(void){unsigned Temp;ADS1248ReadRegister(ADS1248_1_VBIAS,0x01,&Temp);return(Temp &0xff);}//Relate to MUX1intADS1248GetCLKSTAT(void){unsigned Temp;ADS1248ReadRegister(ADS1248_2_MUX1,0x01,&Temp);return((Temp >>7)&0x01);}intADS1248GetIntRef(void){unsigned Temp;ADS1248ReadRegister(ADS1248_2_MUX1,0x01,&Temp);return((Temp >>5)&0x03);}intADS1248GetVoltageReference(void){unsigned Temp;ADS1248ReadRegister(ADS1248_2_MUX1,0x01,&Temp);return((Temp >>3)&0x03);}intADS1248GetSystemMonitor(void){unsigned Temp;ADS1248ReadRegister(ADS1248_2_MUX1,0x01,&Temp);return(Temp &0x07);}// Relate to SYS0intADS1248GetGain(void){unsigned Temp;ADS1248ReadRegister(ADS1248_3_SYS0,0x01,&Temp);return((Temp >>4)&0x07);}intADS1248GetDataRate(void){unsigned Temp;ADS1248ReadRegister(ADS1248_3_SYS0,0x01,&Temp);return(Temp &0x0f);}// Relate to OFC (3 registers)longADS1248GetOFC(void){long rData=0;unsigned rValue=0;unsigned regArray[3];int i;//write the desired default register settings for the first 4 registers NOTE: values shown are the POR values as per datasheet
regArray[0]=0x00;
regArray[1]=0x00;
regArray[2]=0x00;for(i=0; i<3; i++){// read the register value for the OFCADS1248ReadRegister((ADS1248_4_OFC0 + i),0x01,&rValue);
regArray[i]= rValue;}
rData = regArray[2];
rData =(rData<<8)| regArray[1];
rData =(rData<<8)| regArray[0];return rData;}// Relate to FSC (3 registers)longADS1248GetFSC(void){long rData=0;unsigned rValue=0;unsigned regArray[3];int i;//write the desired default register settings for the first 4 registers NOTE: values shown are the POR values as per datasheet
regArray[0]=0x00;
regArray[1]=0x00;
regArray[2]=0x00;for(i=0; i<3; i++){// read the register value for the OFCADS1248ReadRegister((ADS1248_7_FSC0 + i),0x01,&rValue);
regArray[i]= rValue;}
rData = regArray[2];
rData =(rData<<8)| regArray[1];
rData =(rData<<8)| regArray[0];return rData;}// Relate to IDAC0intADS1248GetID(void){unsigned Temp;ADS1248ReadRegister(ADS1248_10_IDAC0,0x01,&Temp);return((Temp>>4)&0x0f);}intADS1248GetDRDYMode(void){unsigned Temp;ADS1248ReadRegister(ADS1248_10_IDAC0,0x01,&Temp);return((Temp>>3)&0x01);}intADS1248GetCurrentDACOutput(void){unsigned Temp;ADS1248ReadRegister(ADS1248_10_IDAC0,0x01,&Temp);return(Temp &0x07);}// Relate to IDAC1intADS1248GetIDACRouting(int WhichOne)// IDACRoute (0 = I1DIR, 1 = I2DIR){unsigned Temp;ADS1248ReadRegister(ADS1248_11_IDAC1,0x01,&Temp);if(WhichOne==0)return((Temp>>4)&0x0f);elsereturn(Temp &0x0f);}// Relate to GPIOCFGunsignedcharADS1248GetGPIOConfig(void){unsigned Temp;ADS1248ReadRegister(ADS1248_12_GPIOCFG,0x01,&Temp);return(Temp &0xff);}// Relate to GPIODIRunsignedcharADS1248GetGPIODir(void){unsigned Temp;ADS1248ReadRegister(ADS1248_13_GPIODIR,0x01,&Temp);return(Temp &0xff);}// Relate to GPIODATunsignedcharADS1248GetGPIO(void){unsigned Temp;ADS1248ReadRegister(ADS1248_14_GPIODAT,0x01,&Temp);return(Temp &0xff);}/* Miscellaneous Commands */longADS1248RDATACRead(void)// reads data directly based on RDATAC mode (writes NOP) and 32 SCLKs{long Data;// assert CS to start transferADS1248AssertCS(0);// get the conversion result#ifdefADS1148
Data =ADS1248ReceiveByte();
Data =(Data <<8)|ADS1248ReceiveByte();// sign extend data if the MSB is high (16 to 32 bit sign extension)if(Data &0x8000)
Data |=0xffff0000;#else
Data =ADS1248ReceiveByte();
Data =(Data <<8)|ADS1248ReceiveByte();
Data =(Data <<8)|ADS1248ReceiveByte();// sign extend data if the MSB is high (24 to 32 bit sign extension)if(Data &0x800000)
Data |=0xff000000;#endif// de-assert CSADS1248AssertCS(1);return Data;}/* Hardware Control Functions for Device Pin Control */// Possible Need for Reset, Start (power down) (0-low, 1-high, 2-pulse)intADS1248SetStart(int nStart){/*
* Code can be added here to set high or low the state of the pin for controlling the START pin
* which will differ depending on controller used and port pin assigned
*/#ifdefined(__MSP430F5529__)// This example is using PORT6 for GPIO Start control, ADS1248_START is defined in ads1248.hif(nStart)// nStart=0 is START low, nStart=1 is START high
P6OUT |=(ADS1248_START);else
P6OUT &=~(ADS1248_START);#elifdefined(PART_TM4C1294NCPDT)if(nStart)// nStart=0 is START low, nStart=1 is START highGPIOPinWrite(START_PORT, ADS1248_START,0xFF);elseGPIOPinWrite(START_PORT, ADS1248_START,0);#endifreturn ADS1248_NO_ERROR;}intADS1248SetReset(int nReset){/*
* Code can be added here to set high or low the state of the pin for controlling the RESET pin
* which will differ depending on controller used and port pin assigned
*/#ifdefined(__MSP430F5529__)// This example is using PORT6 for GPIO Reset Control, ADS1248_RESET is defined in ads1248.hif(nReset)// nReset=0 is RESET low, nReset=1 is RESET high
P6OUT |=(ADS1248_RESET);else
P6OUT &=~(ADS1248_RESET);#elifdefined(PART_TM4C1294NCPDT)if(nReset)// nReset=0 is RESET low, nReset=1 is RESET highGPIOPinWrite(RESET_PORT, ADS1248_RESET,0xFF);elseGPIOPinWrite(RESET_PORT, ADS1248_RESET,0);#endifreturn ADS1248_NO_ERROR;}
在这里插入代/* * ads1248.h * * Function prototypes and device definitions for the ADS1248 * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * Redis