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数字时钟
数字时钟,满足时,分,秒计数LIBRARY IEEE;USE IEEE.STD_LOGIC_1164.ALL;USE IEEE.STD_LOGIC_UNSIGNED.ALL;ENTITY shuzideng ISPORT(clk:IN STD_LOGIC; a:OUT std_logic_vector(7 downto 0); b:out std_logic_vector(5 downto 0); nreset1:in std_LOGIC; nreset2:原创 2020-11-25 17:13:30 · 610 阅读 · 0 评论 -
VHDL语言实现8位LED流水灯
VHDL语言实现8位LED流水灯,包含对50MHz时钟信号分频产生1Hz信号library ieee;use ieee.std_logic_1164.all;use ieee.std_logic_unsigned.all;entity led8 isgeneric(n:integer :=50000000);port (clk:in std_logic;reset:in std_logic;led8s:out std_logic_vector(7 downto 0));end led8;原创 2020-11-12 15:32:34 · 7466 阅读 · 2 评论