ESD Association Advisory ESD ADV1.0-2017-DEFINITIONS-D

data sheet parameters

The static and dynamic component performance data supplied by the component manufacturer or supplier.

DC resistance

The ratio of the DC voltage applied to a conductor to the DC current through it.

decay rate

The decrease of charge or voltage per unit time.

decay time

The time required for an electrostatic potential to be reduced to a given percentage (usually 10%) of its initial value. (See static decay test.)

delay line

A transmission line used to introduce signal delay between two components of a system.

DeNMOS

Drain extended NMOS used as specific high voltage device in advanced CMOS technologies (compare to LDMOS).

design rule check (DRC)

A process in which the circuit (in schematic or layout views) is compared for compliance to one or more sets of pre-defined rules meant to ensure circuit manufacturability.

destructive damage

Damage where the operating electrical characteristics or parameters are altered and do not recover to the initial conditions prior to stress.

device

Product being processed by AHE (e.g., an integrated circuit [IC] or a printed circuit [PC] board).

device path

The route traveled by a device in an AHE.

device under test (DUT)

The device to which the Transient Stimulus will be applied.