一、Concepts
二、Memory Allocation&Release
三、Virtual Address Management
四、Design Issues
五、概念题
Address binding of instructions and data to memory addresses can happen at three different stages, Compile time, Load time and execution time
- MBR
Sector 0 of the disk is called the MBR(Master Boot Record) 主引导记录
简答题
- TLB
What is TLB? What role does it play in memory management?
TLB即Translation Lookaside Buffer(转换检测缓冲区),是一个小型的硬件设备将虚拟地址直接映射到物理地址,不必再访问列表。它通常存在在MMU中,包含少量的表项,每个表项记录了一个页面的相关信息,包括虚拟页号、页面的修改位、保护码(读/写/执行权限)和该页所对应的物理页框。
它是一个内存管理单元用于改进虚拟地址到物理地址转换速度的缓存。