#include "usart_printf.h"
#include "stdio.h"
#include "string.h"
#include "stdarg.h"
#define USART0_DATA_ADDRESS ((uint32_t)&USART_DATA(USART0))
#define USART1_DATA_ADDRESS ((uint32_t)&USART_DATA(USART1))
#define USART2_DATA_ADDRESS ((uint32_t)&USART_DATA(USART2))
#define ARRAYNUM(arr_name) (uint32_t)(sizeof(arr_name)/sizeof(*(arr_name)))
#define MAX_SIZE 1024
#define FRAG_SIZE 256
//#define _DEBUG 0
uint8_t _DEBUG = 1;
uint8_t dbgLevel = 5;
uint8_t g_auRecv_Buf[64] = {0};
uint8_t g_auTrasBuf[MAX_SIZE] = {0};
uint8_t g_auTrasFrag[FRAG_SIZE] = {0};
typedef struct
{
uint8_t *pbuf;
uint8_t *pfrag;
uint16_t uspIn;
uint16_t uspOut;
uint16_t usTotalLen;
}stMemPool_t;
stMemPool_t g_stmemPool ={
.pbuf = (uint8_t *)(&g_auTrasBuf),
.pfrag = (uint8_t *)(&g_auTrasFrag),
};
/* retarget the C library printf function to the USART */
int fputc(int ch, FILE *f)
{
if(_DEBUG == 1)
{
usart_data_transmit(debugCOM, (uint8_t)ch);
while(RESET == usart_flag_get(debugCOM, USART_FLAG_TBE));
return ch;
}
return 0;
}
void DebugEnable(uint8_t mode)
{
_DEBUG = mode;
}
void USART1_IRQHandler(void)
{
if(RESET != usart_interrupt_flag_get(USART1, USART_INT_FLAG_IDLE))
{
usart_data_receive(USART1);
dma_channel_disable(DMA0, DMA_CH5);
uint16_t recv_len = sizeof(g_auRecv_Buf) - dma_transfer_number_get(DMA0, DMA_CH5);
if(recv_len != 0 && recv_len < sizeof(g_auRecv_Buf))
{
//memcpy(g_serial_recv_buf,data_buffer,g_recv_positin); // copy data
// reset dma trans
dma_memory_address_config(DMA0, DMA_CH5,(uint32_t)g_auRecv_Buf);
dma_transfer_number_config(DMA0, DMA_CH5,sizeof(g_auRecv_Buf));
dma_flag_clear(DMA0, DMA_CH5, DMA_FLAG_FTF);
dma_channel_enable(DMA0, DMA_CH5); // enable dma
g_auRecv_Buf[3] = 0;
if(strcmp((const char*)g_auRecv_Buf,"+++") == 0)
{
_DEBUG = 1;
printf("%s","+++");
}
else if(strcmp((const char*)g_auRecv_Buf,"---") == 0)
{
_DEBUG = 0;
printf("%s","---");
}
if(recv_len == 5)
{
dbgLevel = g_auRecv_Buf[4] - '0';
}
}
else
{
memset(g_auRecv_Buf,0,sizeof(g_auRecv_Buf));
}
}
}
void _Debug_Init(void)
{
/* enable GPIO clock */
rcu_periph_clock_enable(debugCOM_GPIO_CLK);
/* enable USART clock */
rcu_periph_clock_enable(debugCOM_CLK);
/* connect port to USARTx_Tx */
gpio_init(debugCOM_GPIO_PORT, GPIO_MODE_AF_PP, GPIO_OSPEED_50MHZ, debugCOM_TX_PIN);
/* connect port to USARTx_Rx */
gpio_init(debugCOM_GPIO_PORT, GPIO_MODE_IN_FLOATING, GPIO_OSPEED_50MHZ, debugCOM_RX_PIN);
/* USART configure */
usart_deinit(debugCOM);
usart_baudrate_set(debugCOM, 921600);
usart_receive_config(debugCOM, USART_RECEIVE_ENABLE);
usart_transmit_config(debugCOM, USART_TRANSMIT_ENABLE);
nvic_irq_enable(USART1_IRQn,5,0);
usart_interrupt_enable(debugCOM, USART_INT_IDLE);
usart_enable(debugCOM);
#ifdef _debugRxDMA
dma_parameter_struct dma_init_struct;
/* enable DMA0 clock */
rcu_periph_clock_enable(RCU_DMA0);
/* deinitialize DMA channel2 (USART2 rx) */
dma_deinit(DMA0, DMA_CH5);
dma_struct_para_init(&dma_init_struct);
dma_init_struct.direction = DMA_PERIPHERAL_TO_MEMORY;
dma_init_struct.memory_addr = (uint32_t)g_auRecv_Buf;
dma_init_struct.memory_inc = DMA_MEMORY_INCREASE_ENABLE;
dma_init_struct.memory_width = DMA_MEMORY_WIDTH_8BIT;
dma_init_struct.number = ARRAYNUM(g_auRecv_Buf);
dma_init_struct.periph_addr = USART1_DATA_ADDRESS;
dma_init_struct.periph_inc = DMA_PERIPH_INCREASE_DISABLE;
dma_init_struct.memory_width = DMA_PERIPHERAL_WIDTH_8BIT;
dma_init_struct.priority = DMA_PRIORITY_ULTRA_HIGH;
dma_init(DMA0, DMA_CH5, &dma_init_struct);
/* USART DMA0 enable for reception */
usart_dma_receive_config(USART1, USART_DENR_ENABLE);
/* enable DMA0 channel2 transfer complete interrupt */
//dma_interrupt_enable(DMA0, DMA_CH2, DMA_INT_FTF);
dma_circulation_enable(DMA0,DMA_CH5);
/* enable DMA0 channel2 */
dma_channel_enable(DMA0, DMA_CH5);
#endif
#ifdef _debugTxDMA
//dma_parameter_struct dma_init_struct;
/* enable DMA0 clock */
rcu_periph_clock_enable(RCU_DMA0);
/* deinitialize DMA channel2 (USART2 rx) */
dma_deinit(DMA0, DMA_CH6);
dma_struct_para_init(&dma_init_struct);
dma_init_struct.direction = DMA_MEMORY_TO_PERIPHERAL;
dma_init_struct.memory_addr = (uint32_t)g_auTrasFrag;
dma_init_struct.memory_inc = DMA_MEMORY_INCREASE_ENABLE;
dma_init_struct.memory_width = DMA_MEMORY_WIDTH_8BIT;
dma_init_struct.number = ARRAYNUM(g_auTrasFrag);
dma_init_struct.periph_addr = USART1_DATA_ADDRESS;
dma_init_struct.periph_inc = DMA_PERIPH_INCREASE_DISABLE;
dma_init_struct.memory_width = DMA_PERIPHERAL_WIDTH_8BIT;
dma_init_struct.priority = DMA_PRIORITY_ULTRA_HIGH;
dma_init(DMA0, DMA_CH6, &dma_init_struct);
/* USART DMA0 enable for reception */
usart_dma_transmit_config(USART1, USART_DENT_ENABLE);
/* enable DMA0 channel2 transfer complete interrupt */
//dma_interrupt_enable(DMA0, DMA_CH2, DMA_INT_FTF);
//dma_circulation_enable(DMA0,DMA_CH6);
/* enable DMA0 channel2 */
//dma_channel_enable(DMA0, DMA_CH6);
#endif
}
void push(void *data, void *memPoll ,uint16_t length)
{
stMemPool_t *pCache = (stMemPool_t*)memPoll;
uint8_t *pbuf = (uint8_t *)(data);
if(pCache->usTotalLen + length > MAX_SIZE)
{
printf("printf buff full\r\n");
return;
}
pCache->usTotalLen += length;
for(uint16_t i= 0;i < length; i++)
{
pCache->uspIn = pCache->uspIn % MAX_SIZE;
pCache->pbuf[pCache->uspIn++] = pbuf[i];
}
}
void pop(void *memPoll ,uint16_t *length)
{
stMemPool_t *pCache = (stMemPool_t*)memPoll;
if(pCache->usTotalLen > FRAG_SIZE)
{
*length = FRAG_SIZE;
}
else
{
*length = pCache->usTotalLen;
}
pCache->usTotalLen -= *length;
for(uint16_t i = 0; i < *length; i++)
{
pCache->uspOut = pCache->uspOut % MAX_SIZE;
pCache->pfrag[i] = pCache->pbuf[pCache->uspOut++];
}
}
uint16_t get_payload_length(void)
{
return g_stmemPool.usTotalLen;
}
void uprintf(uint8_t dbg_level,char* fmt,...)
{
if(_DEBUG == 0 || dbg_level != dbgLevel)
{
return;
}
uint8_t tempBuf[FRAG_SIZE] = {0};
va_list ap;
va_start(ap,fmt);
vsprintf((char*)tempBuf,fmt,ap);
va_end(ap);
push(tempBuf,&g_stmemPool,strlen((const char*)(tempBuf)));
}
void uDMAprintf(void)
{
uint16_t usLength = 0;
if(get_payload_length() == 0)
{
return;
}
if(RESET == usart_flag_get(debugCOM, USART_FLAG_TBE))
{
return;
}
pop(&g_stmemPool,&usLength);
//dma_interrupt_flag_get(DMA0,DMA0_Channel6_IRQn,);
dma_channel_disable(DMA0, DMA_CH6);
/* 关闭DMA传输才可以进行设置 */
//dma_periph_address_config(DMA0, DMA_CH6, USART1_DATA_ADDRESS);
//dma_memory_address_config(DMA0, DMA_CH6,(uint32_t)g_auTrasFrag);
dma_transfer_number_config(DMA0, DMA_CH6,usLength);
dma_flag_clear(DMA0, DMA_CH6, DMA_FLAG_FTF);
dma_channel_enable(DMA0, DMA_CH6); // enable dma
}
gd32自定义的printf dma发送
最新推荐文章于 2024-07-21 18:39:11 发布