u010448932的博客

美盛科技POE模块AHPD-12 数据手册 PoE+_PD_Module_AHPD_Datasheet_V1.0_en_AHPD-12

文档包括英文原版与中文翻译，中文翻译为机器翻译，质量很差，可以对照原文进行参考，本文是使用xilinx7 系列 GTX 收发器 进行12G SDI收发

The TB-FMCH-DP3 provides test environment for DisplayPort Standard Version1, Revision 2a. It supports below features 4 Lane of 1.62Gbps, 2.7Gbps and 5.4Gbps It uses TI SN75SP130 for Source(TX) and SN65DP159 for Sink(RX) AUX Communication.(FAUX is not supported)

The TB-FMCH-12GSDI FMC has a dedicated SDI input, a dedicated SDI output, and three SDI channels that are either input or output. Each SDI channel supports a data rate up to 11.88 Gbps. It also has a video sync input for a video sync separator chip. All video signal connections are via 75 ohm HDBNC jacks. A video clock generator can also produce common video timing signals from oscillators or from HVF sync signals from the host FPGA.

本文档包括2015年发布的：《DP1.4标准（VESA Proposed DisplayPort (DP) Standard》866页，《DisplayPort和eDP物理层兼容性测试》，DisplayPort1.1-1.2-1.3-区别简介

BC1.2英文协议标准，BQ1.2端口类型为SDP、DCP和CDP，充电协议！

计算PCB电流、温升设定的情况下需要的线宽，比excel表格那种方便实用

关于HDCP技术的介绍，以及EDID协议解释，其中为英文与繁体中文

Lattice ECP3 芯片配置DDR3 Demo f

This document describes the requirements for self-testing of connector products that incorporate the DisplayPort™ interface to bear the “DP Certified” Logo.