Chinese translated version of Documentation/arm/swp_emulation
If you have any comment or update to the content, please contact the
original document maintainer directly. However, if you have a problem
communicating in English you can also ask the Chinese maintainer for
help. Contact the Chinese maintainer if this translation is outdated
or if there is a problem with the translation.
Chinese maintainer: 尹娇萍 1072986620@qq.com
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Documentation/arm/swp_emulation 的中文翻译
如果想评论或更新本文的内容,请直接联系原文档的维护者。如果你使用英文
交流有困难的话,也可以向中文版维护者求助。如果本翻译更新不及时或者翻
译存在问题,请联系中文版维护者。
中文版维护者: 尹娇萍 1072986620@qq.com
中文版翻译者: 尹娇萍 1072986620@qq.com
中文版校译者: 尹娇萍 1072986620@qq.com
以下为正文
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Software emulation of deprecated SWP instruction (CONFIG_SWP_EMULATE)
---------------------------------------------------------------------
弃用的软件仿真SWP指令(CONFIG_SWP_EMULATE)
---------------------------------------------------------------------
ARMv6 architecture deprecates use of the SWP/SWPB instructions, and recommeds
moving to the load-locked/store-conditional instructions LDREX and STREX.
ARMv6架构不赞成使用SWP / SWPB指令,建议使用负载锁定/条件存储指令STREX和LDREX。
ARMv7 multiprocessing extensions introduce the ability to disable these
instructions, triggering an undefined instruction exception when executed.
Trapped instructions are emulated using an LDREX/STREX or LDREXB/STREXB
sequence. If a memory access fault (an abort) occurs, a segmentation fault is
signalled to the triggering process.
ARMv7的多重扩展引入了能够禁用这些指令,当执行时触发一个未定义的指令的异常。
残留的指令使用LDREX/ STREX或LDREXB/ STREXB的的仿真序列。如果存储器访问故障
(中止)发生时,分段故障信号会触发进程。
/proc/cpu/swp_emulation holds some statistics/information, including the PID of
the last process to trigger the emulation to be invocated. For example:
---
Emulated SWP: 12
Emulated SWPB: 0
Aborted SWP{B}: 1
Last process: 314
---
/proc/CPU/swp_emulation持有一些统计数字/表格信息,包括最后一道工序触发仿真所需要的PID。例如:
---
Emulated SWP: 12
Emulated SWPB: 0
Aborted SWP{B}: 1
Last process: 314
---
NOTE: when accessing uncached shared regions, LDREX/STREX rely on an external
transaction monitoring block called a global monitor to maintain update
atomicity. If your system does not implement a global monitor, this option can
cause programs that perform SWP operations to uncached memory to deadlock, as
the STREX operation will always fail.
注意:当访问未缓存的共享区域,LDREX/ STREX依赖于外部事务监控块称为保持原子性更新的全球显示器。
如果您的系统没有实现一个全球性的显示器,这个选项可以导致程序执行SWP业务的未缓存的内存死锁,
STREX操作总是失败。
If you have any comment or update to the content, please contact the
original document maintainer directly. However, if you have a problem
communicating in English you can also ask the Chinese maintainer for
help. Contact the Chinese maintainer if this translation is outdated
or if there is a problem with the translation.
Chinese maintainer: 尹娇萍 1072986620@qq.com
---------------------------------------------------------------------
Documentation/arm/swp_emulation 的中文翻译
如果想评论或更新本文的内容,请直接联系原文档的维护者。如果你使用英文
交流有困难的话,也可以向中文版维护者求助。如果本翻译更新不及时或者翻
译存在问题,请联系中文版维护者。
中文版维护者: 尹娇萍 1072986620@qq.com
中文版翻译者: 尹娇萍 1072986620@qq.com
中文版校译者: 尹娇萍 1072986620@qq.com
以下为正文
---------------------------------------------------------------------
Software emulation of deprecated SWP instruction (CONFIG_SWP_EMULATE)
---------------------------------------------------------------------
弃用的软件仿真SWP指令(CONFIG_SWP_EMULATE)
---------------------------------------------------------------------
ARMv6 architecture deprecates use of the SWP/SWPB instructions, and recommeds
moving to the load-locked/store-conditional instructions LDREX and STREX.
ARMv6架构不赞成使用SWP / SWPB指令,建议使用负载锁定/条件存储指令STREX和LDREX。
ARMv7 multiprocessing extensions introduce the ability to disable these
instructions, triggering an undefined instruction exception when executed.
Trapped instructions are emulated using an LDREX/STREX or LDREXB/STREXB
sequence. If a memory access fault (an abort) occurs, a segmentation fault is
signalled to the triggering process.
ARMv7的多重扩展引入了能够禁用这些指令,当执行时触发一个未定义的指令的异常。
残留的指令使用LDREX/ STREX或LDREXB/ STREXB的的仿真序列。如果存储器访问故障
(中止)发生时,分段故障信号会触发进程。
/proc/cpu/swp_emulation holds some statistics/information, including the PID of
the last process to trigger the emulation to be invocated. For example:
---
Emulated SWP: 12
Emulated SWPB: 0
Aborted SWP{B}: 1
Last process: 314
---
/proc/CPU/swp_emulation持有一些统计数字/表格信息,包括最后一道工序触发仿真所需要的PID。例如:
---
Emulated SWP: 12
Emulated SWPB: 0
Aborted SWP{B}: 1
Last process: 314
---
NOTE: when accessing uncached shared regions, LDREX/STREX rely on an external
transaction monitoring block called a global monitor to maintain update
atomicity. If your system does not implement a global monitor, this option can
cause programs that perform SWP operations to uncached memory to deadlock, as
the STREX operation will always fail.
注意:当访问未缓存的共享区域,LDREX/ STREX依赖于外部事务监控块称为保持原子性更新的全球显示器。
如果您的系统没有实现一个全球性的显示器,这个选项可以导致程序执行SWP业务的未缓存的内存死锁,
STREX操作总是失败。