s3c2440硬件篇之三：MMU【转】

MMU：内存管理单元。功能：
（1）虚拟地址---->物理地址的映射，使得各个进程拥有看起来一样的地址空间。
（2）检查内存访问权限（硬件自己实现）。保护各个进程所用的内存不被其它进程破坏。
 
在32位的CPU中，虚拟内存地址为0~0xFFFF_FFFF.
Cache:介于主存和CPU之间的高速缓冲存储器。
 
代码详解：（参考韦东山大哥代码）
（1）head.S
 
@*************************************************************************
@ File：head.S
@ 功能：设置SDRAM，将第二部分代码复制到SDRAM，设置页表，启动MMU，
@ 然后跳到SDRAM继续执行
@*************************************************************************

.text
.global _start
_start:
    ldr sp, =4096 @ 设置栈指针，以下都是C函数，调用前需要设好栈
    bl disable_watch_dog @ 关闭WATCHDOG，否则CPU会不断重启
    bl memsetup @ 设置存储控制器以使用SDRAM
    bl copy_2th_to_sdram @ 将第二部分代码复制到SDRAM
    bl create_page_table @ 设置页表
    bl mmu_init @ 启动MMU
    ldr sp, =0xB4000000 @ 重设栈指针，指向SDRAM顶端(使用虚拟地址)
    ldr pc, =0xB0004000 @ 跳到SDRAM中继续执行第二部分代码
halt_loop:
    b halt_loop
(2)init.c

#define WTCON (*(volatile unsigned long *)0x53000000)

#define MEM_CTL_BASE 0x48000000

void disable_watch_dog(void)
{
    WTCON = 0; // 关闭WATCHDOG很简单，往这个寄存器写0即可

}

void memsetup(void)
{
   
    unsigned long const mem_cfg_val[]={ 0x22011110, //BWSCON

                                            0x00000700, //BANKCON0

                                            0x00000700, //BANKCON1

                                            0x00000700, //BANKCON2

                                            0x00000700, //BANKCON3

                                            0x00000700, //BANKCON4

                                            0x00000700, //BANKCON5

                                            0x00018005, //BANKCON6

                                            0x00018005, //BANKCON7

                                            0x008C07A3, //REFRESH

                                            0x000000B1, //BANKSIZE

                                            0x00000030, //MRSRB6

                                            0x00000030, //MRSRB7

                                    };
    int i = 0;
    volatile unsigned long *p = (volatile unsigned long *)MEM_CTL_BASE;
    for(; i < 13; i++)
        p[i] = mem_cfg_val[i];
}

void copy_2th_to_sdram(void)
{
    unsigned int *pdwSrc = (unsigned int *)2048;
    unsigned int *pdwDest = (unsigned int *)0x30004000;
   
    while (pdwSrc < (unsigned int *)4096)
    {
        *pdwDest = *pdwSrc;
        pdwDest++;
        pdwSrc++;
    }
}

void create_page_table(void)
{

#define MMU_FULL_ACCESS (3 << 10)
#define MMU_DOMAIN (0 << 5)
#define MMU_SPECIAL (1 << 4)
#define MMU_CACHEABLE (1 << 3)
#define MMU_BUFFERABLE (1 << 2)
#define MMU_SECTION (2)
#define MMU_SECDESC (MMU_FULL_ACCESS | MMU_DOMAIN | MMU_SPECIAL | \
                             MMU_SECTION)
#define MMU_SECDESC_WB (MMU_FULL_ACCESS | MMU_DOMAIN | MMU_SPECIAL | \
                             MMU_CACHEABLE | MMU_BUFFERABLE | MMU_SECTION)
#define MMU_SECTION_SIZE 0x00100000

    unsigned long virtuladdr, physicaladdr;
    unsigned long *mmu_tlb_base = (unsigned long *)0x30000000;
   
   
    virtuladdr = 0;
    physicaladdr = 0;
    *(mmu_tlb_base + (virtuladdr >> 20)) = (physicaladdr & 0xFFF00000) | \
                                            MMU_SECDESC_WB;

   
    virtuladdr = 0xA0000000;
    physicaladdr = 0x56000000;
    *(mmu_tlb_base + (virtuladdr >> 20)) = (physicaladdr & 0xFFF00000) | \
                                            MMU_SECDESC;

   
    virtuladdr = 0xB0000000;
    physicaladdr = 0x30000000;
    while (virtuladdr < 0xB4000000)
    {
        *(mmu_tlb_base + (virtuladdr >> 20)) = (physicaladdr & 0xFFF00000) | \
                                                MMU_SECDESC_WB;
        virtuladdr += 0x100000;
        physicaladdr += 0x100000;
    }
}

void mmu_init(void)
{
    unsigned long ttb = 0x30000000;

__asm__(
    "mov r0, #0\n"
    "mcr p15, 0, r0, c7, c7, 0\n"
   
    "mcr p15, 0, r0, c7, c10, 4\n"
    "mcr p15, 0, r0, c8, c7, 0\n"
   
    "mov r4, %0\n"
    "mcr p15, 0, r4, c2, c0, 0\n"
   
    "mvn r0, #0\n"
    "mcr p15, 0, r0, c3, c0, 0\n"
   
    "mrc p15, 0, r0, c1, c0, 0\n"
   
   
   
   
                                       
    "bic r0, r0, #0x3000\n"
    "bic r0, r0, #0x0300\n"
    "bic r0, r0, #0x0087\n"

   
    "orr r0, r0, #0x0002\n"
    "orr r0, r0, #0x0004\n"
    "orr r0, r0, #0x1000\n"
    "orr r0, r0, #0x0001\n"
   
    "mcr p15, 0, r0, c1, c0, 0\n"
    :
    : "r" (ttb) );
}

(3)leds.c

#define GPFCON (*(volatile unsigned long *)0xA0000010) // 物理地址0x56000050

#define GPFDAT (*(volatile unsigned long *)0xA0000014) // 物理地址0x56000054

 

#define GPF0_out (1<<(0*2))
#define GPF1_out (1<<(1*2))
#define GPF2_out (1<<(2*2))
#define GPF3_out (1<<(3*2))

static inline void wait(unsigned long dly)
{
    for(; dly > 0; dly--);
}

int main(void)
{
    unsigned long i = 0;
   
    // 将LED1-4对应的GPB5/6/7/8四个引脚设为输出

    GPFCON = GPF0_out|GPF1_out|GPF2_out|GPF3_out;

    while(1){
       for(i=0;i<4;i++){
             GPFDAT = ~(1<<i);
             wait(30000);
         }

    }

    return 0;
}
(4)mmu.lds
SECTIONS {
  firtst 0x00000000 : { head.o init.o }
  second 0xB0004000 : AT(2048) { leds.o }
}
 

(5)Makefile
objs := head.o init.o leds.o

mmu.bin : $(objs)
    arm-linux-ld -Tmmu.lds -o mmu_elf $^
    arm-linux-objcopy -O binary -S mmu_elf $@
    arm-linux-objdump -D -m arm mmu_elf > mmu.dis
   
%.o:%.c
    arm-linux-gcc -Wall -O2 -c -o $@ $<</font>

%.o:%.S
    arm-linux-gcc -Wall -O2 -c -o $@ $<</font>

clean:
    rm -f mmu.bin mmu_elf mmu.dis *.o