（个人笔记）WM8976G 裸板驱动

个人笔记

   看到重要的东西就随手记录一下，懒得再去翻一次。

WM8976G 芯片手册

1. 三线控制模式

2. 寄存器

寄存器地图（一部分截图）

3. 上下电操作

RECOMMENDED POWER UP/DOWN SEQUENCE
In order to minimise output pop and click noise, it is recommended that the WM8976 device is
powered up and down using one of the following sequences:
(1)Power-up when NOT using the output 1.5x boost stage:

1. Turn on external power supplies. Wait for supply voltage to settle.
2. Mute all analogue outputs.
3. Set L/RMIXEN = 1 and DACENL/R = 1 in register R3.
4. Set BUFIOEN = 1 and VMIDSEL[1:0] to required value in register R1. Wait for the VMID supply
   to settle. *Refer notes 1 and 2.
5. Set BIASEN = 1 in register R1.
6. Set L/ROUT1EN = 1 in register R2.
7. Enable other mixers as required.
8. Enable other outputs as required.
9. Set remaining registers.

(2)Power-up when using the output 1.5x boost stage:

1. Turn on external power supplies. Wait for supply voltage to settle.
2. Mute all analogue outputs.
3. Enable unused output chosen from L/ROUT2, OUT3 or OUT4. If unused output not available,
   chose one of these outputs not required at power up.
4. Set BUFDCOPEN = 1 and BUFIOEN = 1 in register R1.
5. Set SPKBOOST = 1 in register R49.
6. Set VMIDSEL[1:0] to required value in register R1. Wait for the VMID supply to settle. *Refer
   notes 1 and 2.
7. Set L/RMIXEN = 1 and DACENL/R = 1 in register R3.
8. Set BIASEN = 1 in register R1.
9. Set L/ROUT2EN = 1 in register R3. *Note 3.
10. Enable other mixers as required.
11. Enable other outputs as required.
12. Set remaining registers.

(2)Power Down (all cases):

1. Mute all analogue outputs.
2. Disable Power Management Register 1. R1 = 0x00.
3. Disable Power Management Register 2. R2 = 0x00.
4. Disable Power Management Register 3. R3 = 0x00.
5. Remove external power supplies.

Notes:

1. This step enables the internal device bias buffer and the VMID buffer for unassigned
   inputs/outputs. This will provide a startup reference voltage for all inputs and outputs. This will
   cause the inputs and outputs to ramp towards VMID (NOT using output 1.5x boost) or 1.5 x
   (AVDD/2) (using output 1.5x boost) in a way that is controlled and predictable (see note 2).
2. Choose the value of the VMIDSEL bits based on the startup time (VMIDSEL=10 for slowest
   startup, VMIDSEL=11 for fastest startup). Startup time is defined by the value of the VMIDSEL
   bits (the reference impedance) and the external decoupling capacitor on VMID.
3. Setting DACEN to off while operating in x1.5 boost mode will cause the VMID voltage to drop to
   AVDD/2 midrail level and cause an output pop.

In addition to the power on sequence, it is recommended that the zero cross functions are used when changing the volume in the PGAs to avoid any audible pops or clicks.