MIPS 加载，算数以及逻辑运算

Load Constant

dla, la: Macro instructions to load the address of some labeled location or
variable in the program. You only need dla when using 64-bit pointers (which
you’ll only do in big UNIX-like systems). These instructions accept the same
addressing modes as do all loads and stores (even though they do quite different
things with them).
dli, li: Load constant immediate. dli is the 64-bit version, not supported
by all toolchains, and is only needed to load unsigned numbers too big to fit
in 32 bits. This is a macro whose length varies according to the size of the
constant.
lui: Load upper immediate. The 16-bit constant is loaded into bits 16–31 of a
register, with bits 32–63 (if applicable) set equal to bit 31 and bits 0–15 cleared.
This instruction is one-half of the pair of machine instructions that load an
arbitrary 32-bit constant. Assembly programmers will probably never write this
explicitly; it is used implicitly for macros like li (load immediate), la (load
address), and above all for implementing useful addressing modes.

la  t0,  t0, 1

lw t0, t0, 1 

Arithmetical/Logical

The arithmetical/logical instructions are further broken down into the following
types:
Add
add, addi, dadd, daddi: Obscure and rarely used alternate forms of addu,
which trap when the result would overflow. Probably of use to COBOL
compilers.
addu, addiu, daddu, daddiu: Addition, with separate 32-bit and 64-bit versions.
Here and throughout the instruction set, 64-bit versions of instructions
are marked with a leading “d” (for doubleword); also, you don’t need to specify
the “immediate” mnemonic—you just feed the assembler a constant. If the constant
you need can’t be represented in the 16-bit field provided in the instruction,
then the assembler will produce a sequence of instructions.
dsub, sub: Subtract variants that trap on overflow.
dsubu, subu: Regular 64- and 32-bit subtraction (there isn’t a subtractimmediate,
of course, because the constant in add-immediate can be negative).

Miscellaneous Arithmetic
abs, dabs: Absolute value; expands to set and branch (or conditional move if
there is one).
dneg, neg, dnegu, negu: Unary negate; mnemonics without U will trap on
overflow.
Bitwise Logical Instructions
and, andi, or, ori, xor, xori, nor: Three-operand bitwise logical operations.
Don’t write the “immediate” types—the assembler will generate them
automatically when fed a constant operand. Note that there’s no nori
instruction.
not: Two-operand instruction implemented with nor.
Shifts and Rotates
drol, dror, rol, ror: Rotate right and left; expand to a four-instruction
sequence.
dsll, dsll32, dsllv: 64-bit (double) shift-left, bringing zeros into low bits.
The three different instructions provide for different ways of specifying the shift
amount: by a constant 0–31 bits, by a constant 32–63 bits, or by using the low
6 bits of the contents of another register. Assembly programmers should just
write the dsll mnemonic.
dsra, dsra32, dsrav: 64-bit (double) shift-right arithmetic. This is “arithmetic”
in that it propagates copies of bit 63—the sign bit—into high bits. That
means it implements a correct division by a power of 2 when applied to
signed 64-bit integer data. Always write the dsra mnemonic; the
assembler will choose the instruction format according to how the shift amount
is specified.
dsrl, dsrl32, dsrlv: 64-bit (double) shift-right logical. This is “logical” in
that it brings zeros into high bits. Although there are three different instructions,
assembly programmers should always use the dsrl mnemonic; the
assembler will choose the instruction format according to how the shift amount
is specified.
sll, sllv: 32-bit shift-left. You only need to write the sll mnemonic.
sra, srav: Shift-right arithmetic (propagating the sign bit). Alwayswrite sra.
srl,srlv: Shift-right logical (bringing zeros into high bits). Alwayswrite srl.

Set if. . .
slt, slti, sltiu, sltu: Hardware instructions, which write a 1 if the
condition is satisfied and a 0 otherwise.Write slt or sltu.

seq, sge, sgeu, sgt, sgtu, sle, sleu, sne: Macro instructions to set the
destination according to more complex conditions.

addu a1,  a1,  1 a1 = a1 + 1

and  d,   s,   j d = s & (unsigned)j