平台:Sail335
系统:Linux3.2
软件版本:Sail335的Linux3.2 2015.1.15更新
硬件配置:CPU AM335X_ZCZ_800M
Nand MT29F2G08
DDR MT41J256M16-187和MT41K256M16-125
主要研究对象:AM335X的DDR控制器。Sail335 Linux3.2的U-boot中内存初始化流程及方法。
AM335X的DDR控制器:
http://processors.wiki.ti.com/index.php/AM335x_EMIF_Configuration_tips
void config_ddr(
unsigned int pll,
unsigned int ioctrl,
const struct ddr_data *data,
const struct ddr_data *data,
const struct cmd_control *ctrl,
const struct emif_regs *regs)
{
const struct emif_regs *regs)
{
/*使能CM_PER_EMIF_FW_CLKCTRL和CM_PER_EMIF_CLKCTRL寄存器*/
enable_emif_clocks();
enable_emif_clocks();
ddr_pll_config(pll);
/*使能VTP*/
config_vtp();
config_vtp();
/*配置DDR CMD 控制寄存器
*CMD0_REG_PHY_CTRL_SLAVE_RATIO_0 <--NT5CB128M16HPD1_0_RATIO :
*CMD0_REG_PHY_DLL_LOCK_DIFF_0 <--NT5CB128M16HPD1_0_DLL_LOCK_DIFF :
*CMD0_REG_PHY_INVERT_CLKOUT_0 <--NT5CB128M16HPD1_0_INVERT_CLKOUT :是否反转CCLK电平
*CMD1_REG_PHY_CTRL_SLAVE_RATIO_0
*CMD1_REG_PHY_DLL_LOCK_DIFF_0
*CMD1_REG_PHY_INVERT_CLKOUT_0
*CMD2_REG_PHY_CTRL_SLAVE_RATIO_0
*CMD2_REG_PHY_DLL_LOCK_DIFF_0
*CMD2_REG_PHY_INVERT_CLKOUT_0
*/
config_cmd_ctrl(ctrl);
/*配置DDR DATA控制器
/*配置DDR DATA控制器
*DATA0_REG_PHY_RD_DQS_SLAVE_RATIO_0
*DATA0_REG_PHY_WR_DQS_SLAVE_RATIO_0
*DATA0_REG_PHY_WRLVL_INIT_RATIO_0
*DATA0_REG_PHY_GATELVL_INIT_RATIO_0
*DATA0_REG_PHY_FIFO_WE_SLAVE_RATIO_0
*DATA0_REG_PHY_WR_DATA_SLAVE_RATIO_0
*DATA0_REG_PHY_USE_RANK0_DELAYS
*DATA0_REG_PHY_DLL_LOCK_DIFF_0
*/
config_ddr_data(0, data);
config_ddr_data(0, data);
config_ddr_data(1, data);
/*
*ddr_cmd0_ioctrl
*ddr_cmd0_ioctrl
*/
config_io_ctrl(ioctrl);
/* Set CKE to be controlled by EMIF/DDR PHY */
writel(DDR_CKE_CTRL_NORMAL, &ddrctrl->ddrckectrl);
/* Program EMIF instance */
config_ddr_phy(regs);
config_io_ctrl(ioctrl);
/* Set CKE to be controlled by EMIF/DDR PHY */
writel(DDR_CKE_CTRL_NORMAL, &ddrctrl->ddrckectrl);
/* Program EMIF instance */
config_ddr_phy(regs);
set_sdram_timings(regs);
config_sdram(regs);
}