E2.1 Atomic transactions

Previous generations of AMBA have included Exclusive accesses. See Exclusive accesses on page A7-98. AMBA 5 introduces Atomic transactions, which perform more than just a single access, and have some form of operation that is associated with the transaction. Atomic transactions are suited to situations where the data is located a significant distance from the agent that must perform the operation. Previously, performing an operation that is atomically required pulling the data towards the agent, performing the operation, and then pushing the result back. Atomic transactions enable sending the operation to the data, permitting the operation to be performed closer to where the data is located.	Atomic Transactions主要用于当agent和memory距离较远时，   在AMBA5之前的原子操作顺序是：读数据，然后更改，然后写数据。 atomic transactions的只需要一次操作就可以完成，即发送数据和操作到memory，操作的执行可能会在interconnect中，也可能在最终的memory中，这就要求interconnect或最终的component要有简单的MCU来执行总线的操作。
The key advantage of this approach is that it reduces the amount of time during which the data must be made inaccessible to other agents in the system.	优势是减少了独占总线的时间。
The Atomic_Transactions extension is supported in: • AXI5. • ACE5-Lite. • ACE5-LiteDVM. If a slave or interconnect component declares that it supports Atomic transaction, then it must support all operation types, sizes and endianness. This specification does not support the use of Atomic transactions by ACE5 masters

 

E2.1.1 Overview

In a atomic transaction, the master sends an address, control information and outbound data. The slave sends inbound data (except for AtomicStore) and a response. This specification supports four forms of Atomic transaction:		master同时发送数据和操作到interconnect或slave，后者执行master的操作，然后将数据传回去
AtomicStore	• Sends a single data value with an address and the atomic operation to be performed. • The target performs the operation using the sent data and value at the addressed location as operands. • The result is stored in the address location. • A single response is given without data. • Outbound data size is 1, 2, 4, or 8 bytes.	将一个地址和一个数据相操作（加/与或非异或等），然后将相加结果保存到同样的地址，master会发送address和相操作的数据
AtomicLoad	• Sends a single data value with an address and the atomic operation to be performed. • The original data value at the addressed location is returned. • The target performs the operation using the sent data and value at the addressed location as operands. • The result is stored in the address location. • Outbound data size is 1, 2, 4, or 8 bytes. • Inbound data size is the same as the outbound data size.	和AtomicStore执行基本一致，所不同的是，需要将address的原始值返回。
AtomicSwap	• Sends a single data value with an address. • The target swaps the value at the addressed location with the data value that is supplied in the transaction. • The original data value at the addressed location is returned. • Outbound data size is 1, 2, 4, or 8 bytes. • Inbound data size is the same as the outbound data size.	交换操作，将address的数据读出，然后将数据写入到address，会返回address的原始数据。
AtomicCompare	• Sends two data values, the compare value and the swap value, to the addressed location. The compare and swap values are of equal size. • The data value at the addressed location is checked against the compare value: — If the values match, the swap value is written to the addressed location. — If the values do not match, the swap value is not written to the addressed location. • The original data value at the addressed location is returned. • Outbound data size is 2, 4, 8, 16, or 32 bytes. • Inbound data size is half of the outbound data size because the outbound data contains both compare and swap values, whereas the inbound data has only the original data value.	比较交换，会发送两个数据，一个（Compare）用于和address的原始值比较，如果他们是一致的，则将address的数据和另一个数据（Swap）交换，并返回address的原始值。 注意：从传输的返回结果并不知道是否执行了交换，只有在返回后使用返回的值和之前Compare的值进行再次比较，才能知道是否做了交换。

E2.1.2 Atomic transaction operations

ADD	The value in memory is added to the sent data and the result stored in memory.	加
CLR	Every set bit in the sent data clears the corresponding bit of the data in memory.	等同于 and
EOR	Bitwise exclusive OR of the sent data and value in memory.	或
SET	Every set bit in the sent data sets the corresponding bit of the data in memory.	等同于 or
SMAX	The value stored in memory is the maximum of the existing value and sent data. This operation assumes signed data.
SMIN	The value stored in memory is the minimum of the existing value and sent data. This operation assumes signed data.
UMAX	The value stored in memory is the maximum of the existing value and sent data. This operation assumes unsigned data.
UMIN	The value stored in memory is the minimum of the existing value and sent data. This operation assumes unsigned data.
以上都是AtomicStore and AtomicLoad所附带的操作

E2.1.3 Supported data size

 

E2.1.4 ID use for Atomic transactions

A single AXI ID is used for an Atomic transaction. The same AXI ID is used for the request, write response, and the read data.
Atomic transactions must not use AXI ID values that are used by Non-atomic transactions that are outstanding at the same time. This rule applies to transactions on either the AR or AW channel. This rule ensures that there are no ordering constraints between Atomic transactions and Non-atomic transactions.
If one transaction has fully completed before the other is issued, Atomic transactions and Non-atomic transactions can use the same AXI ID value.
Multiple Atomic transactions that are outstanding at the same time must not use the same AXI ID value.	不同的两个atomic transaction要使用不同的ID。
atomic transaction的request都是通过AW channel发出，数据通过W channel发出，RW channel负责传输执行的结果，如果同时需要将数据读入，则读入的数据通过R channel传回，所以atomic transaction至少需要三个channel，也可能是四个，这些channel执行一个atomic transaction的ID要是一致的。

E2.1.7 Transaction structure

For AtomicLoad, AtomicSwap, and AtomicCompare transactions, the transaction structure is as follows: • The request is issued on the AW channel. • The associated transaction data is sent on the W channel. • The number of write data transfers required on the W channel is determined by the AWLEN signal. • The relative timing of the Atomic transaction request and the Atomic transaction write data is not specified. • The slave returns the original data value using the R channel. • The number of read data transfers is determined from both AWLEN and the AWATOP signals. Note For the AtomicCompare operation, if AWLEN is greater than 1, then the number of read data transfers is half that specified by AWLEN. • A slave is permitted to wait for all write data before sending read data. A master must be able to send all write data without receiving any read data. • A slave is permitted to send all read data before accepting any write data. A master must be able to accept receiving all read data without any write data being accepted. • A single write response is returned on the B channel. The write response must be given only by the slave after it has received all write data transfers and the result of the atomic transaction is observable.

For AtomicStore transactions, the transaction structure is as follows: • The request is issued on the AW channel. • The associated transaction data is sent on the W channel. • The number of write data transfers required on the W channel is determined by the AWLEN signal. • The relative timing of the Atomic transaction request and the Atomic transaction write data is not specified. • A single write response is returned on the B channel. The write response must be given only by the slave after it has received all write data transfers and the result of the atomic transaction is observable.

E2.1.10 Support for Atomic transactions

Master support Atomic transactions are not supported for ACE masters. An ACE master is able to perform an atomic operation to a Cacheable location by obtaining a unique copy of the cache line and performing the atomic operation locally within its own cache. An ACE master cannot support Atomic transactions to Non-cacheable or Device locations. No specific support for Atomic transactions is required on the Snoop channel and therefore an ACE master needs no added functionality to be compatible with Atomic transactions that are performed by other components. A master component that supports Atomic transactions is required to support a mechanism to suppress the generation of Atomic transactions to ensure compatibility in systems where Atomic transactions are not supported. An optional BROADCASTATOMIC pin is specified. When the pin is tied HIGH, the interface is permitted to generate Atomic transactions. When tied LOW, the interface must not generate Atomic transactions.
Slave support It is optional for a slave component to support Atomic transactions. If a slave component only supports Atomic transactions for particular memory types, or for particular address regions, then the slave must give an appropriate error response for the Atomic transactions that it does not support.
Interconnect support It is optional for an interconnect to support Atomic transactions. If an interconnect does not support Atomic transactions, all attached master components must be configured to not generate Atomic transactions. The BROADCASTATOMIC pin can be used for this purpose. Atomic transactions, can be supported at any point within an interconnect that supports them, including passing Atomic transactions downstream to slave components. Atomic transactions are not required to be supported for every address location. If Atomic transactions are not supported for a given address location, then an appropriate error response can be given for the transaction.
For Device transactions, the Atomic transaction must be passed to the endpoint slave. If the slave is configured to indicate that it does not support Atomic transactions, then the interconnect must give an error response for the transaction. An Atomic transaction must not be passed to a component that does not support Atomic transactions.	对于device的transaction，只有在slave支持atomic transaction时才是支持的，就是atomic操作的执行必须在slave，interconnect不能代替slave执行。
For Cacheable transactions, the interconnect can either: • Perform the atomic operation within the interconnect. This method requires that the interconnect performs the appropriate read, write, and snoop transactions to complete the operation. • If the appropriate endpoint slave is configured to indicate that it does support atomic operations, then the interconnect can pass the atomic operation to the slave.	对于cacheable的transaction，可以有两种方式支持： 1. interconnect可以做总线要求的操作。 2. endpoint slave可以做总线要求的操作，如果slave支持的话。