入口
linux-3.0.1/arch/arm/kernel/head.S 中的 75行 ENTRY(stext)
出口过程 // TODO
ldr r13, =__mmap_switched @ address to jump to after
adr lr, BSYM(1f) @ return (PIC) address
add pc, r10, #PROCINFO_INITFUNC
r10 是 变量 __v6_proc_info 的 首地址 ,变量的类型是 struct proc_info_list
arch/arm/kernel/asm-offsets.c DEFINE(PROCINFO_INITFUNC, offsetof(struct proc_info_list, __cpu_flush));
r10+#PROCINFO_INITFUNC 的 值 是 变量 __v6_proc_info 中的 __cpu_flush 成员的地址
在arch/arm/mm/proc-v6.S中查找到 __v6_proc_info 的赋值, 该变量的__cpu_flush成员 为 b __v6_setup
综上:
1.该句就是调用了__v6_proc_info 的 __cpu_flush 成员 ,该成员为b __v6_setup
2.也就是说调用了 __v6_setup 函数
__v6_setup // arch/arm/mm/proc-v6.S
mov pc, lr // 通过将lr寄存器赋给pc,导致对__enable_mmu的调用
1: b __enable_mmu
__enable_mmu
__turn_mmu_on
__turn_mmu_on
mov r3, r13 // r13 中 为 __mmap_switched 的地址
mov pc, r3 // 将r13寄存器值赋给pc,调用__mmap_switched
__mmap_switched // arch/arm/kernel/head-common.S
b start_kernel // 调用在init/main.c文件中的 start_kernel
__HEAD
ENTRY(stext)
setmode PSR_F_BIT | PSR_I_BIT | SVC_MODE, r9 @ ensure svc mode
@ and irqs disabled
mrc p15, 0, r9, c0, c0 @ get processor id
bl __lookup_processor_type @ r5=procinfo r9=cpuid
movs r10, r5 @ invalid processor (r5=0)?
THUMB( it eq ) @ force fixup-able long branch encoding
beq __error_p @ yes, error 'p'
#ifndef CONFIG_XIP_KERNEL
adr r3, 2f
ldmia r3, {r4, r8}
sub r4, r3, r4 @ (PHYS_OFFSET - PAGE_OFFSET)
add r8, r8, r4 @ PHYS_OFFSET
#else
ldr r8, =PLAT_PHYS_OFFSET
#endif
/*
* r1 = machine no, r2 = atags or dtb,
* r8 = phys_offset, r9 = cpuid, r10 = procinfo
*/
bl __vet_atags
#ifdef CONFIG_SMP_ON_UP
bl __fixup_smp
#endif
#ifdef CONFIG_ARM_PATCH_PHYS_VIRT
bl __fixup_pv_table
#endif
bl __create_page_tables
/*
* The following calls CPU specific code in a position independent
* manner. See arch/arm/mm/proc-*.S for details. r10 = base of
* xxx_proc_info structure selected by __lookup_processor_type
* above. On return, the CPU will be ready for the MMU to be
* turned on, and r0 will hold the CPU control register value.
*/
ldr r13, =__mmap_switched @ address to jump to after
@ mmu has been enabled
adr lr, BSYM(1f) @ return (PIC) address
mov r8, r4 @ set TTBR1 to swapper_pg_dir
ARM( add pc, r10, #PROCINFO_INITFUNC )
THUMB( add r12, r10, #PROCINFO_INITFUNC )
THUMB( mov pc, r12 )
1: b __enable_mmu
ENDPROC(stext)