主控端可以通过指令查看时钟树,enable_cnt为1,表示时钟已使能。
# cat d/clk/clk_summary
cat d/clk/clk_summary
clock enable_cnt prepare_cnt rate
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hsadc_1_tsp
g_hsadc_1_tsp
hsadc_0_tsp
g_hsadc_0_tsp
pclkin_isp
g_pclkin_isp
pclkin_isp_inv
clkin_isp
pclkin_cif
g_pclkin_cif
pclkin_cif_inv
clkin_cif
jtag_clkin
clk_jtag
clk_hsadc_ext
gmac_clkin
clk_mac
g_mac_refout
g_clk_mac_ref
g_clk_mac_tx
g_clk_mac_rx
edp_24m_clkin
clk_edp_24m
i2s_clkin
dummy_cpll
clk_spi2
clk_nandc1
clk_cif_pll
clk_cif_out
clk_spi1
clk_hsadc_pll
clk_hsadc_out
clk_hsadc
clk_hsadc_inv
clk_uart0_pll
uart0_frac
dummy
g_aclk_lcdc_iep
g_clk_wifi
testout_div
io_27m_in
g_clk_27m_tsp
xin32k
clk_otg_adp
g_hdmi_cec_clk
clk_tsadc
xin24m
clk_sdmmc
g_clk_lcdc_pwm1
g_clk_lcdc_pwm0
clk_otgphy2
otgphy2_480m
usbphy_480m
ehci1phy_480m
ehci1phy_12m_div
clk_otgphy1
otgphy1_480m
clk_otgphy0
otgphy0_480m
g_mipidsi_24m
g_ps2c_clk