Makefile

 

rules :

target: dependencies
    system command(s)

clean: 

　　rm <the generated artifact>     // used to remove all generated artifact 

Marco: 

CC=gcc       //define constant 
CFLAGS=-I.

hellomake: hellomake.o hellofunc.o
     $(CC) -o hellomake hellomake.o hellofunc.o   // $(CC) will be replaced by gcc 

all: hellomake1 hellomake2  //use make all to complile mutiple artifical defined under all 

Speical Marco

• $@ is the name of the file to be made.

• $? is the names of the changed dependents.

For example, we could use a rule as follows

hello: main.cpp hello.cpp factorial.cpp
	$(CC) $(CFLAGS) $? $(LDFLAGS) -o $@   //$@ represents hello ,  $? represent the source file

 

Consider an example where your targets are to be placed in a separate directory, and that directory might not exist before make is run. In this situation, you want the directory to be created before any targets are placed into it but, because the timestamps on directories change whenever a file is added, removed, or renamed, we certainly don’t want to rebuild all the targets whenever the directory’s timestamp changes. One way to manage this is with order-only prerequisites: make the directory an order-only prerequisite on all the targets:

OBJDIR := objdir
OBJS := $(addprefix $(OBJDIR)/,foo.o bar.o baz.o)

$(OBJDIR)/%.o : %.c
        $(COMPILE.c) $(OUTPUT_OPTION) $<

all: $(OBJS)

$(OBJS): | $(OBJDIR)

$(OBJDIR):
        mkdir $(OBJDIR)

Now the rule to create the objdir directory will be run, if needed, before any ‘.o’ is built, but no ‘.o’ will be built because the objdir directory timestamp changed.

 

转载于:https://www.cnblogs.com/anyu686/p/9143095.html