access两位小数不进位_X64dbg汇编指令提示 中文化

用于X64DBG汇编指令提示,有时候总是记不住某个指令的作用,需要去查找。总会打断调试思路,此功能软件自带,但全是英文,看起来还是一样费劲,抽空搞了一下,指令帮助暂时没有弄,涉及到的知识不懂,有意向进行处理的朋友可以私信我,提供我所能及的支持。

文件下载地址:链接: https://pan.baidu.com/s/1hSECZPGxtBtf2a3oZjtn-Q 密码: 63se  下载后覆盖 x96dbg\release 下的mnemdb.json文件即可,程序中右键--显示指令提示,即可。

--------------------------------------------------------------------以下是双行术语对照表,发现错误可以自行修改---------------------------------------------------------------

9 1        4 2

\nAAA - ASCII Adjust After Addition:\n| Opcode| Instruction| Op/En| 64-bit Mode| Compat/Leg Mode| Description                    \n| 37    | AAA        | NP   | Invalid    | Valid          | ASCII adjust AL after addition.\n\nInstruction Operand Encoding:\n| Op/En| Operand 1| Operand 2| Operand 3| Operand 4\n| NP   | NA       | NA       | NA       | NA       \n\nDescription:\nAdjusts the sum of two unpacked BCD values to create an unpacked BCD result.\nThe AL register is the implied source and destination operand for this instruction.\nThe AAA instruction is only useful when it follows an ADD instruction that adds\n(binary addition) two unpacked BCD values and stores a byte result in the AL\nregister. The AAA instruction then adjusts the contents of the AL register to\ncontain the correct 1-digit unpacked BCD result.\n\nIf the addition produces a decimal carry, the AH register increments by 1, and\nthe CF and AF flags are set. If there was no decimal carry, the CF and AF flags\nare cleared and the AH register is unchanged. In either case, bits 4 through\n7 of the AL register are set to 0.\n\nThis instruction executes as described in compatibility mode and legacy mode.\nIt is not valid in 64-bit mode.\n\nOperation:\n\nIF 64-Bit Mode\n  THEN\n     #UD;\n  ELSE\n     IF ((AL AND 0FH) > 9) or (AF = 1)\n       THEN\n          AL 9) or (AF = 1)\n       THEN\n          AL

\nADDSUBPD - Packed Double-FP Add/Subtract:\n| Opcode/Instruction                   | Op/En| 64/32-bit Mode| CPUID Feature Flag| Description                                 \n| 66 0F D0 /r ADDSUBPD xmm1, xmm2/m128 | RM   | V/V           | SSE3              | Add/subtract double-precision floating-point\n|                                      |      |               |                   | values from xmm2/m128 to xmm1.              \n| VEX.NDS.128.66.0F.WIG D0 /r VADDSUBPD| RVM  | V/V           | AVX               | Add/subtract packed double-precision        \n| xmm1, xmm2, xmm3/m128                |      |               |                   | floating-point values from xmm3/mem         \n|                                      |      |               |                   | to xmm2 and stores result in xmm1.          \n| VEX.NDS.256.66.0F.WIG D0 /r VADDSUBPD| RVM  | V/V           | AVX               | Add / subtract packed double-precision      \n| ymm1, ymm2, ymm3/m256                |      |               |                   | floating-point values from ymm3/mem         \n|                                      |      |               |                   | to ymm2 and stores result in ymm1.          \n\nInstruction Operand Encoding:\n| Op/En| Operand 1       | Operand 2    | Operand 3    | Operand 4\n| RM   | ModRM:reg (r, w)| ModRM:r/m (r)| NA           | NA       \n| RVM  | ModRM:reg (w)   | VEX.vvvv (r) | ModRM:r/m (r)| NA       \n\nDescription:\nAdds odd-numbered double-precision floating-point values of the first source\noperand (second operand) with the corresponding double-precision floating-point\nvalues from the second source operand (third operand); stores the result in\nthe odd-numbered values of the destination operand (first operand). Subtracts\nthe even-numbered double-precision floating-point values from the second source\noperand from the corresponding double-precision floating values in the first\nsource operand; stores the result into the even-numbered values of the destination\noperand.\n\nIn 64-bit mode, using a REX prefix in the form of REX.R permits this instruction\nto access additional registers (XMM8-XMM15). 128-bit Legacy SSE version: The\nsecond source can be an XMM register or an 128-bit memory location. The destination\nis not distinct from the first source XMM register and the upper bits (VLMAX-1:128)\nof the corresponding YMM register destination are unmodified. See Figure 3-3.\nVEX.128 encoded version: the first source operand is an XMM register or 128-bit\nmemory location. The destination operand is an XMM register. The upper bits\n(VLMAX-1:128) of the corresponding YMM register destination are zeroed. VEX.256\nencoded version: The first source operand is a YMM register. The second source\noperand can be a YMM register or a 256-bit memory location. The destination\noperand is a YMM register.\n\nADDSUBPD xmm1, xmm2/m128\n\n| [127:64]| [63:0]| xmm2/m128\nRESULT:\n\n| xmm1[127:64] + xmm2/m128[127:64]| xmm1[63:0] - xmm2/m128[63:0]xmm1      \n| [127:64]                        | [63:0]                                \n| Figure 3-3.                     | ADDSUBPD - Packed Double-FP Add/Subtract\nOperation:\n\nADDSUBPD (128-bit Legacy SSE version)\nDEST[63:0]

\nHADDPD - Packed Double-FP Horizontal Add:\n| Opcode/Instruction                 | Op/En| 64/32-bit Mode| CPUID Feature Flag| Description                           \n| 66 0F 7C /r HADDPD xmm1, xmm2/m128 | RM   | V/V           | SSE3              | Horizontal add packed double-precision\n|                                    |      |               |                   | floating-point values from xmm2/m128  \n|                                    |      |               |                   | to xmm1.                              \n| VEX.NDS.128.66.0F.WIG 7C /r VHADDPD| RVM  | V/V           | AVX               | Horizontal add packed double-precision\n| xmm1,xmm2, xmm3/m128               |      |               |                   | floating-point values from xmm2 and   \n|                                    |      |               |                   | xmm3/mem.                             \n| VEX.NDS.256.66.0F.WIG 7C /r VHADDPD| RVM  | V/V           | AVX               | Horizontal add packed double-precision\n| ymm1, ymm2, ymm3/m256              |      |               |                   | floating-point values from ymm2 and   \n|                                    |      |               |                   | ymm3/mem.                             \n\nInstruction Operand Encoding:\n| Op/En| Operand 1       | Operand 2    | Operand 3    | Operand 4\n| RM   | ModRM:reg (r, w)| ModRM:r/m (r)| NA           | NA       \n| RVM  | ModRM:reg (w)   | VEX.vvvv (r) | ModRM:r/m (r)| NA       \n\nDescription:\nAdds the double-precision floating-point values in the high and low quadwords\nof the destination operand and stores the result in the low quadword of the\ndestination operand.\n\nAdds the double-precision floating-point values in the high and low quadwords\nof the source operand and stores the result in the high quadword of the destination\noperand.\n\nIn 64-bit mode, use of the REX.R prefix permits this instruction to access additional\nregisters (XMM8-XMM15).\n\nSee Figure 3-15 for HADDPD; see Figure 3-16 for VHADDPD.\n\nHADDPD xmm1, xmm2/m128\n\nxmm2\n\n| [127:64]| [63:0]/m128                               \n| [127:64]| xmm1 Result: xmm1[63:0] + xmm1[127:64]xmm1\n| [127:64]| [63:0]                                    \nOM15993\n\n| Figure 3-15.| HADDPD - Packed Double-FP Horizontal Add\n| X3          | X0                                    \n| Y3          | Y0                                    \n| Y2 + Y3     | X0 + X1 VHADDPD operation             \n128-bit Legacy SSE version: The second source can be an XMM register or an 128-bit\nmemory location. The destination is not distinct from the first source XMM register\nand the upper bits (VLMAX-1:128) of the corresponding YMM register destination\nare unmodified. VEX.128 encoded version: the first source operand is an XMM\nregister or 128-bit memory location. The destination operand is an XMM register.\nThe upper bits (VLMAX-1:128) of the corresponding YMM register destination are\nzeroed. VEX.256 encoded version: The first source operand is a YMM register.\nThe second source operand can be a YMM register or a 256-bit memory location.\nThe destination operand is a YMM register.\n\nOperation:\n\nHADDPD (128-bit Legacy SSE version)\nDEST[63:0]

\nHSUBPD - Packed Double-FP Horizontal Subtract:\n| Opcode/Instruction                 | Op/En| 64/32-bit Mode| CPUID Feature Flag| Description                                \n| 66 0F 7D /r HSUBPD xmm1, xmm2/m128 | RM   | V/V           | SSE3              | Horizontal subtract packed double-precision\n|                                    |      |               |                   | floating-point values from xmm2/m128       \n|                                    |      |               |                   | to xmm1.                                   \n| VEX.NDS.128.66.0F.WIG 7D /r VHSUBPD| RVM  | V/V           | AVX               | Horizontal subtract packed double-precision\n| xmm1,xmm2, xmm3/m128               |      |               |                   | floating-point values from xmm2 and        \n|                                    |      |               |                   | xmm3/mem.                                  \n| VEX.NDS.256.66.0F.WIG 7D /r VHSUBPD| RVM  | V/V           | AVX               | Horizontal subtract packed double-precision\n| ymm1, ymm2, ymm3/m256              |      |               |                   | floating-point values from ymm2 and        \n|                                    |      |               |                   | ymm3/mem.                                  \n\nInstruction Operand Encoding:\n| Op/En| Operand 1       | Operand 2    | Operand 3    | Operand 4\n| RM   | ModRM:reg (r, w)| ModRM:r/m (r)| NA           | NA       \n| RVM  | ModRM:reg (w)   | VEX.vvvv (r) | ModRM:r/m (r)| NA       \n\nDescription:\nThe HSUBPD instruction subtracts horizontally the packed DP FP numbers of both\noperands.\n\nSubtracts the double-precision floating-point value in the high quadword of\nthe destination operand from the low quadword of the destination operand and\nstores the result in the low quadword of the destination operand.\n\nSubtracts the double-precision floating-point value in the high quadword of\nthe source operand from the low quadword of the source operand and stores the\nresult in the high quadword of the destination operand.\n\nIn 64-bit mode, use of the REX.R prefix permits this instruction to access additional\nregisters (XMM8-XMM15).\n\nSee Figure 3-19 for HSUBPD; see Figure 3-20 for VHSUBPD.\n\nHSUBPD xmm1, xmm2/m128\n\nxmm2\n\n| [127:64]| [63:0]/m128                               \n| [127:64]| xmm1 Result: xmm1[63:0] - xmm1[127:64]xmm1\n| [127:64]| [63:0]                                    \nOM15995\n\n| Figure 3-19.| HSUBPD - Packed Double-FP Horizontal Subtract\n| X3          | X0                                         \n| Y3          | Y0                                         \n| Y2 - Y3     | X0 - X1 VHSUBPD operation                  \n128-bit Legacy SSE version: The second source can be an XMM register or an 128-bit\nmemory location. The destination is not distinct from the first source XMM register\nand the upper bits (VLMAX-1:128) of the corresponding YMM register destination\nare unmodified. VEX.128 encoded version: the first source operand is an XMM\nregister or 128-bit memory location. The destination operand is an XMM register.\nThe upper bits (VLMAX-1:128) of the corresponding YMM register destination are\nzeroed. VEX.256 encoded version: The first source operand is a YMM register.\nThe second source operand can be a YMM register or a 256-bit memory location.\nThe destination operand is a YMM register.\n\nOperation:\n\nHSUBPD (128-bit Legacy SSE version)\nDEST[63:0]

\nJMP - Jump:\n| Opcode       | Instruction | Op/En| 64-Bit Mode| Compat/Leg Mode| Description                               \n| EB cb        | JMP rel8    | D    | Valid      | Valid          | Jump short, RIP = RIP + 8-bit displacement\n|              |             |      |            |                | sign extended to 64-bits                  \n| E9 cw        | JMP rel16   | D    | N.S.       | Valid          | Jump near, relative, displacement relative\n|              |             |      |            |                | to next instruction. Not supported in     \n|              |             |      |            |                | 64-bit mode.                              \n| E9 cd        | JMP rel32   | D    | Valid      | Valid          | Jump near, relative, RIP = RIP + 32-bit   \n|              |             |      |            |                | displacement sign extended to 64-bits     \n| FF /4        | JMP r/m16   | M    | N.S.       | Valid          | Jump near, absolute indirect, address     \n|              |             |      |            |                | = zeroextended r/m16. Not supported       \n|              |             |      |            |                | in 64-bit mode.                           \n| FF /4        | JMP r/m32   | M    | N.S.       | Valid          | Jump near, absolute indirect, address     \n|              |             |      |            |                | given in r/m32. Not supported in 64-bit   \n|              |             |      |            |                | mode.                                     \n| FF /4        | JMP r/m64   | M    | Valid      | N.E.           | Jump near, absolute indirect, RIP =       \n|              |             |      |            |                | 64-Bit offset from register or memory     \n| EA cd        | JMP ptr16:16| D    | Inv.       | Valid          | Jump far, absolute, address given in      \n|              |             |      |            |                | operand                                   \n| EA cp        | JMP ptr16:32| D    | Inv.       | Valid          | Jump far, absolute, address given in      \n|              |             |      |            |                | operand                                   \n| FF /5        | JMP m16:16  | D    | Valid      | Valid          | Jump far, absolute indirect, address      \n|              |             |      |            |                | given in m16:16                           \n| FF /5        | JMP m16:32  | D    | Valid      | Valid          | Jump far, absolute indirect, address      \n|              |             |      |            |                | given in m16:32.                          \n| REX.W + FF /5| JMP m16:64  | D    | Valid      | N.E.           | Jump far, absolute indirect, address      \n|              |             |      |            |                | given in m16:64.                          \n\nInstruction Operand Encoding:\n| Op/En| Operand 1    | Operand 2| Operand 3| Operand 4\n| D    | Offset       | NA       | NA       | NA       \n| M    | ModRM:r/m (r)| NA       | NA       | NA       \n\nDescription:\nTransfers program control to a different point in the instruction stream without\nrecording return information. The destination (target) operand specifies the\naddress of the instruction being jumped to. This operand can be an immediate\nvalue, a general-purpose register, or a memory location.\n\nThis instruction can be used to execute four different types of jumps:\n\n - Near jump - A jump to an instruction within the current code segment (the segment\ncurrently pointed to by the CS register), sometimes referred to as an intrasegment\njump.\n - Short jump - A near jump where the jump range is limited to -128 to +127 from\nthe current EIP value.\n - Far jump - A jump to an instruction located in a different segment than the current\ncode segment but at the same privilege level, sometimes referred to as an intersegment\njump.\n - Task switch - A jump to an instruction located in a different task.\n\nA task switch can only be executed in protected mode (see Chapter 7, in the\nIntel® 64 and IA-32 Architectures Software Developer's Manual, Volume 3A, for\ninformation on performing task switches with the JMP instruction).\n\nNear and Short Jumps. When executing a near jump, the processor jumps to the\naddress (within the current code segment) that is specified with the target\noperand. The target operand specifies either an absolute offset (that is an\noffset from the base of the code segment) or a relative offset (a signed displacement\nrelative to the current\n\nvalue of the instruction pointer in the EIP register). A near jump to a relative\noffset of 8-bits (rel8) is referred to as a short jump. The CS register is not\nchanged on near and short jumps.\n\nAn absolute offset is specified indirectly in a general-purpose register or\na memory location (r/m16 or r/m32). The operand-size attribute determines the\nsize of the target operand (16 or 32 bits). Absolute offsets are loaded directly\ninto the EIP register. If the operand-size attribute is 16, the upper two bytes\nof the EIP register are cleared, resulting in a maximum instruction pointer\nsize of 16 bits.\n\nA relative offset (rel8, rel16, or rel32) is generally specified as a label\nin assembly code, but at the machine code level, it is encoded as a signed 8-,\n16-, or 32-bit immediate value. This value is added to the value in the EIP\nregister. (Here, the EIP register contains the address of the instruction following\nthe JMP instruction). When using relative offsets, the opcode (for short vs.\nnear jumps) and the operand-size attribute (for near relative jumps) determines\nthe size of the target operand (8, 16, or 32 bits).\n\nFar Jumps in Real-Address or Virtual-8086 Mode. When executing a far jump in\nreal-address or virtual-8086 mode, the processor jumps to the code segment and\noffset specified with the target operand. Here the target operand specifies\nan absolute far address either directly with a pointer (ptr16:16 or ptr16:32)\nor indirectly with a memory location (m16:16 or m16:32). With the pointer method,\nthe segment and address of the called procedure is encoded in the instruction,\nusing a 4-byte (16-bit operand size) or 6-byte (32-bit operand size) far address\nimmediate. With the indirect method, the target operand specifies a memory location\nthat contains a 4-byte (16-bit operand size) or 6-byte (32-bit operand size)\nfar address. The far address is loaded directly into the CS and EIP registers.\nIf the operand-size attribute is 16, the upper two bytes of the EIP register\nare cleared.\n\nFar Jumps in Protected Mode. When the processor is operating in protected mode,\nthe JMP instruction can be used to perform the following three types of far\njumps:\n\n - A far jump to a conforming or non-conforming code segment.\n - A far jump through a call gate.\n - A task switch.\n\n(The JMP instruction cannot be used to perform inter-privilege-level far jumps.)\n\nIn protected mode, the processor always uses the segment selector part of the\nfar address to access the corresponding descriptor in the GDT or LDT. The descriptor\ntype (code segment, call gate, task gate, or TSS) and access rights determine\nthe type of jump to be performed.\n\nIf the selected descriptor is for a code segment, a far jump to a code segment\nat the same privilege level is performed. (If the selected code segment is at\na different privilege level and the code segment is non-conforming, a general-protection\nexception is generated.) A far jump to the same privilege level in protected\nmode is very similar to one carried out in real-address or virtual-8086 mode.\nThe target operand specifies an absolute far address either directly with a\npointer (ptr16:16 or ptr16:32) or indirectly with a memory location (m16:16\nor m16:32). The operand-size attribute determines the size of the offset (16\nor 32 bits) in the far address. The new code segment selector and its descriptor\nare loaded into CS register, and the offset from the instruction is loaded into\nthe EIP register. Note that a call gate (described in the next paragraph) can\nalso be used to perform far call to a code segment at the same privilege level.\nUsing this mechanism provides an extra level of indirection and is the preferred\nmethod of making jumps between 16-bit and 32-bit code segments.\n\nWhen executing a far jump through a call gate, the segment selector specified\nby the target operand identifies the call gate. (The offset part of the target\noperand is ignored.) The processor then jumps to the code segment specified\nin the call gate descriptor and begins executing the instruction at the offset\nspecified in the call gate. No stack switch occurs. Here again, the target operand\ncan specify the far address of the call gate either directly with a pointer\n(ptr16:16 or ptr16:32) or indirectly with a memory location (m16:16 or m16:32).\n\nExecuting a task switch with the JMP instruction is somewhat similar to executing\na jump through a call gate. Here the target operand specifies the segment selector\nof the task gate for the task being switched to (and the offset part of the\ntarget operand is ignored). The task gate in turn points to the TSS for the\ntask, which contains the segment selectors for the task's code and stack segments.\nThe TSS also contains the EIP value for the next instruction that was to be\nexecuted before the task was suspended. This instruction pointer value is loaded\ninto the EIP register so that the task begins executing again at this next instruction.\n\nThe JMP instruction can also specify the segment selector of the TSS directly,\nwhich eliminates the indirection of the task gate. See Chapter 7 in Intel® 64\nand IA-32 Architectures Software Developer's Manual, Volume 3A, for detailed\ninformation on the mechanics of a task switch.\n\nNote that when you execute at task switch with a JMP instruction, the nested\ntask flag (NT) is not set in the EFLAGS register and the new TSS's previous\ntask link field is not loaded with the old task's TSS selector. A return to\nthe previous task can thus not be carried out by executing the IRET instruction.\nSwitching tasks with the JMP instruction differs in this regard from the CALL\ninstruction which does set the NT flag and save the previous task link information,\nallowing a return to the calling task with an IRET instruction.\n\nIn 64-Bit Mode  -  The instruction's operation size is fixed at 64 bits. If a\nselector points to a gate, then RIP equals the 64-bit displacement taken from\ngate; else RIP equals the zero-extended offset from the far pointer referenced\nin the instruction.\n\nSee the summary chart at the beginning of this section for encoding data and\nlimits.\n\nOperation:\n\nIF near jump\n  IF 64-bit Mode\n     THEN\n       IF near relative jump\n        THEN\n          tempRIP CPL\n     THEN #GP(segment selector); FI;\n  IF segment not present\n     THEN #NP(segment selector); FI;\n  tempEIP CPL) OR (DPL != CPL)\n     THEN #GP(code segment selector); FI;\n  IF segment not present\n     THEN #NP(segment selector); FI;\n  tempEIP CPL\n  or code-segment segment descriptor is non-conforming and DPL != CPL\n       THEN #GP(code segment selector); FI;\n  IF IA32_EFER.LMA = 1 and (code-segment descriptor is not a 64-bit code segment\n  or code-segment segment descriptor has both L-Bit and D-bit set)\n       THEN #GP(code segment selector); FI;\n  IF code segment is not present\n     THEN #NP(code-segment selector); FI;\n  IF instruction pointer is not within code-segment limit\n     THEN #GP(0); FI;\n  tempEIP CPL\n     THEN #GP(segment selector); FI;\n  IF segment not present\n     THEN #NP(segment selector); FI;\n  tempEIP CPL) OR (DPL != CPL)\n     THEN #GP(code segment selector); FI;\n  IF segment not present\n     THEN #NP(segment selector); FI;\n  tempEIP CPL\n  or code-segment segment descriptor is non-conforming and DPL != CPL\n       THEN #GP(code segment selector); FI;\n  IF IA32_EFER.LMA = 1 and (code-segment descriptor is not a 64-bit code segment\n  or code-segment segment descriptor has both L-Bit and D-bit set)\n       THEN #GP(code segment selector); FI;\n  IF code segment is not present\n     THEN #NP(code-segment selector); FI;\n  IF instruction pointer is not within code-segment limit\n     THEN #GP(0); FI;\n  tempEIP

\nMOVDDUP - Move One Double-FP and Duplicate:\n| Opcode/Instruction                    | Op/En| 64/32-bit Mode| CPUID Feature Flag| Description                                   \n| F2 0F 12 /r MOVDDUP xmm1, xmm2/m64    | RM   | V/V           | SSE3              | Move one double-precision floating-point      \n|                                       |      |               |                   | value from the lower 64-bit operand           \n|                                       |      |               |                   | in xmm2/m64 to xmm1 and duplicate.            \n| VEX.128.F2.0F.WIG 12 /r VMOVDDUP xmm1,| RM   | V/V           | AVX               | Move double-precision floating-point          \n| xmm2/m64                              |      |               |                   | values from xmm2/mem and duplicate into       \n|                                       |      |               |                   | xmm1.                                         \n| VEX.256.F2.0F.WIG 12 /r VMOVDDUP ymm1,| RM   | V/V           | AVX               | Move even index double-precision floatingpoint\n| ymm2/m256                             |      |               |                   | values from ymm2/mem and duplicate each       \n|                                       |      |               |                   | element into ymm1.                            \n\nInstruction Operand Encoding:\n| Op/En| Operand 1    | Operand 2    | Operand 3| Operand 4\n| RM   | ModRM:reg (w)| ModRM:r/m (r)| NA       | NA       \n\nDescription:\nThe linear address corresponds to the address of the least-significant byte\nof the referenced memory data. When a memory address is indicated, the 8 bytes\nof data at memory location m64 are loaded. When the register-register form of\nthis operation is used, the lower half of the 128-bit source register is duplicated\nand copied into the 128-bit destination register. See Figure 3-24.\n\nMOVDDUP xmm1, xmm2/m64\n\n| [63:0]| xmm2/m64\nRESULT:\n\n| xmm1[127:64]| xmm2/m64[63:0][127:64]| xmm1[63:0]| xmm2/m64[63:0]xmm1 [63:0]\nOM15997\n\n| Figure 3-24.| MOVDDUP - Move One Double-FP and Duplicate\nIn 64-bit mode, use of the REX.R prefix permits this instruction to access additional\nregisters (XMM8-XMM15).\n\nOperation:\n\nIF (Source = m64)\n  THEN\n     (* Load instruction *)\n     xmm1[63:0] = m64;\n     xmm1[127:64] = m64;\n  ELSE\n     (* Move instruction *)\n     xmm1[63:0] = xmm2[63:0];\n     xmm1[127:64] = xmm2[63:0];\nFI;\nMOVDDUP (128-bit Legacy SSE version)\nDEST[63:0]

ascii adjust after addition        加法的ASCII码调整

add scalar single-fp values        添加标量单 精度浮点 值

convert packed double-fp values to single-fp values        将压缩的双精度浮点值转换为单个精度浮点值

convert packed dw integers to double-fp values        将压缩的双字整数转换为双精度浮点值

convert packed dw integers to single-fp values        将压缩的双字整数转换为单精度浮点值

convert packed single-fp values to dw integers        将压缩的单精度浮点值转换为双字整数

convert packed single-fp values to double-fp values        将压缩的单精度浮点值转换为双精度浮点值

convert scalar double-fp value to dw integer        将标量双 精度浮点 值转换为 双字 整数

convert scalar double-fp value to scalar single-fp value        将标量双 精度浮点 值转换为标量单 精度浮点 值

convert dw integer to scalar double-fp value        将 双字 整数转换为标量双 精度浮点 值

convert dw integer to scalar single-fp value        将 双字 整数转换为标量单 精度浮点 值

packed double-fp add/subtract        对于打包单精度浮点数,对第2对64位值执行加法,第1对位执行减法

convert scalar single-fp value to scalar double-fp value        将标量单 精度浮点 值转换为标量双 精度浮点 值

convert scalar single-fp value to dw integer        将标量单 精度浮点 值转换为 双字 整数

convert with trunc. packed double-fp values to dw integers        用 trunc 转换压缩的双 精度浮点 值到 双字 整数

convert with trunc. packed single-fp values to dw integers        用 trunc 转换将单精度浮点值压缩到双字整数

conv. with trunc. scalar double-fp value to signed dw int        把双精度浮点数变成双字有符号整数,截断取整

convert with trunc. scalar single-fp value to dw integer        把单精度浮点数转为有符号(补码)整数,。截断取整,类似cvtss2si

convert word to doubleword        将字转换为双字

packed single-fp add/subtract        对于打包单精度浮点数,对第2个和第4个32位执行加法,第1和第3个32位执行减法

decimal adjust al after addition        加法后十进制调整 al

decimal adjust al after subtraction        减法后十进制调整 al

decrement by 1        递减1

unsigned divide        无符号数除法

divide packed double-fp values        将压缩的双精度值分开

divide packed single-fp values        将压缩的单个精度浮点值分开

divide scalar double-fp values        划分标量双 精度浮点 值

divide scalar single-fp values        划分标量单 精度浮点 值

dot product of packed double-fp values        打包双精度浮点值的点积

dot product of packed single-fp values        打包单精度浮点值的点积

perform one round of an AES decryption flow        执行 AES 解密一个回合

ds segment override prefix        ds 段覆盖前缀

empty mmx technology state        清空MMX状态

alias for push ebp; mov ebp, esp        替换用于 push ebp; mov ebp, esp

es segment override prefix        ES段跨越前缀

extract packed single-fp value        提取打包的单精度浮点值

compute pow(2,x) - 1        计算浮点栈顶绝对值 (2,x) - 1

absolute value        绝对值

floating point add        浮点加

floating point add and pop        浮点加法并弹出堆栈

load binary coded decimal        加载二进制编码十进制

perform the last round of an AES decryption flow        执行最后一轮AES解密流程

store binary coded decimal integer and pop        存储二进制编码的十进制整数和出栈

change sign        更改符号

clear exceptions        清除异常

fp conditional move - below (cf=1)        fp 条件下移 (cf=1)

fp conditional move - below or equal (cf=1 or zf=1)        fp条件移动 - 低于或等于(cf = 1或zf = 1)

fp conditional move - equal (zf=1)        fp 条件移动相等 (zf=1)

fp conditional move - not below (cf=0)        fp 条件移动-不低于 (cf=0)

fp conditional move - not below or equal (cf=0 and zf=0)        fp条件移动 - 不低于或等于(cf = 0和zf = 0)

fp conditional move - not equal (zf=0)        fp条件移动 - 不等于(zf = 0)

fp conditional move - not unordered (pf=0)        fp 条件移动-非无序 (pf=0)

perform one round of an AES encryption flow        执行一轮AES加密流程

fp conditional move - unordered (pf=1)        fp条件移动 - 无序(pf = 1)

floating point compare        浮点比较

compare floating point values and set eflags        比较浮点值和设置标志位寄存器

compare floating point values and set eflags and pop        比较浮点值并设置标志位寄存器和 出栈

floating point compare and pop        浮点比较和弹出

floating point compare and pop twice        浮点比较并弹出两次

floating point cosine        浮点余弦

decrement floating point stack pointer        递减浮点堆栈指针

disable npx (numeric coprocessor extension) interrupt        禁用 npx (数字协处理器扩展) 中断

floating point divide        浮点除法

perform the last round of an AES encryption flow        执行AES加密流程的最后一轮

floting point divide and pop        浮点除法并弹出堆栈

floating point divide reversed        浮点除法取反

floating point reverse divide and pop        浮点反除并弹出堆栈

enable npx (numeric coprocessor extension) interrupt        启用 npx (数字协处理器扩展) 中断

free floating-point register        释放浮点数寄存器

free floating-point register and pop (undocumented)        释放浮点寄存器并弹出堆栈 (非法)

integer add        整数加法

integer compare        整数比较

integer compare and pop        整数比较和弹出

integer divide        整数除法

assist in aes Inverse Mix Columns        用于协助解密操作 AES 逆列混合

integer divide reserved        整数除法保留

load integer        装入整数

integer multiply        整数相乘

increment floating-point stack pointer        增量浮点堆栈指针

initialize fpu (floating-point unit)        初始化 fpu (浮点单元)

store integer        存储整数

store integer and pop        存储整数和弹出

store integer with truncation and pop        把第一个fpu寄存器的值转换为整数(舍入)并且从fpu堆栈弹出

integer substract        整数减法

integer susbtract reversed        浮点反减整数

assist in AES round key generation        协助生成 AES 轮回秘钥

load floating point value        加载浮点值

load constant onto stack +1.0f        将常量加载到堆栈 +1.0f

load x87 fpu control word        加载 x87 fpu 控制字

load x87 fpu environment        加载 x87 fpu 环境

load constant onto stack: logarithm base 2 (e)        将常量加载到堆栈上: 对数基数 2 (e)

load constant onto stack: logarithm base 2 (10)        将常量加载到堆栈上: 对数基数 2 (10)

load constant onto stack: logarithm base 10 (2)        将常量加载到堆栈上: 对数基数 10 (2)

load constant onto stack: natural logarithm (2)        将常量加载到堆栈上: 自然对数 (2)

load constant onto stack: pi (3.141592...)        将常量加载到堆栈上: pi (3.141592...)

load constant onto stack 0.0f        将常量加载到堆栈 0.0f

binary and operation between src and dst, stores result on dst        与运算

floating point multiply        浮点乘法

floating point multiply and pop        浮点乘法并出栈

disable npx (numeric coprocessor extension) interrupts (8087 only, otherwise, FNOP)        禁用 npx (数字协处理器扩展) 中断 (仅8087 , 否则, FNOP)

enable npx (numeric coprocessor extension) interrupts (8087 only, otherwise, FNOP)        启用 npx (数字协处理器扩展) 中断 (仅8087 , 否则, FNOP)

no operation        无操作

store x87 fpu state        存储 x87 fpu 状态

set protected mode (8087 only, otherwise FNOP)        设置保护模式 (仅8087 , 否则 FNOP)

store x87 fpu control word        存储 x87 fpu 控制字

ascii adjust ax before division        除法的ASCII码调整

bitwise logical and not of packed double-fp values        按位逻辑与不是打包的双精度浮点值

store x87 fpu environment        保存 x87 fpu 环境

store x87 fpu status word        保存 x87 fpu 状态字

partial arctangent and pop        浮点部分反正切并执行出栈操作

partial remainder (for compatibility with i8087 and i287)        浮点部分余数 (用于兼容 i8087 和 i287)

ieee partial remainder        取余数(使用IEEE标准)

partial tangent        浮点部分反正切

round to integer        舍入到整数

restore x87 fpu state        恢复 x87 fpu 状态

fs segment override prefix        FS段跨越前缀

bitwise logical and not of packed single-fp values        计算两个打包值的按位逻辑非

scale        比例

set protected mode        设置保护模式

sine        正弦

sine and cosine        正弦和余弦

square root        平方根

store floating point value        存储浮点值

store floating point value and pop        存储浮点值和弹出

store floating point value and pop (undocumented)        存储浮点值和执行出栈操作 (无记录)

bitwise logical and of packed double-fp values        按位逻辑与打包的双精度浮点值

floating point subtract        浮点减法

subtract and pop        减去并弹出

reverse subtract        反向减法

reverse subtract and pop        反向减去并弹出

test        test

unordered compare floating point values        无序比较浮点值

unordered compare floating point values and set eflags        无序比较浮点值并设置标志位

unordered compare floating point values and set eflags and pop        无序比较浮点值,设置标志位,执行一次出栈操作

unordered compare floating point values and pop        无序比较浮点值并执行一次出栈操作

bitwise logical and of packed single-fp values        计算两个打包值的按位逻辑与

unordered compare floating point values and pop twice        无序比较浮点值并执行两次出栈操作

check pending unmasked floating-point exceptions        检查非屏蔽浮点异常

examine        检查

exchange register contents        交换寄存器内容

restore x87 fpu, mmx, xmm, and mxcsr state        恢复 x87 fpu, mmx, xmm, 及 mxcsr 寄存器状态

save x87 fpu, mmx, xmm, and mxcsr state        保存 x87 fpu, mmx, xmm, 和 mxcsr 寄存器状态

extract exponent and significand        提取指数和有效位数

compute y times log2(x) and pop        计算 y 次数 log2(x) 及执行一次出栈操作

compute y times log2(x+1) and pop        计算 y 次 log2(x+1) 并弹出堆栈

getsec leaf functions        getsec 页函数

adjust rpl field of segment selector        调整段选择器的rpl字段(调整优先级)

gs segment override prefix        gs段覆盖前缀

packed double-fp horizontal add        对操作数的相邻的元素执行双精度浮点加法操作

packed single-fp horizontal add        对操作数的相邻的元素执行单精度浮点加法操作

stop process until external interrupt received        处理器暂停, 直到出现中断或复位信号才继续

packed double-fp horizontal subtract        对操作数的相邻的元素执行双精度浮点减法操作

packed single-fp horizontal subtract        对操作数的相邻的元素执行单精度浮点减法操作

Single byte single-step exception / Invoke ICE        单字节单步异常/调用ICE

signed divide        整数除法,商回送AL,余数回送AH, (字节运算); 或 商回送AX,余数回送DX, (字运算)

signed multiply        整数乘法 结果回送AH和AL(字节运算),或DX和AX(字运算)

blend packed double-fp values        混合打包的双精度值

input from port        I/O端口输入

increment by 1        加 1

input from port to string        从端口输入到字符串

call to interrupt procedure        调用中断过程

int 3, software breakpoint        int 3, 软件断点

call to interrupt if overflow        溢出时调用中断

blend packed single-fp values        混合打包的单精度值

invalIDAte internal caches        使内部缓存无效

invalidate translations derived from ept        使从 ept 派生的翻译无效

invalidate tlb entry        使 TLB 项目失效

invalidate translations based on vpid        基于 vpid 无效翻译

return from interrupt        从中断返回

interrupt return        中断返回

interrupt return (64 bit)        中断返回(64位)

jump short if above (cf=0 and zf=0)        不小于或不等于时转移 (cf=0 和 zf=0)

jump short if above or equal (cf=0)        短跳,大于或等于(cf=0)则跳转

jump short if below/not above nor equal/carry (cf=1)        短跳,如果低于/不高于或等于/进位(cf = 1) 则跳转

variable blend packed double-fp values        可变混合压缩双精度浮点值

jump short if below or equal/not above (cf=1 and zf=1)        短跳, 如果小于或等于/不高于(cf=1 和 zf=1)则跳

jump short if carry (cf=1)        有进位时 (cf=1)跳转

jump short if ecx register is 0        短跳, 如果 ecx 寄存器为 0 则跳

jump short if equal (zf=1)        短跳,如果相等(zf = 1)则跳

jump short if ecx is 0        短跳, 如果 ecx 为0则跳

jump short if greater (zf=0 and sf=of)        短跳,如果大于(zf = 0和sf = of)则跳转

jump short if greater or equal (sf=of)        短跳,如果大于或等于(sf = of),则跳

jge        jge

jump short if less/not greater (sf!=of)        如果小于/不大于(sf!= of)则跳转

jump short if less or equal/not greater (zf=1 or sf!=of)        短跳,如果小于或等于/不大于(zf = 1或sf!= of)跳转

jump        跳转

variable blend packed single-fp values        可变混合打包的单倍精度浮点值

jump to ia-64 instruction set        跳转到ia-64指令集

jump short if not above/equal (cf=1 and zf=1)        短跳, 如果不大于/等于 (cf=1 和 zf=1)

jump short if not above nor equal/below (cf=1)        跳短, 如果不高于或等于/低于 (cf=1)

jump short if not below/above or equal/not carry (cf=0)        短跳, 如果不低于/高于或等于/不进位 (cf=0)

jump short if not below or equal/above (cf=0 and zf=0)        短跳,不小于或不等于/大于时转移 (cf=0 和 zf=0)

jump short if not carry (cf=0)        短跳,如果不进位  (cf=0)

jump short if not equal/not zero (zf=0)        短跳, 如果不等于/不是零 (zf=0)则跳

jump short if not greater/less or equal (zf=1 or sf!=of)        短跳, 如果不大于/小于或等于 (zf=1 或 sf!=of)

jump short if not greater/less (sf!=of)        短跳, 如果不大于/小于 (sf!=of)

check array index against bounds        根据边界检查数组索引

jump short if not less/greater or equal (sf=of)        短跳, 如果不小于/大于或等于 (sf=of)

jump short if not less nor equal/greater (zf=0 and sf=of)        短跳, 不小于或等于/大于 (zf=0 和 sf=of)

jump short if not overflow (of=0)        短跳, 如果不溢出 (of=0)

jump short if not parity/parity odd (pf=0)        短跳,非奇偶跳转 (pf=0)

jump short if not sign (sf=0)        短跳,非负跳转 (sf=0)

jump short if not zero/not equal (zf=0)        短跳, 如果不是零/不等于 (zf=0)则跳

jump short if overflow (of=1)        短跳,溢出跳转 (of=1)

jump short if parity/parity even (pf=1)        短跳,奇偶跳转 (pf=1)

jump short if parity even/parity (pf=1)        短跳, 奇偶 (pf=1)

jump short if parity odd/not parity (pf=0)        短跳,非奇偶 (pf=0)

ascii adjust ax after multiply        乘法的ASCII码调整

bit scan forward        位右扫描

jump short if rcx register is 0        短跳,如果 rcx 寄存器为 0

jump short if sign (sf=1)        短跳,负号跳转 (sf=1)

jump short if zero/equal (zf=1)        短跳,如果零/等于 (zf=1)则跳

load status flags into ah register        标志寄存器传送,把标志装入AH

load acces right byte        加载字节访问权限

load unaligned integer 128 bits        快速从内存加载128位不对准的数据值

load mxcsr register        加载 mxcsr 寄存器

load far pointer        传送目标指针,把指针内容装入SS

load effective address        装入有效地址

one byte alias for mov esp, ebp ; pop ebp        从 mov esp 替换一字节 , ebp ; 弹出 ebp(清除过程堆栈)

bit scan reverse        位反向扫描

load fence        加载隔离

load global descriptor table register        加载全局描述符表寄存器

load interrupt descriptor table register        加载中断描述符表寄存器

load local descriptor table register        加载局部描述符表寄存器

load machine status word        加载机器状态字

load all of the cpu registers        加载所有 cpu 寄存器

loads All Registers from memory address es:edi        从内存地址es:edi加载所有寄存器

byte swap        交换寄存器里字节的顺序

instruction prefix to setup the LOCK pin        封锁总线(设置锁定 pin 的指令前缀)

load string        装入串,把源串中的元素(字或字节)逐一装入AL或AX中

Load string byte        传送字符

Load string doubleword        传送双字

Load string quadword        加载字符串四字

Load string word        传送字

decrement count; jump short if ecx!=0        短跳,计数循环; 如果 ecx!=0

decrement count; jump short if ecx!=0 and zf=1        短跳,递减计数; 如果 ecx!=0 和 zf=1(CX不为零且标志Z=1时循环)

decrement count; jump short if ecx!=0 and zf=0        短跳,递减计数;如果 ecx!=0 和 zf=0(CX不为零且标志Z=0时循环)

bit test        位测试

load segment limit        加载段界限

load task register        加载任务寄存器

store selected bytes of double quadword        存储选定的双字字节

store selected bytes of quadword        存储选定的双字字节

return maximum packed double-fp values        返回最大打包双精度值

return maximum packed single-fp values        计算两个打包值中的最大值

return maximum scalar double-fp value        返回最大标量双精度值

return maximum scalar single-fp value        返回最大标量单精度浮点值

bit test and complement        位测试求反

memory fence        内存隔离

return minimum packed double-fp values        返回最小打包的双精度浮点值

return minimum packed single-fp values        计算两个打包值中的最小值

return minimum scalar double-fp value        返回最小标量双精度浮点值

return minimum scalar single-fp value        返回最小标量单精度浮点值

set up monitor address        设置监控地址

moves data from src to dst        传送字或字节

absolute data moves        绝对数据传送

move aligned packed double-fp values        传送对齐打包的双精度浮点值

move aligned packed single-fp values        传送对准的压缩单精度值

bit test and reset        位测试和重置

move data after swapping bytes        交换字节后传送数据

move doubleword        传送双字

move one double-fp and duplicate        传送64位值,赋值值,使之成为128位值

move quadword from xmm to mmx technology register        将四字从xmmm传送到mmx技术寄存器

move aligned double quadword        把2个对准的四字节整数传送到xmm寄存器或者内存

move unaligned double quadword        把2个不对准的四字节整数传送到xmm寄存器或者内存

move packed single-fp values high to low        传送压缩单精度值从高到低

move high packed double-fp value        把1个双精度值传送到内存或者寄存器的高四字

move high packed single-fp values        传送高的压缩单精度值

move packed single-fp values low to high        传送压缩单精度值从低到高

bit test and set        位测试和设置

move low packed double-fp value        传送低包装的双精度浮点值

move low packed single-fp values        传送低的压缩单精度值

extract packed double-fp sign mask        取打包的双精度浮点符号掩码

extract packed single-fp sign mask        取打包的单精度浮点符号掩码

store double quadword using non-temporal hint        使用非时间提示存储双四字

load double quadword non-temporal aligned hint        加载双四字非时间对齐提示

store doubleword using non-temporal hint        使用非时间提示存储双字

store packed double-fp values using non-temporal hint        使用非时态提示存储打包的双精度浮点值

store packed single-fp values using non-temporal hint        使用非时态提示存储打包的单精度浮点值

store of quadword using non-temporal hint        使用非时间提示存储四字

calls a subroutine, push eip into the stack (esp)        过程调用,调用子例程, 将 eip 压入堆栈 (esp)

move quadword        传送四字

move quadword from mmx technology to xmm register        将字从 mmx 技术传送到 xmm 寄存器

move data from string to string        将数据从字符串移动到字符串

ES:[edi] = (byte)DS:[esi] (esi++, edi++)        传送字符 ES:[edi] = (byte)DS:[esi] (esi++, edi++)

ES:[edi] = (dword)DS:[esi] (esi+=4, edi+=4)/move scalar double-fp value        传送双字 ES:[edi] = (dword)DS:[esi] (esi+=4, edi+=4)/移动标量双精度值

move packed single-fp high and duplicate        传送128位值,复制第2个和第4个32位数据元素

move packed single-fp low and duplicate        传送128位值,复制第1个和第3个32位数据元素

move scalar single-fp values        移动标量单单精度值

ES:[edi] = (word)DS:[esi] (esi+=2, edi+=2)        传送字 ES:[edi] = (word)DS:[esi] (esi+=2, edi+=2)

call procedure        调用过程

move with sign-extension        先符号扩展,再传送

move unaligned packed double-fp values        不对准的双精度值传送到xmm寄存器或者内存

move unaligned packed single-fp values        移动不对准的压缩单精度值

move dst register size padding with zeroes        先零扩展,再传送

compute multiple packed sums of absolute difference        计算绝对差分的八个偏移总和

unsigned multiply        无符号乘法 结果回送AH和AL(字节运算),或DX和AX(字运算)

multiply packed double-fp values        多重打包的双精度浮点值

multiply packed single-fp values        多重打包的单精度浮点值

multiply scalar double-fp values        乘以标量双精度浮点值

convert byte to word        CBW 字节转换为字. (把AL中字节的符号扩展到AH中去)

multiply scalar single-fp value        乘以标量单精度浮点值

monitor wait        监视器等待

two's complement negation        求补

one's complement negation        取反

logical inclusive or        或运算

bitwise logical or of double-fp values        按位逻辑异或双精度浮点值

bitwise logical or of single-fp values        计算两个打包值的按位逻辑或

output to port        I/O端口输出

output string to port        输出字符串到端口

ascii adjust al after subtraction        减法的ASCII码调整

sign extends eax into edx (convert doubleword to quadword)        双字扩展. (把EAX中的字的符号扩展到EDX中去)

Output string byte to port        输出字符串字节到端口

Output string doubleword to port        输出字符串双字到端口

Output string word to port        输出字符串字到端口

packed absolute value        打包的绝对值

pack with signed saturation        带符号饱和的包

pack with unsigned saturation        无符号饱和的包

sign extend eax into rax        符号扩展 eax 到 rax

add packed integers        将打包带符号双字整数相加

add packed quadword integers        将打包带符号四字整数相加

add packed signed integers with signed saturation        将打包带符号字整数相加

add packed unsigned integers with unsigned saturation        将打包带符号字节整数相加

packed align right        打包右对齐

logical and        逻辑与

clear carry flag        清进位标志位

logical and not        逻辑与非

spin loop hint        自旋转循环提示

average packed integers        平均打包整数

variable blend packed bytes        可变混合打包字节

blend packed words        混合打包的字

performs a carry-less multiplication of two 64-bit polynomials over the finite field GF(2).        在有限域 GF (2) 上执行两个64位多项式的无进位乘法.

compare packed data for equal        比较打包的数据是否相等

compare packed qword data for equal        比较打包的四字数据是否相等

clear direction flag        清方向标志位

packed compare explicit length strings, return index        打包比较显式长度字符串, 返回索引

packed compare explicit length strings, return mask        打包比较显式长度字符串,返回掩码

compare packed signed integers for greater than        比较打包的有符号整数

packed compare implicit length strings, return index        打包比较隐式字符串长度,返回索引

packed compare implicit length strings, return mask        打包比较隐式字符串长度, 返回掩码

extract a byte from an XMM register and insert the value into a general-purpose register or memory        从 XMM 寄存器中提取一个字节, 并将该值插入通用寄存器或内存中

extract a dword from an XMM register and insert the value into a general-purpose register or memory        从XMM寄存器中提取一个双字并将该值插入通用寄存器或存储器中

flush cache line        刷新缓存行

extract a qword from an XMM register and insert the value into a general-purpose register or memory        从XMM寄存器中提取一个四字,并将该值插入通用寄存器或存储器中

extract a word from an XMM register and insert the value into a general-purpose register or memory        从XMM寄存器中提取一个字并将该值插入通用寄存器或存储器中

packed horizontal add        打包水平相加

packed horizontal add and saturate        水平方向上进行饱和加法

packed horizontal word minimum        打包的水平字最小值

packed horizontal subtract        将包含有符号整型的参数相减

packed horizontal subtract and saturate        打包水平饱和减法

insert a byte value from a register or memory into an XMM register        将寄存器或内存中的字节值插入 XMM 寄存器中

clear interrupt flag        清中断允许位

insert a dword value from a register or memory into an XMM register        将寄存器或存储器中的双字值插入XMM寄存器

insert a qword value from a register or memory into an XMM register        将寄存器或内存中的四字值插入 XMM 寄存器中

insert a word value from a register or memory into an XMM register        将寄存器或存储器的字值插入XMM寄存器

multiply and add packed signed and unsigned bytes        乘法并添加打包的有符号和无符号字节

multiply and add packed integers        打包整数乘法和加法

maximum of packed signed byte integers        最大的打包有符号字节整数

maximum of packed signed dword integers        最大的打包有符号双字整数

maximum of packed signed word integers        最大的打包符号字整数

maximum of packed unsigned byte integers        最大的打包无符号字节整数

maximum of packed unsigned dword integers        最大的打包无符号双字整数

clear task-switched flag in cr0        清除 cr0 中的任务交换标志

maximum of packed unsigned word integers        最大的打包无符号字整数

minimum of packed signed byte integers        最小的打包有符号字节整数

minimum of packed signed dword integers        最小的打包签名双字整数

minimum of packed signed word integers        最小的打包符号字整数

minimum of packed unsigned byte integers        最小的打包无符号字节整数

minimum of packed unsigned dword integers        最小的打包无符号双字整数

minimum of packed unsigned word integers        最小的打包无符号字整数

move byte mask        传送字节掩码

sign extend the lower 8-bit integer of each packed dword element into packed signed dword integers        符号将每个压缩双字元素的低8位整数扩展为压缩有符号双字整数

sign extend the lower 8-bit integer of each packed qword element into packed signed qword integers        符号将每个打包的四字元素的低8位整数扩展为压缩的有符号四字整数

complement carry flag        进位标志取反

sign extend the lower 8-bit integer of each packed word element into packed signed word integers        符号将每个压缩字元素的低8位整数扩展为压缩符号字整数

sign extend the lower 32-bit integer of each packed qword element into packed signed qword integers        符号将每个打包的四字元素的低32位整数扩展为压缩的有符号四字整数

sign extend the lower 16-bit integer of each packed dword element into packed signed dword integers        符号将每个压缩双字元素的低16位整数扩展为压缩有符号双字整数

sign extend the lower 16-bit integer of each packed qword element into packed signed qword integers        符号将每个打包的四字元素的低16位整数扩展为压缩的有符号四字整数

zero extend the lower 8-bit integer of each packed dword element into packed signed dword integers        零将每个打包双字元素的较低8位整数扩展为打包有符号双字整数

zero extend the lower 8-bit integer of each packed qword element into packed signed qword integers        零将每个打包的四字元素的低8位整数扩展为压缩的有符号四字整数

zero extend the lower 8-bit integer of each packed word element into packed signed word integers        零将每个压缩字元素的低8位整数扩展为压缩符号字整数

zero extend the lower 32-bit integer of each packed qword element into packed signed qword integers        零将每个打包的四字元素的低32位整数扩展为压缩的有符号四字整数

zero extend the lower 16-bit integer of each packed dword element into packed signed dword integers        零将每个打包双字元素的低16位整数扩展为打包有符号双字整数

zero extend the lower 16-bit integer of each packed qword element into packed signed qword integers        零将每个打包的四字元素的低16位整数扩展为压缩的有符号四字整数

conditional move - above/not below nor equal (cf=0 and zf=0)        条件移动-高于/不低于或等于 (cf=0 和 zf=0)

packed multiply high with round and scale        乘以16位有符号整型,并右移结果

multiply packed unsigned integers and store high result        将打包的无符号整数相乘并存储高结果

multiply packed signed integers and store high result        乘以打包的有符号整数并存储高位结果

multiply packed signed dword integers and store low result        将打包的有符号双字整数相乘并存储低结果

multiply packed signed integers and store low result        乘以打包的有符号整数并存储低位结果

multiply packed unsigned dw integers        将打包的无符号双字整数相乘

pops last element of stack and stores the result in argument        把字弹出堆栈

pop all general-purpose registers        把EDI,ESI,EBP,ESP,EBX,EDX,ECX,EAX依次弹出堆栈

pop all general-purpose registers         弹出所有通用寄存器

conditional move - above or equal/not below/not carry (cf=0)        条件移动-高于或等于/不低于/不进位 (cf=0)

bit population count        位人口计数

pop stack into flags register        标志出栈

pop stack into eflags register        弹出堆栈到eflags寄存器中

pop stack into rflags register        弹出栈到rflags寄存器中

bitwise logical or        按位逻辑或

prefetch data into caches        将数据预取到缓存中

add with carry        带进位加法

conditional move - below/not above nor equal/carry (cf=1)        条件移动-低于/不高于或等于/进位 (cf=1)

compute sum of absolute differences        计算绝对差值的总和

packed shuffle bytes        打包的排序字节

shuffle packed doublewords        任意排列打包双字

shuffle packed high words        任意排列打包高位字

shuffle packed low words        任意排列打包低位字

shuffle packed words        打包字顺序的任意排列

packed sign        打包标志

shift packed data left logical        将打包数据逻辑左移

shift double quadword left logical        移动双字逻辑左移

conditional move - below or equal/not above (cf=1 or zf=1)        条件移动-低于或等于/不高于 (cf=1 or zf=1)

shift packed data right arithmetic        移动打包的数据算术右移

shift packed data right logical        将打包数据向右逻辑传送

shift double quadword right logical        移动双字逻辑右移

subtract packed integers        减去压缩的整数

conditional move - carry/below/not above or equal (cf=1)        条件移动-进位/低于/不高于或等于 (cf=1)

subtract packed quadword integers        减去压缩的四字整数

subtract packed signed integers with signed saturation        用符号饱和度减去压缩的带符号整数

subtract packed unsigned integers with unsigned saturation        用无符号饱和度减去压缩的无符号整数

logical compare        逻辑比较

unpack high data        解压缩高数据

conditional move - equal/zero (zf=1)        条件移动 - 等于/零(zf = 1)

unpack low data        解压缩低数据

push word, doubleword or quadword onto the stack        将单字,双字或四字压入堆栈

push all general-purpose registers        压入所有通用寄存器

push all general-purpose registers         压入所有通用寄存器

push flags register onto the stack        将标志推入堆栈

conditional move - greater/not less nor equal (zf=0 and sf=of)        条件移动 - 大于/不小于或等于(zf = 0和sf = of)

push eflags register onto the stack        将标志位寄存器推入堆栈

push rflags register onto the stack        将 rflags 寄存器推入堆栈

logical exclusive or        逻辑异或

rotate bits left (with CF)        向左位移 (带 CF)

compute reciprocals of packed single-fp values        计算打包值的倒数

compute reciprocal of scalar single-fp values        计算标量单 精度浮点 值的反值

rotate bits right (with CF)        向右旋转位 (带 CF)

read from model specific register        从模型特定寄存器读取

read performance-monitoring counters        读取性能监视计数器

read random number        读取随机数

conditional move - greater or equal/not less (sf=of)        条件移动 - 大于或等于/不小于(sf = of)

read time-stamp counter        读取时间戳计数器

read time-stamp counter and processor id        读取时间戳计数器和处理器 id

repeats next instruction ECX times        重复下一条指令ECX时间

repeat string        重复字符串

repeat string operation prefix        重复字符串操作前缀

return from subroutine. pop 4 bytes from esp and jump there.        从子例程返回。从 esp 弹出4个字节并跳到那里.

return from procedure        从程序返回

conditional move - less/not greater nor equal (sf!=of)        条件移动-不大于或等于  (sf!=of)

access to new 8-bit registers        访问新的8位寄存器

extension of r/m field, base field, or opcode reg field        r / m字段,基本字段或操作码注册字段的扩展

extension of modr/m reg field        modr/m reg 字段扩展

rex.r and rex.b combination        rex.r 和 rex.b 组合

rex.r and rex.x combination        rex.r 和 rex.x 组合

rex.r, rex.x and rex.b combination        rex.r, rex.x 和 rex.b 组合

64 bit operand size        64位操作数大小

rex.w and rex.b combination        rex.w 和 rex.b 组合

rex.w and rex.r combination        rex.w 和 rex.r 组合

rex.w, rex.r and rex.b combination        rex.w, rex.r 和 rex.b 组合

conditional move - less or equal/not greater (zf=1 or sf!=of)        条件移动 - 小于或等于/不大于(zf = 1或sf!= of)

rex.w, rex.r and rex.x combination        rex.w, rex.r 和 rex.x 组合

rex.w, rex.r, rex.x and rex.b combination        rex.w, rex.r, rex.x 和 rex.b 组合

rex.w and rex.x combination        rex.w 和 rex.x 组合

rex.w, rex.x and rex.b combination        rex.w, rex.x 和 rex.b 组合

extension of sib index field        sib 索引字段扩展

rex.x and rex.b combination        rex.x和rex.b组合

rotate bits left        向左旋转位

rotate bits right        向右旋转位

round packed double-fp values        四舍五入的双精度浮点值

round packed single-fp values        四舍五入的单精度浮点值

conditional move - not above/below or equal (cf=1 or zf=1)        条件移动-不高于/低于或等于 (cf=1 或 zf=1)

round scalar double-fp values        圆形标量双 精度浮点 值

round scalar single-fp values        圆形标量单 精度浮点 值

resume from system management mode        从系统管理模式恢复

compute recipr. of square roots of packed single-fp values        单精度浮点数的开方的倒数

compute recipr. of square root of scalar single-fp value        计算打包值的平方根倒数

read time-stamp counter into edx:eax        将时间戳计数器读入到 edx:eax

store ah into flags        存储 ah 到标志位

arithmetic left shift        算术左位移

set al if carry        设置如果进位

arithmetic right shift        算术右位移

conditional move - not above nor equal/below/carry (cf=1)        条件移动-不高于或等于/低于/进位 (cf=1)

integer subtraction with borrow        带借位的整数相减

scan string        扫描字符串

set byte on condition - above/not below nor equal (cf=0 and zf=0)        条件上设置字节 - 高于/不低于或等于(cf = 0和zf = 0)

set byte on condition - above or equal/not below/not carry (cf=0)        条件上设置字节 - 高于或等于/不低于/不进位(cf = 0)

set byte on condition - below/not above nor equal/carry (cf=1)        条件上设置字节 - 低于/不高于或等于/进位(cf = 1)

set byte on condition - below or equal/not above (cf=1 or zf=1)        条件上设置字节 - 低于或等于/不高于(cf = 1或zf = 1)

adds src and dst, stores result on dst        src和dst加法,将结果存储在dst中

conditional move - not below/above or equal/not carry (cf=0)        条件移动 - 不低于/高于或相等/不进位(cf = 0)

set byte on condition - carry/below/not above nor equal (cf=1)        条件上设置字节 - 进位/低于/不高于或等于(cf = 1)

set byte on condition - equal/zero (zf=1)        条件设置字节 - 等于/零(zf = 1)

set byte on condition - greater/not less nor equal (zf=0 and sf=of)        条件上设置字节 - 大于/小于或等于(zf = 0和sf = of)

set byte on condition - greater or equal/not less (sf=of)        设置字节条件 - 大于或等于/不小于(sf = of)

set byte on condition - less/not greater nor equal (sf!=of)        条件上设置字节 - 小于/不大于或等于(sf!= of)

set byte on condition - less or equal/not greater (zf=1 or sf!=of)        条件上设置字节 - 小于或等于/不大于(zf = 1或sf!= of)

set byte on condition - not above/below or equal (cf=1 or zf=1)        条件上设置字节-不高于/低于或等于 (cf=1 或 zf=1)

set byte on condition - not above nor equal/below/carry (cf=1)        条件上设置字节 - 不高于或等于/低于/进位(cf = 1)

set byte on condition - not below/above or equal/not carry (cf=0)        条件上设置字节 - 不低于/高于或相等/不进位(cf = 0)

set byte on condition - not below nor equal/above (cf=0 and zf=0)        条件上设置字节 - 不低于或等于/高于(cf = 0和zf = 0)

conditional move - not below nor equal/above (cf=0 and zf=0)        条件移动 - 不低于或等于/高于(cf = 0和zf = 0)

set byte on condition - not carry/above or equal/not below (cf=0)        条件上设置字节 - 非进位/大于或等于/不小于(cf = 0)

set byte on condition - not equal/not zero (zf=0)        设置字节条件 - 不等于/非零(zf = 0)

set byte on condition - not greater/less or equal (zf=1 or sf!=of)        条件上设置字节 - 不大于/小于或等于(zf = 1或sf!= of)

set byte on condition - not greater nor equal/less (sf!=of)        条件上设置字节 - 不大于或等于/小于(sf!= of)

set byte on condition - not less/greater or equal (sf=of)        条件上设置字节 - 不小于/大于或等于(sf = of)

set byte on condition - not less nor equal/greater (zf=0 and sf=of)        条件上设置字节 - 不小于等于/大于(zf = 0和sf = of)

set byte on condition - not overflow (of=0)        设置字节条件 - 不溢出(的= 0)

set byte on condition - not parity/parity odd (pf=0)        设置字节开启条件 - 非校验/奇偶校验(pf = 0)

set byte on condition - not sign (sf=0)        条件上设置字节-无符号 (sf=0)

set byte on condition - not zero/not equal (zf=0)        设置字节条件 - 非零/不等于(zf = 0)

conditional move - not carry/above or equal/not below (cf=0)        条件移动 - 不进位/大于或等于/不小于(cf = 0)

set byte on condition - overflow (of=1)        在条件溢出时设置字节 (of=1)

set byte on condition - parity/parity even (pf=1)        设置条件字节 - 校验/奇偶校验(pf = 1)

set byte on condition - parity even/parity (pf=1)        设置字节的条件 - 奇偶校验/校验(pf = 1)

set byte on condition - parity odd/not parity (pf=0)        设置字节的条件 - 奇偶校验/无奇偶校验(pf = 0)

set byte on condition - sign (sf=1)        条件设置字节 - 符号(sf = 1)

set byte on condition - zero/equal (zf=1)        条件设置字节 - 零/相等(zf = 1)

store fence        存储栏

store global descriptor table register        存储全局描述符表寄存器

logic left shift (0 padding)        逻辑左位移 (0 填充)

double precision shift left        双精度向左位移

conditional move - not equal/not zero (zf=0)        条件移动-不等于/非零 (zf=0)

logic right shift (0 padding)        逻辑右位移 (0 填充)

double precision shift right        双精度向右位移

shuffle packed double-fp values        无序压缩的双 精度浮点 值

shuffle packed single-fp values        无序压缩的单 精度浮点 值

store interrupt descriptor table register        存储中断描述符表寄存器

store local descriptor table register.        存储本地描述符表寄存器.

store machine status word        存储机器状态字

compute square roots of packed double-fp values        计算压缩双精度浮点值的平方根

compute square roots of packed single-fp values        计算打包值的平方根

compute square root of scalar double-fp value        计算标量双精度浮点值的平方根

conditional move - not greater/less or equal (zf=1 or sf!=of)        有条件的移动 - 不大于/小于或等于(zf = 1 或 sf!= of)

compute square root of scalar single-fp value        计算标量单精度浮点值的平方根

ss segment override prefix        ss 段覆盖前缀

set carry flag        置进位标志位

set direction flag        置方向标志位

set interrupt flag        置中断允许位

store mxcsr register state        存储 mxcsr 寄存器状态

store string        存储字符串

store string byte        存储字符串字节

store string dword        存储字符串双字

store string quadword        存储字符串四字

conditional move - not greater nor equal/less (sf!=of)        有条件的移动 - 不大于或等于/小于(sf!= of)

store string word        存储字符串字

store task register        存储任务寄存器

substract src and dst, stores result on dst        减去 src 和 dst ,将结果存储在 dst 中

subtract packed double-fp values        减去压缩的双精度值

subtract packed single-fp values        减去压缩的单个精度值

subtract scalar double-fp values        减去标量精度值

subtract scalar single-fp values        减去标量单精度值

swap gs base register        交换gs基址寄存器

fast system call        快速系统调用

conditional move - not less/greater or equal (sf=of)        有条件的移动 - 不小于/大于或等于(sf = of)

fast return from fast system call        从快速系统调用中快速返回

return from fast system call        从快速系统调用返回

set eflags after comparing two registers (AF, CF, OF, PF, SF, ZF)        比较两个寄存器后设置标志位寄存器 (AF, CF, OF, PF, SF, ZF)

unordered compare scalar double-fp values and set eflags        无序比较标量双精度浮点值并设置标志位寄存器

unordered compare scalar single-fp values and set eflags        比较标量值(包括非法值)并设置标志位寄存器

undefined instruction        未定义的指令

unpack and interleave high packed double-fp values        解压缩并交织高压缩的双精度浮点值

unpack and interleave high packed single-fp values        解包并交织高压缩单精度浮点值

unpack and interleave low packed double-fp values        解压缩并交织低压缩双精度浮点值

conditional move - not less nor equal/greater (zf=0 and sf=of)        有条件的移动 - 不小于或等于/大于(zf = 0和sf = of)

unpack and interleave low packed single-fp values        解压缩并交织低压缩单精度浮点值

verify a segment for reading        验证要读取的段

verify a segment for writing        验证要写入的段

call to vm monitor        调用vm 监视器

clear virtual-machine control structure        清晰的虚拟机控制结构

launch virtual machine        启动虚拟机

load pointer to virtual-machine control structure        加载指向虚拟机控制结构的指针

store pointer to virtual-machine control structure        存储指向虚拟机控制结构的指针

read field from virtual-machine control structure        从虚拟机控制结构读取字段

resume virtual machine        恢复虚拟机

conditional move - not overflow (of=0)        条件移动-不溢出 (of=0)

write field to virtual-machine control structure        写字段到虚拟机控制结构

leave vmx operation        离开 vmx 操作(释放栈帧)

enter vmx operation        输入 vmx 操作

stop process execution until TEST pin activated        当芯片引线TEST为高电平时使CPU进入等待状态

write back and invalidate cache        回写并使缓存无效

write to model specific register        写入模块特定的寄存器

exchange and add        先交换再累加( 结果在第一个操作数里 )

exchange register/memory with register        交换两个操作数的数据( 寄存器/内存)

get value of extended control register        获取扩展控件寄存器的值

table look-up translation        查表指令

conditional move - not parity/parity odd (pf=0)        条件移动-非校验/奇偶校验 (pf=0)

bitwise logical xor for double-fp values        对于双精度浮点值,按位逻辑异或

bitwise logical xor for single-fp values        计算两个打包值的按位逻辑异或

restore processor extended states        恢复处理器扩展状态

save processor extended states        保存处理器扩展状态

set extended control register        设置扩展控件寄存器

add packed double-fp values        将打包双精度浮点值相加

conditional move - not sign (sf=0)        条件移动-无符号 (sf=0)

conditional move - not zero/not equal (zf=0)        条件移动-非零/不等于 (zf=0)

conditional move - overflow (of=1)        有条件移动 - 溢出(of = 1)

conditional move - parity/parity even (pf=1)        条件移动 - 奇偶/奇偶校验(pf = 1)

conditional move - parity even/parity (pf=1)        有条件移动 - 奇偶校验/校验(pf = 1)

conditional move - parity odd/not parity (pf=0)        条件移动 - 奇偶校验/非奇偶校验(pf = 0)

conditional move - sign (sf=1)        有条件移动 - 符号(sf = 1)

conditional move - zero/equal (zf=1)        条件移动 - 零/等于(zf = 1)

compare two operands        比较两个操作数

compare packed double-fp values        比较压缩的双精度浮点值

add packed single-fp values        添加压缩的单精度值

compare packed single-fp values        比较打包值

compare string operands        比较字符串操作数

cmp DS:[esi], (byte)ES:[edi] (esi++, edi++)        cmp DS:[esi], (byte)ES:[edi] (esi++, edi++)

cmp DS:[esi], (dword)ES:[edi] (esi+=4, edi+=4)/compare scalar double-fp values        cmp DS:[esi], (dword)ES:[edi] (esi+=4, edi+=4)/比较标量双精度值

cmp DS:[rsi], (qword)ES:[rdi] (rsi+=8, rdi+=8)        cmp DS:[rsi], (qword)ES:[rdi] (rsi+=8, rdi+=8)

compare scalar single-fp values        比较标量单 精度浮点 值

cmp DS:[esi], (word)ES:[edi] (esi+=2, edi+=2)        比较 DS:[esi], (word)ES:[edi] (esi+=2, edi+=2)

compare and exchange        比较和交换

compare and exchange bytes        比较和交换字节数

add scalar double-fp values        将量标双精度浮点值相加

compare scalar ordered double-fp values and set eflags        比较标量有序的双精度浮点值并设置标志位寄存器

compare scalar ordered single-fp values and set eflags        比较标量排序的单精度值和设置标志位寄存器

cpu identification        cpu 识别

sign extends rax into rdx (convert quadword to double-quadword)        符号将rax扩展为rdx(将四字转换为双四字)

accumulate crc32 value        累计 crc32 值

cs segment override prefix        cs段覆盖前缀

convert packed double-fp values to dw integers        将压缩的双精度浮点值转换为双字整数

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