Makefile: Introduction to basic

Makefile: Introduction to basic

This is a very simple demo about makefile.

How does the makefile and make works?

edit : main.o kbd.o command.o display.o insert.o search.o files.o utils.o
       cc -o edit main.o kbd.o command.o display.o insert.o search.o files.o utils.o
       
main.o : main.c defs.h
  cc -c main.c
kbd.o : kbd.c defs.h command.h
  cc -c kbd.c
command.o : command.c defs.h buffer.h
  cc -c command.c
display.o : display.c defs.h buffer.h
  cc -c display.c
insert.o : insert.c defs.h buffer.h
  cc -c insert.c
search.o : search.c defs.h buffer.h
  cc -c search.c
files.o : files.c defs.h buffer.h command.h
  cc -c files.c
utils.o : utils.c defs.h
  cc -c utils.c

clean : 
  rm edit main.o kbd.o command.o display.o insert.o search.o files.o utils.o

When we call the make command, the target file is edit, and the dependent file is main.o kbd.o command.o display.o insert.o search.o files.o utils.o. If main.o is not existed, main.o file will be created by cc -c main.c command. The dependent file of main.o is main.c and defs.h. The followed dependent file of edit will be created as the same way if they are not exited. If the dependent file change, the target file will be created again when make is called.
When we call the make clean, the shell will run the command under clean : rm edit main.o kbd.o command.o display.o insert.o search.o files.o utils.o. \

Use the variable and auto-derivation.

object = main.o kbd.o command.o display.o insert.o search.o files.o utils.o
edit : $(object)
       cc -o $(object)
       
main.o :  defs.h
kbd.o : defs.h command.h
command.o : defs.h buffer.h
display.o : defs.h buffer.h
insert.o : defs.h buffer.h
search.o : defs.h buffer.h
files.o : defs.h buffer.h command.h
utils.o : defs.h

.PHONY : clean
clean : 
  rm edit $(object)

This version will works as the upper makefile. The make command will automatically derivate command and find files needed when it need depented files. For example, when it created the main.o, the main.c will be found and cc will be called.
Using the varible will simply the the code. It is simple as I write in this demo.

Another style of makefiles

object = main.o kbd.o command.o display.o insert.o search.o files.o utils.o
edit : $(object)
       cc -o $(object)
       
$(object): defs.h
kbd.o command.o files.o : command.h
display.o insert.o files.o : buffer.h

.PHONY : clean
clean : 
  rm edit $(object)

Reference

How to write makefile Chen Hao

End

The brief introduction about makefile is over here.