Makefile(二)-- 变量

  • 学习变量

1.变量
  Makefile中定义的变量,就像是C/C++语言中的宏一样,它代表了一个文本字串,在Makefile中执行的时候其会自动原模原样地展开在所使用的地方。其与C/C++所不同的是,你可以在Makefile中改变其值。在Makefile中,变量可以使用在“目标”,“依赖目标”, “命令”或是Makefile的其它部分中。

  变量只能是字符串类型,命名可以包含字符、数字,下划线(可以是数字开头),但不应该含有“:”、“#”、“=”或是空字符(空格、回车等)。变量是区分英文字母大小写的,“foo”、“Foo”和“FOO”是三个不同的变量名。在Makefile中存在一些预定义的变量,主要分为两类:自动变量和特殊变量。

1.1.Automatic Variables

  Automatic variables are set by make after a rule is matched. They provide access to
elements from the target and prerequisite lists so you don’t have to explicitly specify
any filenames. They are very useful for avoiding code duplication, but are critical
when defining more general pattern rules (discussed later).

  There are seven “core” automatic variables:

  • $@ The filename representing the target.
  • $% The filename element of an archive member specification.
  • $< The filename of the first prerequisite.
  • $? The names of all prerequisites that are newer than the target, separated by spaces.
  • $^ The filenames of all the prerequisites, separated by spaces. This list has duplicate filenames removed since for most uses, such as compiling, copying, etc.,
    duplicates are not wanted.
  • $+ Similar to $^, this is the names of all the prerequisites separated by spaces,
    except that $+ includes duplicates. This variable was created for specific situations such as arguments to linkers where duplicate values have meaning.
  • $* The stem of the target filename. A stem is typically a filename without its suffix.
    (We’ll discuss how stems are computed later in the section “Pattern Rules.”) Its
    use outside of pattern rules is discouraged.

1.2.预定义变量

  CFLAGS、CC、MAKE、SHELL等,这些变量已经有了系统预定义好的值,我们也可以给它们重新赋值,如CC的默认值是gcc。
在这里插入图片描述

CFLAGS, CPPFLAGS, CXXFLAGS 区别

  • CFLAGS: Extra flags to give to the C compiler.
  • CXXFLAGS: Extra flags to give to the C++ compiler.
  • CPPFLAGS: Extra flags to give to the C preprocessor and programs that use it (the C and Fortran compilers).

  Note: CPP: Program for running the C preprocessor, with results to standard output; default ‘$(CC) -E’.

These variables are used by the implicit rules of make

Compiling C programs
n.o is made automatically from n.c with a recipe of the form
‘$(CC) $(CPPFLAGS) $(CFLAGS) -c’.

Compiling C++ programs
n.o is made automatically from n.cc, n.cpp, or n.C with a recipe of the form
‘$(CXX) $(CPPFLAGS) $(CXXFLAGS) -c’.
We encourage you to use the suffix ‘.cc’ for C++ source files instead of ‘.C’.

1.3. Standard make variables

MAKEFLAGS: MAKEFLAGS

  Flags such as ‘-s’ and ‘-k’ are passed automatically to the sub-make through the variable MAKEFLAGS. This variable is set up automatically by make to contain the flag letters that make received. Thus, if you do ‘make -ks’ then MAKEFLAGS gets the value ‘ks’.

  As a consequence, every sub-make gets a value for MAKEFLAGS in its environment. In response, it takes the flags from that value and processes them as if they had been given as arguments.

Note: Summary of Make Options

2.变量赋值

2.1.变量有四种赋值方式:

  • 简单赋值( := ) :常规赋值方式,只对当前语句的变量有效;
    • 变量的定义使用 “name := value”
  • 递归赋值( = ) :赋值语句可能影响多个变量,所有目标变量相关的其他变量都受影响;
  • 条件赋值( ?= ) :如果变量未定义,则使用符号中的值定义变量;如果该变量已经赋值,则该赋值语句无效;
  • 追加赋值( += ):原变量用空格隔开的方式追加一个新值;

2.2.案例分析

  简单扩展变量:用这种方式定义的变量,会在变量的定义点,按照被引用的变量的当前值进行展开。

m := mm 
x := $(m) 
y := $(x) bar 
x := later 
all:;echo $(x) $(y)
---> $x---> later
-----> $y---->mm bar (只管变量定义时的值,若将y:=...==> y=...,则会变成later bar)

  递归展开变量:用=或define关键字都可以定义这种变量,如果变量的定义引用了其它的变量,那么引用会一直展开下去,直到找到被引用的变量的最新的定义,并以此作为改变量的值返回。

eg:
var = I love
variable = linux
var += $(variable)
variable = magic

all:;echo $(var)
-----> I love magic;

条件赋值变量:赋默认值,如果没有初始化该变量,就给它赋上默认值。如:

ARCH=arm
ARCH ?= i386
all:
     @echo $(ARCH)
输出:
arm

而
ARCH=
ARCH ?= i386
all:
     @echo $(ARCH)
输出:
i386

3.后缀替换

  使用指定字符串替换变量中的后缀:语法规则: $(var:cc=o)或 $ {src1:cc=o}
替换表达式中不能有任何的空格,make中支持使用${}对变量进行取值

#后缀替换
src1 := a.c b.c c.c 
obj1 := $(src1:%.c=%.o)                                                                                                                                   

test1 :
    @echo "obj1 => $(obj1)"

参考资料:
https://wiki.ubuntu.org.cn/跟我一起写Makefile:使用变量

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