zynq ebaz4205百兆网口通信

第一章 zynq学习 ebaz4205百兆网口通信

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前言

闲鱼上50块钱淘的矿板，用来学习zynq再合适不过啦

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一、工程搭建

1.芯片选择xc7z010clg400-l

2.创建block design

3.配置串口

4.配置百兆网口EMIO

5.SD卡配置

6.LED配置

7.NAND flash配置

timing设置

8.时钟配置

9.DDR配置

10.block design

二、代码

1.顶层代码

代码如下（示例）：

	wire 			FCLK_CLK0_0;
	wire 			FCLK_RESET0_N_0;
	
	wire	[7:0]	txd;
	
	assign ENET0_GMII_TXD_0 = txd[3:0];
	
	design_1_wrapper U_DESIGN_1_WRAPPER(
		.DDR_0_addr                 ( DDR_0_addr                 ),	
		.DDR_0_ba                   ( DDR_0_ba                   ),	
		.DDR_0_cas_n                ( DDR_0_cas_n                ),	
		.DDR_0_ck_n                 ( DDR_0_ck_n                 ),	
		.DDR_0_ck_p                 ( DDR_0_ck_p                 ),	
		.DDR_0_cke                  ( DDR_0_cke                  ),	
		.DDR_0_cs_n                 ( DDR_0_cs_n                 ),	
		.DDR_0_dm                   ( DDR_0_dm                   ),	
		.DDR_0_dq                   ( DDR_0_dq                   ),	
		.DDR_0_dqs_n                ( DDR_0_dqs_n                ),	
		.DDR_0_dqs_p                ( DDR_0_dqs_p                ),	
		.DDR_0_odt                  ( DDR_0_odt                  ),	
		.DDR_0_ras_n                ( DDR_0_ras_n                ),	
		.DDR_0_reset_n              ( DDR_0_reset_n              ),	
		.DDR_0_we_n                 ( DDR_0_we_n                 ),	
		.ENET0_GMII_RXD_0           ( {4'd0,ENET0_GMII_RXD_0}    ),	
		.ENET0_GMII_RX_CLK_0        ( ENET0_GMII_RX_CLK_0        ),	
		.ENET0_GMII_RX_DV_0         ( ENET0_GMII_RX_DV_0         ),	
		.ENET0_GMII_TXD_0           ( txd                        ),	
		.ENET0_GMII_TX_CLK_0        ( ENET0_GMII_TX_CLK_0        ),	
		.ENET0_GMII_TX_EN_0         ( ENET0_GMII_TX_EN_0         ),	
		.FCLK_CLK0_0                ( FCLK_CLK0_0                ),	
		.FCLK_RESET0_N_0            ( FCLK_RESET0_N_0            ),	
		.LED_tri_io                 ( LED_tri_io                 ),	
		.MDIO_ETHERNET_0_0_mdc      ( MDIO_ETHERNET_0_0_mdc      ),	
		.MDIO_ETHERNET_0_0_mdio_io  ( MDIO_ETHERNET_0_0_mdio_io  ) 	
	);

2.约束

代码如下（示例）：

#ETH
set_property IOSTANDARD LVCMOS33 [get_ports ENET0_GMII_RX_CLK_0]
set_property PACKAGE_PIN U14 [get_ports ENET0_GMII_RX_CLK_0]
set_property IOSTANDARD LVCMOS33 [get_ports ENET0_GMII_RX_DV_0]
set_property PACKAGE_PIN W16 [get_ports ENET0_GMII_RX_DV_0]
set_property IOSTANDARD LVCMOS33 [get_ports {ENET0_GMII_RXD_0[0]}]
set_property IOSTANDARD LVCMOS33 [get_ports {ENET0_GMII_RXD_0[1]}]
set_property IOSTANDARD LVCMOS33 [get_ports {ENET0_GMII_RXD_0[2]}]
set_property IOSTANDARD LVCMOS33 [get_ports {ENET0_GMII_RXD_0[3]}]
set_property PACKAGE_PIN Y16 [get_ports {ENET0_GMII_RXD_0[0]}]
set_property PACKAGE_PIN V16 [get_ports {ENET0_GMII_RXD_0[1]}]
set_property PACKAGE_PIN V17 [get_ports {ENET0_GMII_RXD_0[2]}]
set_property PACKAGE_PIN Y17 [get_ports {ENET0_GMII_RXD_0[3]}]
set_property IOSTANDARD LVCMOS33 [get_ports ENET0_GMII_TX_CLK_0]
set_property PACKAGE_PIN U15 [get_ports ENET0_GMII_TX_CLK_0]
set_property IOSTANDARD LVCMOS33 [get_ports {ENET0_GMII_TX_EN_0[0]}]
set_property PACKAGE_PIN W19 [get_ports {ENET0_GMII_TX_EN_0[0]}]
set_property IOSTANDARD LVCMOS33 [get_ports {ENET0_GMII_TXD_0[0]}]
set_property IOSTANDARD LVCMOS33 [get_ports {ENET0_GMII_TXD_0[1]}]
set_property IOSTANDARD LVCMOS33 [get_ports {ENET0_GMII_TXD_0[2]}]
set_property IOSTANDARD LVCMOS33 [get_ports {ENET0_GMII_TXD_0[3]}]
set_property PACKAGE_PIN W18 [get_ports {ENET0_GMII_TXD_0[0]}]
set_property PACKAGE_PIN Y18 [get_ports {ENET0_GMII_TXD_0[1]}]
set_property PACKAGE_PIN V18 [get_ports {ENET0_GMII_TXD_0[2]}]
set_property PACKAGE_PIN Y19 [get_ports {ENET0_GMII_TXD_0[3]}]
set_property IOSTANDARD LVCMOS33 [get_ports MDIO_ETHERNET_0_0_mdc]
set_property PACKAGE_PIN W15 [get_ports MDIO_ETHERNET_0_0_mdc]
set_property IOSTANDARD LVCMOS33 [get_ports MDIO_ETHERNET_0_0_mdio_io]
set_property PACKAGE_PIN Y14 [get_ports MDIO_ETHERNET_0_0_mdio_io]

#LED
set_property IOSTANDARD LVCMOS33 [get_ports LED_tri_io[0]]
set_property PACKAGE_PIN U19 [get_ports LED_tri_io[0]]
set_property IOSTANDARD LVCMOS33 [get_ports LED_tri_io[1]]
set_property PACKAGE_PIN T19 [get_ports LED_tri_io[1]]

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三、SDK配置

1…导出硬件平台


2.新建硬件平台

添加xsa文件

选择lwIp

编译

找到main.c，这里是板卡IP；电脑主机也要设置为同网段

下载程序

四、结果展示

ping测试

总结

以上就是今天要讲的内容，本文仅仅简单介绍了zynq基础平台的搭建和xilinx例程使用，后面将基于该工程探索更多的玩法，敬请期待