multisim解决timestep too small 仿真错误

Change RELTOL to 0.01% (Relative Error Tolerance)
Change METHOD to “trapezodial” (Integration method)
Change ITL4 to 100 (Upper transient iteration limit)

1. For a complex circuit, try simulating portions at a time until you identify the problem area. Sometimes a particular part model will be the problem.

2. In the Analysis Options, change the simulation mode from Trapezoidal to Gear.

3. In the Analysis Options, reduce the values of all the tolerance limits by a factor of ten or so. This will reduce the simulation accuracy somewhat but may allow the circuit to converge.

e.g.
change the RSHUNT value to 1e+006 ohms, The RELTOL to 0.01, and the ABSTOL to 1e-006 amps.

another solution:
Analysis Options>>SPICE Options>>Use Multisim Defaults
Analysis Parameters>>Parameters>>Maximum time step (TMAX) = 1e-13 Sec
Generally, you would like to set the TMAX parameter to be significantly less than the smallest feature in your signal. In your case, the smallest feature is the rise time in 1ps.
how strange, that the fix for a “timestep too small” error is to make the timestep even smaller.
I see your misunderstanding.
If you don’t specify a maximum timestep (TMAX), Multisim will automatically choose a TMAX based on the length of your transient simulation (TSTOP).
In the event that Multisim can’t solve for the next time step, it will choose a smaller timestep. It will keep trying smaller timesteps until it reaches some fraction of TMAX before giving up. This explains the Timestep too small message that you are getting;
If you have a long simulation with lots of high speed signals, the default TMAX would be too large and that is what is happening. By reducing the TMAX parameter, you are informing Multisim to expect high speed signals and to take smaller timesteps.
If Multisim takes a sufficiently small timestep, it is more likely to converge on the solution (which is what happened). The only draw back is that this takes a lot more time, but such is the nature of high speed simulations.

about mixed-mode simulation:
Your setting under Simulate>>Mixed-mode simulations Settings is set to “Use ideal pin models”. Digital components will use ideal voltages to drive outputs which are connected to analog components. You have several digital component outputs in parallel which causes short circuits (even though voltage values are the same).
You might want to change the setting to “Use real pin models”, which will cause the outputs of the digital component to exhibit I/V behavior similar to that found on those chips - something that you are probably looking for since it looks like you are trying to increase drive strength.