打开vivado,
tool->language template->verilog,
可以找到大量的常用原语的示例代码。
例如:
verilog->device primitive instantiation->kintex7->io component->input buffer->IBUFDS,
IBUFDS #(
.DIFF_TERM("FALSE"), // Differential Termination
.IBUF_LOW_PWR("TRUE"), // Low power="TRUE", Highest performance="FALSE"
// .IOSTANDARD("DEFAULT") // Specify the input I/O standard
.IOSTANDARD("LVDS_25") // Specify the input I/O standard
) IBUFDS_inst (
.O(myO), // Buffer output
.I(myI), // Diff_p buffer input (connect directly to top-level port)
.IB(myIB) // Diff_n buffer input (connect directly to top-level port)
);
通常,将IOSTANDARD修改为"LVDS_25"或"LVDS_18"。
例如:
verilog->device primitive instantiation->kintex7->io component->output buffer->OBUFDS,
OBUFDS #(
//.IOSTANDARD("DEFAULT"), // Specify the output I/O standard
.IOSTANDARD("LVDS_25"), // Specify the output I/O standard
.SLEW("SLOW") // Specify the output slew rate
) OBUFDS_inst (
.O(myO), // Diff_p output (connect directly to top-level port)
.OB(myOB), // Diff_n output (connect directly to top-level port)
.I(myI) // Buffer input
);
通常,将IOSTANDARD修改为"LVDS_25"或"LVDS_18"。
例如:
IBUFDS_GTE2 #(
.CLKCM_CFG("TRUE"), // Refer to Transceiver User Guide
.CLKRCV_TRST("TRUE"), // Refer to Transceiver User Guide
.CLKSWING_CFG(2'b11) // Refer to Transceiver User Guide
)
IBUFDS_GTE2_inst (
.O(myO), // 1-bit output: Refer to Transceiver User Guide
.ODIV2(myODIV2), // 1-bit output: Refer to Transceiver User Guide
.CEB(CEB), // 1-bit input: Refer to Transceiver User Guide
.I(myI), // 1-bit input: Refer to Transceiver User Guide
.IB(myIB) // 1-bit input: Refer to Transceiver User Guide
);
例如:
BUFG BUFG_inst (
.O(myO), // 1-bit output: Clock output
.I(myI) // 1-bit input: Clock input
);