//时分秒计数器(对秒脉冲计数),加上复位、校时功能,加秒矩阵,加显示译码,增加用32768Hz震荡信号CP计数,终极版
module clk18(CP,RST,Ch,Cm,Hc,Sh,Sl,W,ddo,pin_50, pin_51);
input pin_50, pin_51; //
input CP,RST,Ch,Cm,Hc; //32768Hz震荡信号CP,复位,小时校时,分钟校时,小时12_24控制切换
output wire [7:0] Sh,Sl;//秒矩阵输出
output wire [3:0] W;//位码输出
output wire [7:0] ddo; //7段LED数码管段码输出
//output reg [5:0] S; //秒计数输出(6位)
//output reg [3:0] Ml; //分计数低位BCD(4位)
//output reg [2:0] Mh; //分计数高位BCD(3位)
//output reg [3:0] Hl; //时计数低位BCD(4位)
//output reg [1:0] Hh; //时计数高位BCD(2位)
//output wire Sp; //秒脉冲
//中间变量
reg [14:0]Q; //计数中间变量、、、、
wire Sp; //秒脉冲
reg [5:0] S; //秒计数输出Hex(6位)
reg [3:0] Ml; //分计数低位BCD(4位)
reg [2:0] Mh; //分计数高位BCD(3位)
reg [3:0] Hl; //时计数低位BCD(4位)
reg [1:0] Hh; //时计数高位BCD(2位)
wire [7:0] Hhdo,Hldo,Mhdo,Mldo; //时分各位7段码加最高位为0并进行位扫描处理
reg [6:0] Hhd,Hld,Mhd,Mld; //时分各位7段码
always @(posedge CP )
begin
if (RST==0) //复位信号低电平有效
begin
Hh<=2'd0;
Hl<=4'd0;
Mh<=3'd0;
Ml<=4'd0;
S<=6'd0;
end
else
if (Q!=15'd32767) Q<=Q+15'd1;//32768
else
begin
Q<=15'd0; //
case({Ch,Cm})
2'b11: begin //正常计数
if (S!=6'd59) S<=S+6'd1;
else begin S<=6'd0;
if(Ml!=4'd9) Ml<=Ml+4'd1;
else begin Ml<=4'd0;
if (Mh!=3'd5) Mh<=Mh+3'd1;
else begin Mh<=3'd0;
if (Hc==0)
if ({Hh,Hl}==6'h11) {Hh,Hl}<=6'h0;
else if(Hl!=4'd9) Hl<=Hl+4'd1;
else begin
Hl<=4'd0;
Hh<=Hh+2'd1;
end
else
if ({Hh,Hl}==6'h23) {Hh,Hl}<=6'h0;
else if(Hl!=4'd9) Hl<=Hl+4'd1;
else begin
Hl<=4'd0;
Hh<=Hh+2'd1;
end
end
end
end
end
2'b10: begin //分校时
if (S!=6'd59) S<=S+6'd1;
else S<=6'd0;
if(Ml!=4'd9) Ml<=Ml+4'd1;
else begin Ml<=4'd0;
if (Mh!=3'd5) Mh<=Mh+3'd1;
else begin Mh<=3'd0;
if (Hc==0)
if ({Hh,Hl}==6'h11) {Hh,Hl}<=6'h0;
else if(Hl!=4'd9) Hl<=Hl+4'd1;
else begin
Hl<=4'd0;
Hh<=Hh+2'd1;
end
else
if ({Hh,Hl}==6'h23) {Hh,Hl}<=6'h0;
else if(Hl!=4'd9) Hl<=Hl+4'd1;
else begin
Hl<=4'd0;
Hh<=Hh+2'd1;
end
end
end
end
2'b01: begin //时校时
if (Hc==0)
if ({Hh,Hl}==6'h11) {Hh,Hl}<=6'h0;
else if(Hl!=4'd9) Hl<=Hl+4'd1;
else begin
Hl<=4'd0;
Hh<=Hh+2'd1;
end
else
if ({Hh,Hl}==6'h23) {Hh,Hl}<=6'h0;
else if(Hl!=4'd9) Hl<=Hl+4'd1;
else begin
Hl<=4'd0;
Hh<=Hh+2'd1;
end
if (S!=6'd59) S<=S+6'd1;
else begin S<=6'd0;
if(Ml!=4'd9) Ml<=Ml+4'd1;
else begin Ml<=4'd0;
if (Mh!=3'd5) Mh<=Mh+3'd1;
else Mh<=3'd0;
end
end
end
2'b00: begin //时分同时校时
if (S!=6'd59) S<=S+6'd1;
else S<=6'd0;
if(Ml!=4'd9) Ml<=Ml+4'd1;
else begin Ml<=4'd0;
if (Mh!=3'd5) Mh<=Mh+3'd1;
else Mh<=3'd0;
end
if (Hc==0)
if ({Hh,Hl}==6'h11) {Hh,Hl}<=6'h0;
else if(Hl!=4'd9) Hl<=Hl+4'd1;
else begin
Hl<=4'd0;
Hh<=Hh+2'd1;
end
else
if ({Hh,Hl}==6'h23) {Hh,Hl}<=6'h0;
else if(Hl!=4'd9) Hl<=Hl+4'd1;
else begin
Hl<=4'd0;
Hh<=Hh+2'd1;
end
end
endcase
//7段译码
case (Hh)
2'd0:Hhd<=7'b0;//不显示0
2'd1:Hhd<=7'b0000110;// 0110000;
2'd2:Hhd<=7'b1011011;// 1101101;
default:Hhd<=7'b0;
endcase
case (Hl)
4'd0:Hld<=7'b0111111;// 1111110;
4'd1:Hld<=7'b0000110;// 0110000;
4'd2:Hld<=7'b1011011;// 1101101;
4'd3:Hld<=7'b1001111;// 1111001;
4'd4:Hld<=7'b1100110;// 0110011;
4'd5:Hld<=7'b1101101;// 1011011;
4'd6:Hld<=7'b1111100;// 0011111;
4'd7:Hld<=7'b0000111;// 1110000;
4'd8:Hld<=7'b1111111;
4'd9:Hld<=7'b1101111;// 1111011;
default:Hld<=7'b0;
endcase
case (Mh)
4'd0:Mhd<=7'b0111111;// 1111110;
4'd1:Mhd<=7'b0000110;// 0110000;
4'd2:Mhd<=7'b1011011;// 1101101;
4'd3:Mhd<=7'b1001111;// 1111001;
4'd4:Mhd<=7'b1100110;// 0110011;
4'd5:Mhd<=7'b1101101;// 1011011;
default:Mhd<=7'b0;
endcase
case (Ml)
4'd0:Mld<=7'b0111111;// 1111110;
4'd1:Mld<=7'b0000110;// 0110000;
4'd2:Mld<=7'b1011011;// 1101101;
4'd3:Mld<=7'b1001111;// 1111001;
4'd4:Mld<=7'b1100110;// 0110011;
4'd5:Mld<=7'b1101101;// 1011011;
4'd6:Mld<=7'b1111100;// 0011111;
4'd7:Mld<=7'b0000111;// 1110000;
4'd8:Mld<=7'b1111111;
4'd9:Mld<=7'b1101111;// 1111011;
default:Mld<=7'b0;
endcase
end
end
//秒矩阵
assign Sh=8'b00000001<<({S[5],S[4],S[3]});
assign Sl=~(8'b00000001<<({S[2],S[1],S[0]}));
assign W=4'b0001<<({Q[9],Q[8]}); 、、、、
assign Sp=Q[14];//、、、、?
//段码动态输出
assign Hhdo={1'b0,Hhd}&{W[3],W[3],W[3],W[3],W[3],W[3],W[3],W[3]};
assign Hldo={Sp,Hld}&{W[2],W[2],W[2],W[2],W[2],W[2],W[2],W[2]};
assign Mhdo={1'b0,Mhd}&{W[1],W[1],W[1],W[1],W[1],W[1],W[1],W[1]};
assign Mldo={1'b0,Mld}&{W[0],W[0],W[0],W[0],W[0],W[0],W[0],W[0]};
assign ddo=Hhdo+Hldo+Mhdo+Mldo;
endmodule
数电实验_时分秒计数器——终极版
最新推荐文章于 2023-01-02 14:47:38 发布